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authorMiika Pekkarinen <miipekk@ihme.org>2006-12-06 10:02:06 +0000
committerMiika Pekkarinen <miipekk@ihme.org>2006-12-06 10:02:06 +0000
commit46a608bf07ec9d40bdd151e3283646682bb9e9bd (patch)
treeaab98a2c96a307ae6fee89e4eddf861a86dce487 /firmware/target/coldfire/iriver/system-iriver.c
parent51189b4cb41fb70f4800286f99573f590941ddea (diff)
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PLL was incorrectly initialized causing system to crash when ran from
ROM. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11669 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/coldfire/iriver/system-iriver.c')
-rw-r--r--firmware/target/coldfire/iriver/system-iriver.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/coldfire/iriver/system-iriver.c b/firmware/target/coldfire/iriver/system-iriver.c
index 43ba4eeed4..63011969b4 100644
--- a/firmware/target/coldfire/iriver/system-iriver.c
+++ b/firmware/target/coldfire/iriver/system-iriver.c
@@ -81,7 +81,7 @@ void set_cpu_frequency(long frequency)
PLLCR &= ~1; /* Bypass mode */
timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
RECALC_DELAYS(CPUFREQ_MAX);
- PLLCR = 0x01056005 | (PLLCR & 0x70c00000);
+ PLLCR = 0x01856005 | (PLLCR & 0x70400000);
CSCR0 = 0x00001180; /* Flash: 4 wait states */
CSCR1 = 0x00001580; /* LCD: 5 wait states */
#if CONFIG_USBOTG == USBOTG_ISP1362
@@ -108,7 +108,7 @@ void set_cpu_frequency(long frequency)
PLLCR &= ~1; /* Bypass mode */
timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
RECALC_DELAYS(CPUFREQ_NORMAL);
- PLLCR = 0x0305e005 | (PLLCR & 0x70c00000);
+ PLLCR = 0x0385e005 | (PLLCR & 0x70400000);
CSCR0 = 0x00000580; /* Flash: 1 wait state */
CSCR1 = 0x00000180; /* LCD: 0 wait states */
#if CONFIG_USBOTG == USBOTG_ISP1362
@@ -134,8 +134,8 @@ void set_cpu_frequency(long frequency)
PLLCR &= ~1; /* Bypass mode */
timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, true);
RECALC_DELAYS(CPUFREQ_DEFAULT);
- /* Power down PLL, but keep CLSEL and CRSEL */
- PLLCR = 0x00000200 | (PLLCR & 0x70c00000);
+ /* Power down PLL, but keep CLSEL */
+ PLLCR = 0x00000200 | (PLLCR & 0x70400000);
CSCR0 = 0x00000180; /* Flash: 0 wait states */
CSCR1 = 0x00000180; /* LCD: 0 wait states */
#if CONFIG_USBOTG == USBOTG_ISP1362