summaryrefslogtreecommitdiffstats
path: root/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
diff options
context:
space:
mode:
authorSolomon Peachy <pizza@shaftnet.org>2018-08-30 08:28:19 -0400
committerSolomon Peachy <pizza@shaftnet.org>2018-09-20 18:59:19 -0400
commit679a0bd19344eda0b0325831d950e6b5df63a6da (patch)
tree157f71be5e5d606fc86713830964cff87cd5a711 /firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
parent72820d8b2d5ebe8405f8c4833f2ff54fe6324faa (diff)
downloadrockbox-679a0bd19344eda0b0325831d950e6b5df63a6da.tar.gz
rockbox-679a0bd19344eda0b0325831d950e6b5df63a6da.tar.bz2
rockbox-679a0bd19344eda0b0325831d950e6b5df63a6da.zip
jz74x0: MSC clock needs to be divided from PLL clock.
Change-Id: I0cf2f0d55e0859f896afef289e833935d7c5a599
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
index a80e3ec919..93426157b7 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
@@ -647,8 +647,11 @@ static inline unsigned int jz_sd_calc_clkrt(const int drive, unsigned int rate)
static inline void cpm_select_msc_clk(unsigned int rate)
{
unsigned int div = __cpm_get_pllout2() / rate;
+ if (div == 0)
+ div = 1;
- REG_CPM_MSCCDR = div - 1;
+ REG_CPM_MSCCDR = MSCCDR_MCS | (div - 1);
+ DEBUG("MSCCLK == %x\n", REG_CPM_MSCCDR);
}
/* Set the MMC clock frequency */