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authorSolomon Peachy <pizza@shaftnet.org>2020-08-07 08:22:52 -0400
committerSolomon Peachy <pizza@shaftnet.org>2020-08-07 11:42:45 -0400
commit62146ed73513ec62b57163d229c6719b9349c640 (patch)
tree3e4cb2585216e98bd07cc05e7683804f3d1e369b /firmware/target/mips/ingenic_jz47xx/codec-jz4760.c
parent89c7a4e3935ddb61861a208897f0db81f1cd5ecb (diff)
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jz4760: Fixes in PLL calculation and reporting
Change-Id: I890c661fbff549de5a224d90e3fbda34c71b3a7e
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/codec-jz4760.c')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/codec-jz4760.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c b/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c
index 7e210e21f9..95628841dc 100644
--- a/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/codec-jz4760.c
@@ -197,7 +197,7 @@ void pll1_disable(void);
void audiohw_set_frequency(int fsel)
{
unsigned int pll1_speed;
- unsigned char mclk_div, bclk_div, func_mode;
+ unsigned short mclk_div, bclk_div, func_mode;
// bclk is 1..8
// mclk is 1..512