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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2009-04-19 14:10:59 +0000
committerMaurus Cuelenaere <mcuelenaere@gmail.com>2009-04-19 14:10:59 +0000
commitdc8db2a82002bab26494a7c482148f4865056166 (patch)
tree23f1ffeddcd51714c9c66b7e903701421d0121b8 /firmware/target/mips/ingenic_jz47xx/crt0.S
parent42c7fb6b8b590f537f253f101fefcf61dc4bc79f (diff)
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MIPS: set load address of .iram to the start of .bss so RAM doesn't get wasted
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20741 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/crt0.S')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/crt0.S32
1 files changed, 17 insertions, 15 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/crt0.S b/firmware/target/mips/ingenic_jz47xx/crt0.S
index af82ad5d12..4223ee4904 100644
--- a/firmware/target/mips/ingenic_jz47xx/crt0.S
+++ b/firmware/target/mips/ingenic_jz47xx/crt0.S
@@ -122,6 +122,23 @@ _init_cache_loop:
/*
----------------------------------------------------
+ Copy IRAM section
+ * copy IRAM first before BSS gets cleared, as both
+ have the same address
+ ----------------------------------------------------
+ */
+ la t0, _iramcopy
+ la t1, _iramstart
+ la t2, _iramend
+_init_iram_loop:
+ lw t3, 0(t0)
+ sw t3, 0(t1)
+ addiu t1, 4
+ bne t1, t2, _init_iram_loop
+ addiu t0, 4
+
+ /*
+ ----------------------------------------------------
Clear BSS section
----------------------------------------------------
*/
@@ -143,21 +160,6 @@ _init_ibss_loop:
sw zero, 0(t0)
bne t0, t1, _init_ibss_loop
addiu t0, 4
-
- /*
- ----------------------------------------------------
- Copy IRAM section
- ----------------------------------------------------
- */
- la t0, _iramcopy
- la t1, _iramstart
- la t2, _iramend
-_init_iram_loop:
- lw t3, 0(t0)
- sw t3, 0(t1)
- addiu t1, 4
- bne t1, t2, _init_iram_loop
- addiu t0, 4
/*
----------------------------------------------------