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| author | Solomon Peachy <pizza@shaftnet.org> | 2020-08-07 08:22:52 -0400 |
|---|---|---|
| committer | Solomon Peachy <pizza@shaftnet.org> | 2020-08-07 11:42:45 -0400 |
| commit | 62146ed73513ec62b57163d229c6719b9349c640 (patch) | |
| tree | 3e4cb2585216e98bd07cc05e7683804f3d1e369b /firmware/target/mips/ingenic_jz47xx/debug-jz4760.c | |
| parent | 89c7a4e3935ddb61861a208897f0db81f1cd5ecb (diff) | |
| download | rockbox-62146ed73513ec62b57163d229c6719b9349c640.tar.gz rockbox-62146ed73513ec62b57163d229c6719b9349c640.zip | |
jz4760: Fixes in PLL calculation and reporting
Change-Id: I890c661fbff549de5a224d90e3fbda34c71b3a7e
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/debug-jz4760.c')
| -rw-r--r-- | firmware/target/mips/ingenic_jz47xx/debug-jz4760.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c b/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c index 92421b2c1e..ee247a9cff 100644 --- a/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/debug-jz4760.c @@ -42,7 +42,7 @@ static void display_clocks(void) unsigned int cppcr0 = REG_CPM_CPPCR0; /* PLL Control Register */ unsigned int cppcr1 = REG_CPM_CPPCR1; /* PLL Control Register */ unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32}; - unsigned int od[4] = {1, 2, 2, 4}; + unsigned int od[4] = {1, 2, 4, 8}; lcd_putsf(0, line++, "CPPCR0:0x%08x", cppcr0); if (cppcr0 & CPPCR0_PLLEN) { |