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authorSolomon Peachy <pizza@shaftnet.org>2020-08-24 23:34:34 -0400
committerSolomon Peachy <pizza@shaftnet.org>2020-08-25 12:16:33 +0000
commit63ef81de314a29b3289ff896a29a8844c6f1607f (patch)
tree754792070c10723413038e33493eabf29a153ec4 /firmware/target/mips/ingenic_jz47xx/system-target.h
parentc06766bbeb13146c78c5aa1a4a3c4298de5d3f13 (diff)
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jz4760: Give each SD interface its own DMA channel, semaphore, and mutex
* Allows both SD interfaces to have requests in flight simultaneously * Fixed a deadlock in the hotswap code * Ensure TX DMA is idle before initiating a request (bug due to a typo) Change-Id: I988fa29df5f8e41fc6bbdcc517db89842003b34d
Diffstat (limited to 'firmware/target/mips/ingenic_jz47xx/system-target.h')
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-target.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/firmware/target/mips/ingenic_jz47xx/system-target.h b/firmware/target/mips/ingenic_jz47xx/system-target.h
index 9720d3a80c..b6e779ea53 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-target.h
+++ b/firmware/target/mips/ingenic_jz47xx/system-target.h
@@ -97,8 +97,13 @@ void dma_disable(void);
#define DMA_AIC_TX_CHANNEL 0
#define DMA_NAND_CHANNEL 1
#define DMA_USB_CHANNEL 2
-#define DMA_SD_RX_CHANNEL 3
-#define DMA_SD_TX_CHANNEL 4
+#define DMA_SD_RX_CHANNEL0 3
+#define DMA_SD_RX_CHANNEL1 4
+// Note: channel 5 and 11 cannot be used!
+#define DMA_SD_TX_CHANNEL0 6
+#define DMA_SD_TX_CHANNEL1 7
+#define DMA_SD_RX_CHANNEL(n) 3+n
+#define DMA_SD_TX_CHANNEL(n) 6+n
#endif
#define XDMA_CALLBACK(n) DMA ## n