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authorSolomon Peachy <pizza@shaftnet.org>2018-06-28 06:24:26 -0400
committerMichael Giacomelli <giac2000@hotmail.com>2018-07-28 10:56:31 -0400
commit0662793ca0050e823cd1207cc4689a1cba5068bd (patch)
tree08cd2ec59c9044c96b697b5bf8d0640841d044e0 /firmware/target/mips/mmu-mips.h
parentb3e2bd619b1b7ea94ef29d32db48e80b347a1990 (diff)
downloadrockbox-0662793ca0050e823cd1207cc4689a1cba5068bd.tar.gz
rockbox-0662793ca0050e823cd1207cc4689a1cba5068bd.zip
Add cleaned-up xDuoo X3 support
Cleaned up, rebased, and forward-ported from the xvortex fork. (original credit to vsoftster@gmail.com) Change-Id: Ibcc023a0271ea81e901450a88317708c2683236d Signed-off-by: Solomon Peachy <pizza@shaftnet.org>
Diffstat (limited to 'firmware/target/mips/mmu-mips.h')
-rw-r--r--firmware/target/mips/mmu-mips.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/firmware/target/mips/mmu-mips.h b/firmware/target/mips/mmu-mips.h
index 47aea807cc..7e1e36d3f4 100644
--- a/firmware/target/mips/mmu-mips.h
+++ b/firmware/target/mips/mmu-mips.h
@@ -31,14 +31,16 @@ void mmu_init(void);
#define HAVE_CPUCACHE_INVALIDATE
//#define HAVE_CPUCACHE_FLUSH
-void __dcache_writeback_all(void);
-void __dcache_invalidate_all(void);
+void __idcache_invalidate_all(void);
void __icache_invalidate_all(void);
-void __flush_dcache_line(unsigned long addr);
+void __dcache_invalidate_all(void);
+void __dcache_writeback_all(void);
+
void dma_cache_wback_inv(unsigned long addr, unsigned long size);
-#define commit_discard_idcache __icache_invalidate_all
-#define commit_discard_dcache __dcache_invalidate_all
-#define commit_dcache __dcache_writeback_all
+#define commit_discard_idcache __idcache_invalidate_all
+#define commit_discard_icache __icache_invalidate_all
+#define commit_discard_dcache __dcache_invalidate_all
+#define commit_dcache __dcache_writeback_all
#endif /* __MMU_MIPS_INCLUDE_H */