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author | Thomas Martitz <kugel@rockbox.org> | 2012-01-04 18:07:21 +0100 |
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committer | Thomas Martitz <kugel@rockbox.org> | 2012-01-22 18:46:44 +0100 |
commit | 991ae1e39553172a7dd6cd8c634aebfce892e261 (patch) | |
tree | 672a4583af663def399c4fefdbad060605397fbc /firmware/target/sh/system-target.h | |
parent | eaa83bd64775b87e943d345e2810deed44408776 (diff) | |
download | rockbox-991ae1e39553172a7dd6cd8c634aebfce892e261.tar.gz rockbox-991ae1e39553172a7dd6cd8c634aebfce892e261.zip |
Create fimrware/asm directory for assembly optimized stuff.
This dir is suitable for stuff that doesn't fit the target tree, e.g. because
it also builds on hosted or otherwise. It also has a generic subfolder for
fallback C implementations so that not all archs need to provide asm files.
SOURCES should only contain "foo.c" where foo.c includes the specific
<arch>/foo.c files from the subdirs using the preprocessor. This way automatic
selection of asm versions or generic C verion is possible.
For the start, the thread support files are moved, since ASM threads can
be used on hosted platforms as well. Since core_sleep() remains platform
specific it's moved to the corresponding system.h headers.
Change-Id: Iebff272f3407a6eaafeb7656ceb0ae9eca3f7cb9
Diffstat (limited to 'firmware/target/sh/system-target.h')
-rw-r--r-- | firmware/target/sh/system-target.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/firmware/target/sh/system-target.h b/firmware/target/sh/system-target.h index 5db9cc071f..a62a024823 100644 --- a/firmware/target/sh/system-target.h +++ b/firmware/target/sh/system-target.h @@ -137,4 +137,18 @@ static inline void commit_dcache(void) {} static inline void commit_discard_dcache(void) {} static inline void commit_discard_idcache(void) {} +/*--------------------------------------------------------------------------- + * Put core in a power-saving state. + *--------------------------------------------------------------------------- + */ +static inline void core_sleep(void) +{ + asm volatile ( + "and.b #0x7f, @(r0, gbr) \n" /* Clear SBY (bit 7) in SBYCR */ + "mov #0, r1 \n" /* Enable interrupts */ + "ldc r1, sr \n" /* Following instruction cannot be interrupted */ + "sleep \n" /* Execute standby */ + : : "z"(&SBYCR-GBR) : "r1"); +} + #endif /* SYSTEM_TARGET_H */ |