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| author | Aidan MacDonald <amachronic@protonmail.com> | 2022-06-07 21:07:49 +0100 |
|---|---|---|
| committer | Aidan MacDonald <amachronic@protonmail.com> | 2022-07-19 13:15:26 +0100 |
| commit | c72f9c6d0f35e07546e5c045313b6d5984f4e0ca (patch) | |
| tree | c335891f8ff0ff1d7c48a4b2b4eeca93d69a2f54 /firmware/target | |
| parent | 45e2d5d641016d6c39c66e10fda874379f3c7fa0 (diff) | |
| download | rockbox-c72f9c6d0f35e07546e5c045313b6d5984f4e0ca.tar.gz rockbox-c72f9c6d0f35e07546e5c045313b6d5984f4e0ca.zip | |
x1000: add NAND OTP access switch
Provide a way to toggle the OTP bit for reading OTP pages, mostly
useful for debug purposes.
Change-Id: Iec697de2dc188588c43d9ed466201971cac8f30c
Diffstat (limited to 'firmware/target')
| -rw-r--r-- | firmware/target/mips/ingenic_x1000/nand-x1000.c | 6 | ||||
| -rw-r--r-- | firmware/target/mips/ingenic_x1000/nand-x1000.h | 3 |
2 files changed, 9 insertions, 0 deletions
diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.c b/firmware/target/mips/ingenic_x1000/nand-x1000.c index 286dc3c64b..e22c639b8f 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.c +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.c @@ -216,6 +216,12 @@ void nand_close(struct nand_drv* drv) sfc_close(); } +void nand_enable_otp(struct nand_drv* drv, bool enable) +{ + nand_upd_reg(drv, FREG_CFG, FREG_CFG_OTP_ENABLE, + enable ? FREG_CFG_OTP_ENABLE : 0); +} + static uint8_t nand_wait_busy(struct nand_drv* drv) { uint8_t reg; diff --git a/firmware/target/mips/ingenic_x1000/nand-x1000.h b/firmware/target/mips/ingenic_x1000/nand-x1000.h index 61e0bbebc9..bc80ecce07 100644 --- a/firmware/target/mips/ingenic_x1000/nand-x1000.h +++ b/firmware/target/mips/ingenic_x1000/nand-x1000.h @@ -211,6 +211,9 @@ static inline void nand_unlock(struct nand_drv* drv) extern int nand_open(struct nand_drv* drv); extern void nand_close(struct nand_drv* drv); +/* Enable/disable OTP access. OTP data pages are usually vendor-specific. */ +void nand_enable_otp(struct nand_drv* drv, bool enable); + /* Read / program / erase operations. Buffer needs to be cache-aligned for DMA. * Read and program operate on full page data, ie. including OOB data areas. * |