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author | Rafaël Carré <rafael.carre@gmail.com> | 2009-06-29 14:28:49 +0000 |
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committer | Rafaël Carré <rafael.carre@gmail.com> | 2009-06-29 14:28:49 +0000 |
commit | 15e40dd3a6ac8e9df88b77c0dbd9a90870ad91e6 (patch) | |
tree | 11fe9e6aada97782e66f0f3169cf39f43e0a2be0 /firmware/timer.c | |
parent | 2c10af5d3015be95020a8619c7ee657994f14558 (diff) | |
download | rockbox-15e40dd3a6ac8e9df88b77c0dbd9a90870ad91e6.tar.gz rockbox-15e40dd3a6ac8e9df88b77c0dbd9a90870ad91e6.tar.bz2 rockbox-15e40dd3a6ac8e9df88b77c0dbd9a90870ad91e6.zip |
Move Sansa AMS timer code in the target tree
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21552 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/timer.c')
-rw-r--r-- | firmware/timer.c | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/firmware/timer.c b/firmware/timer.c index 1cd913bb35..bcaacba307 100644 --- a/firmware/timer.c +++ b/firmware/timer.c @@ -61,14 +61,6 @@ void TIMER1(void) pfn_timer(); TER1 = 0xff; /* clear all events */ } -#elif CONFIG_CPU == AS3525 -void INT_TIMER1(void) -{ - if (pfn_timer != NULL) - pfn_timer(); - - TIMER1_INTCLR = 0; /* clear interrupt */ -} #elif defined(CPU_PP) void TIMER2(void) { @@ -171,25 +163,6 @@ static bool timer_set(long cycles, bool start) and_b(~0x01, &TSR4); /* clear an eventual interrupt */ return true; -#elif CONFIG_CPU == AS3525 - if (start) - { - if (pfn_unregister != NULL) - { - pfn_unregister(); - pfn_unregister = NULL; - } - } - - TIMER1_LOAD = TIMER1_BGLOAD = cycles; - /* /!\ bit 4 (reserved) must not be modified - * periodic mode, interrupt enabled, no prescale, 32 bits counter */ - TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) | - TIMER_ENABLE | - TIMER_PERIODIC | - TIMER_INT_ENABLE | - TIMER_32_BIT; - return true; #elif defined CPU_COLDFIRE if (prescale > 4096/CPUFREQ_MAX_MULT) return false; @@ -314,10 +287,6 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void), irq_set_int_handler(IRQ_TIMER1, TIMER1_ISR); irq_enable_int(IRQ_TIMER1); return true; -#elif CONFIG_CPU == AS3525 - CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */ - VIC_INT_ENABLE |= INTERRUPT_TIMER1; - return true; #else return __TIMER_REGISTER(reg_prio, unregister_callback, cycles, int_prio, timer_callback); @@ -351,10 +320,6 @@ void timer_unregister(void) #elif CONFIG_CPU == PNX0101 TIMER1.ctrl &= ~0x80; /* disable timer 1 */ irq_disable_int(IRQ_TIMER1); -#elif CONFIG_CPU == AS3525 - TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */ - VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */ - CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */ #else __TIMER_UNREGISTER(); #endif |