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authorThom Johansen <thomj@rockbox.org>2006-03-17 00:08:39 +0000
committerThom Johansen <thomj@rockbox.org>2006-03-17 00:08:39 +0000
commit46de4c21fee7d31b8a76c4ae7df75e29800cd587 (patch)
treed9efe96f84d81fecbfd84cb2cfcb86bbb41ac8fd /firmware/timer.c
parentf7b14efc7f8d1ac6c8cd5bb4dc7fd8b9f36c33d0 (diff)
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Add timer.c module support for ipods. Remove uneeded SIMULATOR check.
Introduce TIMER_FREQ define. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9067 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/timer.c')
-rw-r--r--firmware/timer.c46
1 files changed, 37 insertions, 9 deletions
diff --git a/firmware/timer.c b/firmware/timer.c
index 7d9c288cdd..54e3dc7ac3 100644
--- a/firmware/timer.c
+++ b/firmware/timer.c
@@ -23,8 +23,6 @@
#include "system.h"
#include "timer.h"
-#ifndef SIMULATOR
-
static int timer_prio = -1;
static void (*pfn_timer)(void) = NULL; /* timer callback */
static void (*pfn_unregister)(void) = NULL; /* unregister callback */
@@ -49,6 +47,13 @@ void TIMER1(void)
pfn_timer();
TER1 = 0xff; /* clear all events */
}
+#elif CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002
+void TIMER2(void)
+{
+ TIMER2_VAL; /* ACK interrupt */
+ if (pfn_timer != NULL)
+ pfn_timer();
+}
#endif /* CONFIG_CPU */
static bool timer_set(long cycles, bool start)
@@ -57,15 +62,21 @@ static bool timer_set(long cycles, bool start)
int prescale = 1;
#if (CONFIG_CPU==PP5002) || (CONFIG_CPU==PP5020) || (CONFIG_CPU==PNX0101)
- /* TODO: Implement for iPod and iFP */
- (void)start;
+ /* TODO: Implement for iPod and iFP (if they have prescaler capabilities) */
(void)phi;
#endif
+#if CONFIG_CPU == PNX0101
+ (void)start;
+#endif
+
#ifdef CPU_COLDFIRE
cycles >>= 1; /* the coldfire timer works on busclk == cpuclk/2 */
#endif
+/* Don't do this on ipods, we don't know if these platforms have prescaler
+ capabilities on the timer we use. */
+#if CONFIG_CPU != PP5020 && CONFIG_CPU != PP5002
while (cycles > 0x10000)
{ /* work out the smallest prescaler that makes it fit */
#if CONFIG_CPU == SH7034
@@ -74,6 +85,7 @@ static bool timer_set(long cycles, bool start)
prescale *= 2;
cycles >>= 1;
}
+#endif
#if CONFIG_CPU == SH7034
if (prescale > 8)
@@ -131,7 +143,20 @@ static bool timer_set(long cycles, bool start)
if (start || (TCN1 >= TRR1))
TCN1 = 0; /* reset the timer */
TER1 = 0xff; /* clear all events */
-
+#elif CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002
+ (void)prescale;
+ if (start)
+ {
+ if (pfn_unregister != NULL)
+ {
+ pfn_unregister();
+ pfn_unregister = NULL;
+ }
+ }
+ TIMER2_CFG = 0x0;
+ TIMER2_VAL;
+ /* enable timer */
+ TIMER2_CFG = 0xc0000000 | cycles;
#endif /* CONFIG_CPU */
return true;
}
@@ -155,7 +180,7 @@ void timers_adjust_prescale(int multiplier, bool enable_irq)
}
#endif
-/* Register a user timer, called every <cycles> CPU_FREQ cycles */
+/* Register a user timer, called every <cycles> TIMER_FREQ cycles */
bool timer_register(int reg_prio, void (*unregister_callback)(void),
long cycles, int int_prio, void (*timer_callback)(void))
{
@@ -163,7 +188,7 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
return false;
#if (CONFIG_CPU==PP5002) || (CONFIG_CPU==PP5020) || (CONFIG_CPU==PNX0101)
- /* TODO: Implement for iPod and iFP */
+ /* TODO: Implement for iPod and iFP (if possible) */
(void)int_prio;
#endif
@@ -188,8 +213,10 @@ bool timer_register(int reg_prio, void (*unregister_callback)(void),
ICR2 = 0x90; /* interrupt on level 4.0 */
and_l(~(1<<10), &IMR);
TMR1 |= 1; /* start timer */
+#elif CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002
+ /* unmask interrupt source */
+ CPU_INT_EN = TIMER2_MASK;
#endif
-
return true;
}
@@ -206,10 +233,11 @@ void timer_unregister(void)
#elif defined CPU_COLDFIRE
TMR1 = 0; /* disable timer 1 */
or_l((1<<10), &IMR); /* disable interrupt */
+#elif CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002
+ CPU_INT_CLR = TIMER2_MASK;
#endif
pfn_timer = NULL;
pfn_unregister = NULL;
timer_prio = -1;
}
-#endif /* !SIMULATOR */