diff options
author | Linus Nielsen Feltzing <linus@haxx.se> | 2006-08-25 10:18:16 +0000 |
---|---|---|
committer | Linus Nielsen Feltzing <linus@haxx.se> | 2006-08-25 10:18:16 +0000 |
commit | 798a8c1b7695b0e948e8e4a8f46ec622f403c5f7 (patch) | |
tree | 82868c87503bc13b0af36b5109e36d74a2d5a5d2 /firmware/timer.c | |
parent | 28388b131af19f82cc2f36e56f86ed25eaa987cf (diff) | |
download | rockbox-798a8c1b7695b0e948e8e4a8f46ec622f403c5f7.tar.gz rockbox-798a8c1b7695b0e948e8e4a8f46ec622f403c5f7.zip |
Fix the problem with the user timer on X5 by explicitly resetting the timer before setting it
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10743 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/timer.c')
-rw-r--r-- | firmware/timer.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/firmware/timer.c b/firmware/timer.c index 666bdb972b..fb1a7ffcca 100644 --- a/firmware/timer.c +++ b/firmware/timer.c @@ -133,6 +133,10 @@ static bool timer_set(long cycles, bool start) phi &= ~1; /* timer disabled at start */ } + /* If it is already enabled, writing a 0 to the RST bit will clear the + register, so we clear RST explicitly before writing the real data. */ + TMR1 = 0; + /* We are using timer 1 */ TMR1 = 0x0018 | (unsigned short)phi | ((unsigned short)(prescale - 1) << 8); TRR1 = (unsigned short)(cycles - 1); |