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authorBertrik Sikken <bertrik@sikken.nl>2009-06-12 21:11:45 +0000
committerBertrik Sikken <bertrik@sikken.nl>2009-06-12 21:11:45 +0000
commitd1faf8b39cf9492d1cd6f2e26b916dce0fe0354f (patch)
tree0759746bc14686cc506754ef17c8fd4bee41db5f /firmware/timer.c
parent9d2208e806a630b24c185ab9eb80c09a5ad8370f (diff)
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FS#10317 - Sansa AMS 32-bit timers. Configure the timers for 32-bit mode instead of the default 16-bit mode.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21266 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/timer.c')
-rw-r--r--firmware/timer.c26
1 files changed, 10 insertions, 16 deletions
diff --git a/firmware/timer.c b/firmware/timer.c
index e9f11b6ae7..85e50ae3ca 100644
--- a/firmware/timer.c
+++ b/firmware/timer.c
@@ -109,23 +109,17 @@ void TIMER1_ISR(void)
static bool timer_set(long cycles, bool start)
{
-#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE) || CONFIG_CPU == AS3525
+#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
int phi = 0; /* bits for the prescaler */
int prescale = 1;
-#if CONFIG_CPU == SH7034 || defined(CPU_COLDFIRE)
-#define PRESCALE_STEP 1
-#else /* CONFIG_CPU == AS3525 */
-#define PRESCALE_STEP 4
-#endif
-
while (cycles > 0x10000)
{ /* work out the smallest prescaler that makes it fit */
-#if CONFIG_CPU == SH7034 || CONFIG_CPU == AS3525
+#if CONFIG_CPU == SH7034
phi++;
#endif
- prescale <<= PRESCALE_STEP;
- cycles >>= PRESCALE_STEP;
+ prescale <<= 1;
+ cycles >>= 1;
}
#endif
@@ -178,10 +172,6 @@ static bool timer_set(long cycles, bool start)
return true;
#elif CONFIG_CPU == AS3525
- /* XXX: 32 bits cycles could be used */
- if (prescale > 256 || cycles > 0x10000)
- return false;
-
if (start)
{
if (pfn_unregister != NULL)
@@ -193,8 +183,12 @@ static bool timer_set(long cycles, bool start)
TIMER1_LOAD = TIMER1_BGLOAD = cycles;
/* /!\ bit 4 (reserved) must not be modified
- * periodic mode, interrupt enabled, 16 bits counter */
- TIMER1_CONTROL = (TIMER1_CONTROL & (1<<4)) | 0xe0 | (phi<<2);
+ * periodic mode, interrupt enabled, no prescale, 32 bits counter */
+ TIMER1_CONTROL = (TIMER2_CONTROL & (1<<4)) |
+ TIMER_ENABLE |
+ TIMER_PERIODIC |
+ TIMER_INT_ENABLE |
+ TIMER_32_BIT;
return true;
#elif defined CPU_COLDFIRE
if (prescale > 4096/CPUFREQ_MAX_MULT)