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authorLinus Nielsen Feltzing <linus@haxx.se>2005-07-08 15:03:05 +0000
committerLinus Nielsen Feltzing <linus@haxx.se>2005-07-08 15:03:05 +0000
commite257042a5d36086b7eb42f150d952467f253480b (patch)
treef3eba4b2583fbcce2314e63be6d972e517cf2b0f /firmware
parent3b5fdbeb1fbe47fda11148d6c5c7011dbb39194f (diff)
downloadrockbox-e257042a5d36086b7eb42f150d952467f253480b.tar.gz
rockbox-e257042a5d36086b7eb42f150d952467f253480b.zip
Adjusted refresh timer for H110
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7069 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/system.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/firmware/system.c b/firmware/system.c
index 1c384d2fe1..44655bd7d6 100644
--- a/firmware/system.c
+++ b/firmware/system.c
@@ -502,6 +502,14 @@ void system_init(void)
: : : "d0");
}
+#ifdef IRIVER_H100
+#define MAX_REFRESH_TIMER 56
+#define NORMAL_REFRESH_TIMER 20
+#else
+#define MAX_REFRESH_TIMER 28
+#define NORMAL_REFRESH_TIMER 10
+#endif
+
void set_cpu_frequency (long) __attribute__ ((section (".icode")));
void set_cpu_frequency(long frequency)
{
@@ -516,7 +524,7 @@ void set_cpu_frequency(long frequency)
CSCR1 = 0x00002580; /* LCD: 9 wait states */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
This may take up to 10ms! */
- DCR = (DCR & ~0x01ff) | 28; /* Refresh timer */
+ DCR = (DCR & ~0x01ff) | MAX_REFRESH_TIMER; /* Refresh timer */
cpu_frequency = CPUFREQ_MAX;
tick_start(1000/HZ);
IDECONFIG1 = 0x106000 | (5 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */
@@ -535,7 +543,7 @@ void set_cpu_frequency(long frequency)
CSCR1 = 0x00000980; /* LCD: 2 wait states */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
This may take up to 10ms! */
- DCR = (DCR & ~0x01ff) | 10; /* Refresh timer */
+ DCR = (DCR & ~0x01ff) | NORMAL_REFRESH_TIMER; /* Refresh timer */
cpu_frequency = CPUFREQ_NORMAL;
tick_start(1000/HZ);
IDECONFIG1 = 0x106000 | (5 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */