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authorMarcin Bukat <marcin.bukat@gmail.com>2010-05-20 12:12:27 +0000
committerMarcin Bukat <marcin.bukat@gmail.com>2010-05-20 12:12:27 +0000
commit6b5fc853b68849cc7747d443223df46938e2e2a9 (patch)
tree4c2b5e8313c3a1fbf3b699c39393ed8020ed9072 /firmware
parentf28187074b879019237aab384c72a8dc3c40f3f8 (diff)
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fix comments
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26189 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/target/coldfire/mpio/hd200/system-hd200.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/coldfire/mpio/hd200/system-hd200.c b/firmware/target/coldfire/mpio/hd200/system-hd200.c
index 9a85ef87b4..60699e46a9 100644
--- a/firmware/target/coldfire/mpio/hd200/system-hd200.c
+++ b/firmware/target/coldfire/mpio/hd200/system-hd200.c
@@ -70,7 +70,7 @@ void cf_set_cpu_frequency(long frequency)
timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
PLLCR = 0x018ae025 | (PLLCR & 0x70400000);
CSCR0 = 0x00001180; /* Flash: 4 wait states */
- CSCR3 = 0x00000980; /* LCD: 4 wait states */
+ CSCR3 = 0x00000980; /* LCD: 2 wait states */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
This may take up to 10ms! */
timers_adjust_prescale(CPUFREQ_MAX_MULT, true);
@@ -91,7 +91,7 @@ void cf_set_cpu_frequency(long frequency)
timers_adjust_prescale(CPUFREQ_DEFAULT_MULT, false);
PLLCR = 0x0589e021 | (PLLCR & 0x70400000);
CSCR0 = 0x00000580; /* Flash: 1 wait state */
- CSCR3 = 0x00000580; /* LCD: 0 wait states */
+ CSCR3 = 0x00000580; /* LCD: 1 wait state */
while(!(PLLCR & 0x80000000)) {}; /* Wait until the PLL has locked.
This may take up to 10ms! */
timers_adjust_prescale(CPUFREQ_NORMAL_MULT, true);