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authorRafaël Carré <rafael.carre@gmail.com>2010-05-26 16:03:01 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-05-26 16:03:01 +0000
commit7ad50c6f5935cbde4c96e742b90ce629dd325217 (patch)
tree3aea33c0b0b57bc1f07ef607c095d429fcd02142 /firmware
parentf0f5a6419ab788edfdee23009a4095a68106206d (diff)
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as3525: write irq/fiq handlers in C
Declare VIC registers holding function pointers as volatile pointers to function pointers and access them directly without casting UIRQ() is an IRQ handler too, even if it doesn't return git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26313 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/export/as3525.h6
-rw-r--r--firmware/target/arm/as3525/system-as3525.c26
2 files changed, 11 insertions, 21 deletions
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h
index a58a0ae0ad..6b0e85f9c5 100644
--- a/firmware/export/as3525.h
+++ b/firmware/export/as3525.h
@@ -441,9 +441,9 @@ CE lines
#define VIC_SOFT_INT (*(volatile unsigned long*)(VIC_BASE+0x18))
#define VIC_SOFT_INT_CLEAR (*(volatile unsigned long*)(VIC_BASE+0x1C))
#define VIC_PROTECTION (*(volatile unsigned long*)(VIC_BASE+0x20))
-#define VIC_VECT_ADDR (*(volatile unsigned long*)(VIC_BASE+0x30))
-#define VIC_DEF_VECT_ADDR (*(volatile unsigned long*)(VIC_BASE+0x34))
-#define VIC_VECT_ADDRS ((volatile unsigned long*)(VIC_BASE+0x100))
+#define VIC_VECT_ADDR ((void (* volatile *) (void)) (VIC_BASE+0x30))
+#define VIC_DEF_VECT_ADDR ((void (* volatile *) (void)) (VIC_BASE+0x34))
+#define VIC_VECT_ADDRS ((void (* volatile *) (void)) (VIC_BASE+0x100))
#define VIC_VECT_CNTLS ((volatile unsigned long*)(VIC_BASE+0x200))
/* Interrupt sources (for vectors setup) */
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 6a4c7a1264..5eae1a35b3 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -38,8 +38,9 @@
#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
-void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
-void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
+static void UIRQ (void) __attribute__((interrupt ("IRQ")));
+void irq_handler(void) __attribute__((interrupt ("IRQ")));
+void fiq_handler(void) __attribute__((interrupt ("FIQ")));
default_interrupt(INT_WATCHDOG);
default_interrupt(INT_TIMER1);
@@ -136,8 +137,6 @@ struct vec_int_src vec_int_srcs[] =
static void setup_vic(void)
{
- volatile unsigned long *vic_vect_addrs = VIC_VECT_ADDRS;
- volatile unsigned long *vic_vect_cntls = VIC_VECT_CNTLS;
const unsigned int n = sizeof(vec_int_srcs)/sizeof(vec_int_srcs[0]);
unsigned int i;
@@ -145,12 +144,12 @@ static void setup_vic(void)
VIC_INT_EN_CLEAR = 0xffffffff; /* disable all interrupt lines */
VIC_INT_SELECT = 0; /* only IRQ, no FIQ */
- VIC_DEF_VECT_ADDR = (unsigned long)UIRQ;
+ *VIC_DEF_VECT_ADDR = UIRQ;
for(i = 0; i < n; i++)
{
- vic_vect_addrs[i] = (unsigned long)vec_int_srcs[i].isr;
- vic_vect_cntls[i] = (1<<5) | vec_int_srcs[i].source;
+ VIC_VECT_ADDRS[i] = vec_int_srcs[i].isr;
+ VIC_VECT_CNTLS[i] = (1<<5) | vec_int_srcs[i].source;
}
}
@@ -168,21 +167,12 @@ void INT_GPIOA(void)
void irq_handler(void)
{
- asm volatile( "stmfd sp!, {r0-r5,ip,lr} \n" /* Store context */
- "ldr r5, =0xC6010030 \n" /* VIC_VECT_ADDR */
- "mov lr, pc \n" /* Return from ISR */
- "ldr pc, [r5] \n" /* execute ISR */
- "str r0, [r5] \n" /* Ack interrupt */
- "ldmfd sp!, {r0-r5,ip,lr} \n" /* Restore context */
- "subs pc, lr, #4 \n" /* Return from IRQ */
- );
+ (*VIC_VECT_ADDR)(); /* call the isr */
+ *VIC_VECT_ADDR = (void*)VIC_VECT_ADDR; /* any write will ack the irq */
}
void fiq_handler(void)
{
- asm volatile (
- "subs pc, lr, #4 \r\n"
- );
}
#if defined(SANSA_C200V2)