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authorMichael Sevakis <jethead71@rockbox.org>2008-04-13 20:03:08 +0000
committerMichael Sevakis <jethead71@rockbox.org>2008-04-13 20:03:08 +0000
commitb12c69bac7a02ea161ebc02ce7323e82bebe7b23 (patch)
treed1d827c2e91e7591cb0d661ea0b20c26f0a21d2d /firmware
parent73d1eb4ac06809b64a0545bae22f7e436d3c8b70 (diff)
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ADC driver for Gigabeat S - a bit on the general side for now. Needs to have scales set properly (what physical value a reading represents isn't clear from the docs or I'm just lazy atm). Throw-in a _bunch_ more reg defines for the PMIC. Show all 16 raw channels values in debug menu.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17100 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
-rw-r--r--firmware/export/mc13783.h170
-rw-r--r--firmware/target/arm/imx31/debug-imx31.c26
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/adc-imx31.c103
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/adc-target.h29
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/mc13783-imx31.c40
5 files changed, 312 insertions, 56 deletions
diff --git a/firmware/export/mc13783.h b/firmware/export/mc13783.h
index a489f4c8b9..bde1dc419d 100644
--- a/firmware/export/mc13783.h
+++ b/firmware/export/mc13783.h
@@ -89,19 +89,183 @@ enum mc13783_regs_enum
};
/* INTERRUPT_STATUS0, INTERRUPT_MASK0, INTERRUPT_SENSE0 */
+#define MC13783_ADCDONE (1 << 0) /* x */
+#define MC13783_ADCBISDONE (1 << 1) /* x */
+#define MC13783_TS (1 << 2) /* x */
+#define MC13783_WHIGH (1 << 3) /* x */
+#define MC13783_WLOW (1 << 4) /* x */
#define MC13783_CHGDET (1 << 6)
+#define MC13783_CHGOV (1 << 7)
+#define MC13783_CHGREV (1 << 8)
+#define MC13783_CHGSHORT (1 << 9)
+#define MC13783_CCCV (1 << 10)
+#define MC13783_CHGCURR (1 << 11)
+#define MC13783_BPONI (1 << 12)
+#define MC13783_LOBATL (1 << 13)
+#define MC13783_LOBATH (1 << 14)
+#define MC13783_UDP (1 << 15)
+#define MC13783_USB (1 << 16)
+#define MC13783_ID (1 << 19)
+#define MC13783_SE1 (1 << 21)
+#define MC13783_CKDET (1 << 22)
+#define MC13783_UDM (1 << 23)
+/* x = no sense bit */
/* INTERRUPT_STATUS1, INTERRUPT_MASK1, INTERRUPT_SENSE1 */
-#define MC13783_HSL (1 << 0)
-#define MC13783_ON1B (1 << 3)
-#define MC13783_ON2B (1 << 4)
+#define MC13783_1HZ (1 << 0) /* x */
+#define MC13783_TODA (1 << 1) /* x */
+#define MC13783_ONOFD1 (1 << 3) /* ON1B */
+#define MC13783_ONOFD2 (1 << 4) /* ON2B */
+#define MC13783_ONOFD3 (1 << 5) /* ON3B */
+#define MC13783_SYSRST (1 << 6) /* x */
+#define MC13783_RTCRST (1 << 7) /* x */
+#define MC13783_PCI (1 << 8) /* x */
+#define MC13783_WARM (1 << 9) /* x */
+#define MC13783_MEMHLD (1 << 10) /* x */
+#define MC13783_PWRRDY (1 << 11)
+#define MC13783_THWARNL (1 << 12)
+#define MC13783_THWARNH (1 << 13)
+#define MC13783_CLK (1 << 14)
+#define MC13783_SEMAF (1 << 15) /* x */
+#define MC13783_MC2B (1 << 17)
+#define MC13783_HSDET (1 << 18)
+#define MC13783_HSL (1 << 19)
+#define MC13783_ALSPTH (1 << 20)
+#define MC13783_AHSSHORT (1 << 21)
+/* x = no sense bit */
+
+/* POWER_UP_MODE_SENSE */
+
+#define MC13783_ICTESTS (1 << 0)
+#define MC13783_CLKSELS (1 << 1)
+#define MC13783_PUMS1Sr(r) (((r) >> 2) & 0x3)
+#define MC13783_PUMS2S (((r) >> 4) & 0x3)
+#define MC13783_PUMS3S (((r) >> 6) & 0x3)
+ #define PUMS_LOW 0x0
+ #define PUMS_OPEN 0x1
+ #define PUMS_HIGH 0x2
+#define MC13783_CHRGMOD0Sr(r) (((r) >> 8) & 0x3)
+#define MC13783_CHRGMOD1Sr(r) (((r) >> 10) & 0x3)
+ #define CHRGMOD_LOW 0x0
+ #define CHRGMOD_OPEN 0x1
+ #define CHRGMOD_HIGH 0x3
+#define MC13783_UMODSr(r) (((r) >> 12) & 0x3)
+ #define UMODS0_LOW_UMODS1_LOW 0x0
+ #define UMODS0_OPEN_UMODS1_LOW 0x1
+ #define UMODS0_DONTCARE_UMODS1_HIGH 0x2
+ #define UMODS0_HIGH_UMODS1_LOW 0x3
+#define MC13783_USBEN (1 << 14)
+#define MC13783_SW1ABS (1 << 15)
+#define MC13783_SW2ABS (1 << 16)
+
+/* IDENTIFICATION */
+/* SEMAPHORE */
+/* ARBITRATION_PERIPHERAL_AUDIO */
+/* ARBITRATION_SWITCHERS */
+/* ARBITRATION_REGULATORS0 */
+/* ARBITRATION_REGULATORS1 */
/* POWER_CONTROL0 */
#define MC13783_USEROFFSPI (1 << 3)
+/* POWER_CONTROL1 */
+/* POWER_CONTROL2 */
+/* REGEN_ASSIGNMENT */
+/* MEMORYA */
+/* MEMORYB */
+/* RTC_TIME */
+/* RTC_ALARM */
+/* RTC_DAY */
+/* RTC_DAY_ALARM */
+/* SWITCHERS0 */
+/* SWITCHERS1 */
+/* SWITCHERS2 */
+/* SWITCHERS3 */
+/* SWITCHERS4 */
+/* SWITCHERS5 */
+/* REGULATOR_SETTING0 */
+/* REGULATOR_SETTING1 */
+/* REGULATOR_MODE0 */
+/* REGULATOR_MODE1 */
+/* POWER_MISCELLANEOUS */
+/* AUDIO_RX0 */
+/* AUDIO_RX1 */
+/* AUDIO_TX */
+/* SSI_NETWORK */
+/* AUDIO_CODEC */
+/* AUDIO_STEREO_CODEC */
+
+/* ADC0 */
+#define MC13783_LICELLCON (1 << 0)
+#define MC13783_CHRGICON (1 << 1)
+#define MC13783_BATICON (1 << 2)
+#define MC13783_RTHEN (1 << 3)
+#define MC13783_DTHEN (1 << 4)
+#define MC13783_UIDEN (1 << 5)
+#define MC13783_ADOUTEN (1 << 6)
+#define MC13783_ADOUTPER (1 << 7)
+#define MC13783_ADREFEN (1 << 10)
+#define MC13783_ADREFMODE (1 << 11)
+#define MC13783_TSMODw(w) ((w) << 12)
+#define MC13783_TSMODr(r) (((r) >> 12) & 0x3)
+#define MC13783_CHRGRAWDIV (1 << 15)
+#define MC13783_ADINC1 (1 << 16)
+#define MC13783_ADINC2 (1 << 17)
+#define MC13783_WCOMP (1 << 18)
+#define MC13783_ADCBIS0 (1 << 23)
+
+/* ADC1 */
+#define MC13783_ADEN (1 << 0)
+#define MC13783_RAND (1 << 1)
+#define MC13783_ADSEL (1 << 3)
+#define MC13783_TRIGMASK (1 << 4)
+#define MC13783_ADA1w(w) ((w) << 5)
+#define MC13783_ADA1r(r) (((r) >> 5) & 0x3)
+#define MC13783_ADA2w(w) ((w) << 8)
+#define MC13783_ADA2r(r) (((r) >> 8) & 0x3)
+#define MC13783_ATOw(w) ((w) << 11)
+#define MC13783_ATOr(r) (((r) >> 11) & 0xff)
+#define MC13783_ATOX (1 << 19)
+#define MC13783_ASC (1 << 20)
+#define MC13783_ADTRIGIGN (1 << 21)
+#define MC13783_ADONESHOT (1 << 22)
+#define MC13783_ADCBIS1 (1 << 23)
+
+/* ADC2 */
+#define MC13783_ADD1r(r) (((r) >> 2) & 0x3ff)
+#define MC13783_ADD2r(r) (((r) >> 14) & 0x3ff)
+
+/* ADC3 */
+#define MC13783_WHIGHw(w) ((w) << 0)
+#define MC13783_WHIGHr(r) ((r) & 0x3f)
+#define MC13783_ICIDr(r) (((r) >> 6) & 0x3)
+#define MC13783_WLOWw(w) ((w) << 9)
+#define MC13783_WLOWr(r) (((r) >> 9) & 0x3f)
+#define MC13783_ADCBIS2 (1 << 23)
+
+/* ADC4 */
+#define MC13783_ADCBIS1r(r) (((r) >> 2) & 0x3ff)
+#define MC13783_ADCBIS2r(r) (((r) >> 14) & 0x3ff)
+
+/* CHARGER */
+/* USB0 */
+/* CHARGER_USB1 */
+
/* LED_CONTROL0 */
#define MC13783_LEDEN (1 << 0)
+/* LED_CONTROL1 */
+/* LED_CONTROL2 */
+/* LED_CONTROL3 */
+/* LED_CONTROL4 */
+/* LED_CONTROL5 */
+/* TRIM0 */
+/* TRIM1 */
+/* TEST0 */
+/* TEST1 */
+/* TEST2 */
+/* TEST3 */
+
void mc13783_init(void);
uint32_t mc13783_set(unsigned address, uint32_t bits);
uint32_t mc13783_clear(unsigned address, uint32_t bits);
diff --git a/firmware/target/arm/imx31/debug-imx31.c b/firmware/target/arm/imx31/debug-imx31.c
index 7f1c9166d6..94df64b6d7 100644
--- a/firmware/target/arm/imx31/debug-imx31.c
+++ b/firmware/target/arm/imx31/debug-imx31.c
@@ -25,6 +25,7 @@
#include "font.h"
#include "debug-target.h"
#include "mc13783.h"
+#include "adc.h"
bool __dbg_hw_info(void)
{
@@ -47,11 +48,6 @@ bool __dbg_ports(void)
MC13783_RTC_ALARM,
MC13783_RTC_DAY,
MC13783_RTC_DAY_ALARM,
- MC13783_ADC0,
- MC13783_ADC1,
- MC13783_ADC2,
- MC13783_ADC3,
- MC13783_ADC4,
};
static const char *pmic_regnames[ARRAYLEN(pmic_regset)] =
@@ -64,11 +60,6 @@ bool __dbg_ports(void)
"RTC Alarm ",
"RTC Day ",
"RTC Day Al",
- "ADC0 ",
- "ADC1 ",
- "ADC2 ",
- "ADC3 ",
- "ADC4 ",
};
uint32_t pmic_regs[ARRAYLEN(pmic_regset)];
@@ -132,6 +123,21 @@ bool __dbg_ports(void)
lcd_puts(0, line++, buf);
}
+ line++;
+
+ lcd_puts(0, line++, "ADC"); line++;
+
+ for (i = 0; i < NUM_ADC_CHANNELS; i += 4)
+ {
+ snprintf(buf, sizeof(buf),
+ "CH%02d:%04u CH%02d:%04u CH%02d:%04u CH%02d:%04u",
+ i+0, adc_read(i+0),
+ i+1, adc_read(i+1),
+ i+2, adc_read(i+2),
+ i+3, adc_read(i+3));
+ lcd_puts(0, line++, buf);
+ }
+
lcd_update();
if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL))
return false;
diff --git a/firmware/target/arm/imx31/gigabeat-s/adc-imx31.c b/firmware/target/arm/imx31/gigabeat-s/adc-imx31.c
index 1fd2247ef1..b1b79a7989 100644
--- a/firmware/target/arm/imx31/gigabeat-s/adc-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/adc-imx31.c
@@ -7,7 +7,7 @@
* \/ \/ \/ \/ \/
* $Id$
*
- * Copyright (C) 2006 by Wade Brown
+ * Copyright (C) 2008 by Michael Sevakis
*
* All files in this archive are subject to the GNU General Public License.
* See the file COPYING in the source tree root for full license agreement.
@@ -16,37 +16,96 @@
* KIND, either express or implied.
*
****************************************************************************/
-#include "cpu.h"
+#include "config.h"
+#include "system.h"
+#include "mc13783.h"
#include "adc-target.h"
#include "kernel.h"
-/* prototypes */
-static unsigned short __adc_read(int channel);
-static void adc_tick(void);
-
-void adc_init(void)
+/* Do this so we may read all channels in a single SPI message */
+static const unsigned char reg_array[NUM_ADC_CHANNELS/2] =
{
-}
+ MC13783_ADC2,
+ MC13783_ADC2,
+ MC13783_ADC2,
+ MC13783_ADC2,
+ MC13783_ADC2,
+ MC13783_ADC2,
+ MC13783_ADC2,
+ MC13783_ADC2,
+};
-/* Called to get the recent ADC reading */
-inline unsigned short adc_read(int channel)
+static uint32_t channels[2][NUM_ADC_CHANNELS/2];
+static struct wakeup adc_wake;
+static struct mutex adc_mtx;
+static long last_adc_read[2]; /* One for each input group */
+
+/* Read 10-bit ADC channel */
+unsigned short adc_read(int channel)
{
- (void)channel;
- return 0;
+ uint32_t data;
+ int input_select;
+
+ if ((unsigned)channel >= NUM_ADC_CHANNELS)
+ return ADC_READ_ERROR;
+
+ mutex_lock(&adc_mtx);
+
+ input_select = channel >> 3;
+
+ /* Limit the traffic through here */
+ if (TIME_AFTER(current_tick, last_adc_read[input_select]))
+ {
+ /* Keep enable, start conversion, increment from channel 0,
+ * increment from channel 4 */
+ uint32_t adc1 = MC13783_ADEN | MC13783_ASC | MC13783_ADA1w(0) |
+ MC13783_ADA2w(4);
+
+ if (input_select == 1)
+ adc1 |= MC13783_ADSEL; /* 2nd set of inputs */
+
+ /* Start conversion */
+ mc13783_write(MC13783_ADC1, adc1);
+
+ /* Wait for done signal */
+ wakeup_wait(&adc_wake, TIMEOUT_BLOCK);
+
+ /* Read all 8 channels that are converted - two channels in each
+ * word. */
+ mc13783_read_regset(reg_array, channels[input_select],
+ NUM_ADC_CHANNELS/2);
+
+ last_adc_read[input_select] = current_tick;
+ }
+
+ data = channels[input_select][channel & 7];
+
+ mutex_unlock(&adc_mtx);
+
+ /* Extract the bitfield depending on even or odd channel number */
+ return (channel & 1) ? MC13783_ADD2r(data) : MC13783_ADD1r(data);
}
-/**
- * Read the ADC by polling
- * @param channel The ADC channel to read
- * @return 10bit reading from ADC channel or ADC_READ_ERROR if timeout
- */
-static unsigned short __adc_read(int channel)
+/* Called when conversion is complete */
+void adc_done(void)
{
- (void)channel;
- return 0;
+ wakeup_signal(&adc_wake);
}
-/* add this to the tick so that the ADC converts are done in the background */
-static void adc_tick(void)
+void adc_init(void)
{
+ wakeup_init(&adc_wake);
+ mutex_init(&adc_mtx);
+
+ /* Init so first reads get data */
+ last_adc_read[0] = last_adc_read[1] = current_tick-1;
+
+ /* Enable increment-by-read, thermistor */
+ mc13783_write(MC13783_ADC0, MC13783_ADINC2 | MC13783_ADINC1 |
+ MC13783_RTHEN);
+ /* Enable ADC, set multi-channel mode */
+ mc13783_write(MC13783_ADC1, MC13783_ADEN);
+ /* Enable the ADCDONE interrupt - notifications are dispatched by
+ * event handler. */
+ mc13783_clear(MC13783_INTERRUPT_MASK0, MC13783_ADCDONE);
}
diff --git a/firmware/target/arm/imx31/gigabeat-s/adc-target.h b/firmware/target/arm/imx31/gigabeat-s/adc-target.h
index 8d2beaf320..6b066b0b59 100644
--- a/firmware/target/arm/imx31/gigabeat-s/adc-target.h
+++ b/firmware/target/arm/imx31/gigabeat-s/adc-target.h
@@ -20,18 +20,29 @@
#define _ADC_TARGET_H_
/* only two channels used by the Gigabeat */
-#define NUM_ADC_CHANNELS 2
+#define NUM_ADC_CHANNELS 16
+
+#define ADC_BATTERY 0
+#define ADC_UNKNOWN_1 1
+#define ADC_UNKNOWN_2 2
+#define ADC_UNKNOWN_3 3
+#define ADC_UNKNOWN_4 4
+#define ADC_UNKNOWN_5 5
+#define ADC_UNKNOWN_6 6
+#define ADC_UNKNOWN_7 7
+#define ADC_HPREMOTE 8
+#define ADC_UNKNOWN_9 9
+#define ADC_UNKNOWN_10 10
+#define ADC_UNKNOWN_11 11
+#define ADC_UNKNOWN_12 12
+#define ADC_UNKNOWN_13 13
+#define ADC_UNKNOWN_14 14
+#define ADC_UNKNOWN_15 15
-#define ADC_BATTERY 0
-#define ADC_HPREMOTE 1
-#define ADC_UNKNOWN_3 2
-#define ADC_UNKNOWN_4 3
-#define ADC_UNKNOWN_5 4
-#define ADC_UNKNOWN_6 5
-#define ADC_UNKNOWN_7 6
-#define ADC_UNKNOWN_8 7
#define ADC_UNREG_POWER ADC_BATTERY /* For compatibility */
#define ADC_READ_ERROR 0xFFFF
+void adc_done(void);
+
#endif
diff --git a/firmware/target/arm/imx31/gigabeat-s/mc13783-imx31.c b/firmware/target/arm/imx31/gigabeat-s/mc13783-imx31.c
index fdb214a33d..d62df92ac5 100644
--- a/firmware/target/arm/imx31/gigabeat-s/mc13783-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/mc13783-imx31.c
@@ -26,6 +26,7 @@
#include "power-imx31.h"
#include "button-target.h"
+#include "adc-target.h"
/* This is all based on communicating with the MC13783 PMU which is on
* CSPI2 with the chip select at 0. The LCD controller resides on
@@ -64,17 +65,21 @@ static __attribute__((noreturn)) void mc13783_interrupt_thread(void)
gpio_enable_event(MC13783_GPIO_NUM, MC13783_EVENT_ID);
- /* Check initial states */
+ /* Check initial states for events with a sense bit */
value = mc13783_read(MC13783_INTERRUPT_SENSE0);
set_charger_inserted(value & MC13783_CHGDET);
value = mc13783_read(MC13783_INTERRUPT_SENSE1);
- button_power_set_state((value & MC13783_ON1B) == 0);
- set_headphones_inserted((value & MC13783_ON2B) == 0);
+ button_power_set_state((value & MC13783_ONOFD1) == 0);
+ set_headphones_inserted((value & MC13783_ONOFD2) == 0);
- /* Enable desired PMIC interrupts */
+ pending[0] = pending[1] = 0xffffff;
+ mc13783_write_regset(status_regs, pending, 2);
+
+ /* Enable desired PMIC interrupts - some are unmasked in the drivers that
+ * handle a specific task */
mc13783_clear(MC13783_INTERRUPT_MASK0, MC13783_CHGDET);
- mc13783_clear(MC13783_INTERRUPT_MASK1, MC13783_ON1B | MC13783_ON2B);
+ mc13783_clear(MC13783_INTERRUPT_MASK1, MC13783_ONOFD1 | MC13783_ONOFD2);
while (1)
{
@@ -83,10 +88,16 @@ static __attribute__((noreturn)) void mc13783_interrupt_thread(void)
mc13783_read_regset(status_regs, pending, 2);
mc13783_write_regset(status_regs, pending, 2);
-
if (pending[0])
{
/* Handle ...PENDING0 */
+
+ /* Handle interrupts without a sense bit */
+ if (pending[0] & MC13783_ADCDONE)
+ adc_done();
+
+ /* Handle interrupts that have a sense bit that needs to
+ * be checked */
if (pending[0] & MC13783_CHGDET)
{
value = mc13783_read(MC13783_INTERRUPT_SENSE0);
@@ -96,19 +107,24 @@ static __attribute__((noreturn)) void mc13783_interrupt_thread(void)
}
}
-
if (pending[1])
{
/* Handle ...PENDING1 */
- if (pending[1] & (MC13783_ON1B | MC13783_ON2B))
+
+ /* Handle interrupts without a sense bit */
+ /* ... */
+
+ /* Handle interrupts that have a sense bit that needs to
+ * be checked */
+ if (pending[1] & (MC13783_ONOFD1 | MC13783_ONOFD2))
{
value = mc13783_read(MC13783_INTERRUPT_SENSE1);
- if (pending[1] & MC13783_ON1B)
- button_power_set_state((value & MC13783_ON1B) == 0);
+ if (pending[1] & MC13783_ONOFD1)
+ button_power_set_state((value & MC13783_ONOFD1) == 0);
- if (pending[1] & MC13783_ON2B)
- set_headphones_inserted((value & MC13783_ON2B) == 0);
+ if (pending[1] & MC13783_ONOFD2)
+ set_headphones_inserted((value & MC13783_ONOFD2) == 0);
}
}
}