diff options
| author | Linus Nielsen Feltzing <linus@haxx.se> | 2005-08-11 19:00:55 +0000 |
|---|---|---|
| committer | Linus Nielsen Feltzing <linus@haxx.se> | 2005-08-11 19:00:55 +0000 |
| commit | dc4a6b828ea9a36e839747249dfdb085ced7af07 (patch) | |
| tree | b76a98aebe545a819f9d4fe9cdb0164ec51441bc /firmware | |
| parent | 5a8eac1a5a7daa1f90af82e6d687e6c559a0d3e1 (diff) | |
| download | rockbox-dc4a6b828ea9a36e839747249dfdb085ced7af07.tar.gz rockbox-dc4a6b828ea9a36e839747249dfdb085ced7af07.zip | |
iriver: Moved the I2C prescaler setting to i2c_init(), and removed it from set_cpu_frequency(). The Coldfire I2C controller can't handle on-the-fly prescaler changes. Also removed the unnecessary slave address setting in i2c_init.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@7304 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware')
| -rw-r--r-- | firmware/drivers/i2c-coldfire.c | 6 | ||||
| -rw-r--r-- | firmware/system.c | 9 |
2 files changed, 4 insertions, 11 deletions
diff --git a/firmware/drivers/i2c-coldfire.c b/firmware/drivers/i2c-coldfire.c index 5b4f4a1830..788385101a 100644 --- a/firmware/drivers/i2c-coldfire.c +++ b/firmware/drivers/i2c-coldfire.c @@ -37,15 +37,17 @@ static volatile unsigned char *i2c_get_addr(int device); void i2c_init(void) { + /* I2C Clock divisor = 576 => 119.952 MHz / 2 / 576 = 104.125 kHz */ + MFDR = 0x14; + MFDR2 = 0x14; + #if (CONFIG_KEYPAD == IRIVER_H100_PAD) || (CONFIG_KEYPAD == IRIVER_H300_PAD) /* Audio Codec */ - MADR = 0x6c; /* iRiver firmware uses this addr */ MBDR = 0; /* iRiver firmware does this */ MBCR = IEN; /* Enable interface */ #if 0 /* FM Tuner */ - MADR2 = 0x6c; MBDR2 = 0; MBCR2 = IEN; #endif diff --git a/firmware/system.c b/firmware/system.c index 13d424d02b..dd356bab1f 100644 --- a/firmware/system.c +++ b/firmware/system.c @@ -529,9 +529,6 @@ void set_cpu_frequency(long frequency) tick_start(1000/HZ); IDECONFIG1 = 0x106000 | (5 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */ IDECONFIG2 = 0x40000 | (1 << 8); /* TA enable + CS2wait */ - /* I2C Clock divisor = 576 => 119.952 MHz / 2 / 576 = 104.125 kHz */ - MFDR = 0x14; - MFDR2 = 0x14; break; case CPUFREQ_NORMAL: @@ -548,9 +545,6 @@ void set_cpu_frequency(long frequency) tick_start(1000/HZ); IDECONFIG1 = 0x106000 | (5 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */ IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */ - /* I2C Clock divisor = 240 => 47.9808 MHz / 2 / 240 = 99.96 kHz */ - MFDR = 0x0f; - MFDR2 = 0x0f; break; default: DCR = (DCR & ~0x01ff) | 1; /* Refresh timer for bypass @@ -562,9 +556,6 @@ void set_cpu_frequency(long frequency) tick_start(1000/HZ); IDECONFIG1 = 0x106000 | (1 << 10); /* BUFEN2 enable + CS2Pre/CS2Post */ IDECONFIG2 = 0x40000 | (0 << 8); /* TA enable + CS2wait */ - /* I2C Clock divisor = 56 => 11.2896 MHz / 56 = 100.8 kHz */ - MFDR = 0x06; - MFDR2 = 0x06; break; } } |