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authorRafaël Carré <rafael.carre@gmail.com>2010-06-01 16:53:26 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-06-01 16:53:26 +0000
commit27d529e18691b4a3a32669fe631ce96ff717872f (patch)
tree6937a3dc8a3e27455e4c2f7cc6ff4e850f0b0a9f /rbutil/mkamsboot
parent0a054b288b4ac71f384a18f7c9f8835863fe3751 (diff)
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mkamsboot / nrv2e_d8.S thubm decompressor : comment the use of mov pc, lr
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26449 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'rbutil/mkamsboot')
-rw-r--r--rbutil/mkamsboot/dualboot/nrv2e_d8.S7
1 files changed, 6 insertions, 1 deletions
diff --git a/rbutil/mkamsboot/dualboot/nrv2e_d8.S b/rbutil/mkamsboot/dualboot/nrv2e_d8.S
index b112ab2936..d24fb94b2a 100644
--- a/rbutil/mkamsboot/dualboot/nrv2e_d8.S
+++ b/rbutil/mkamsboot/dualboot/nrv2e_d8.S
@@ -62,7 +62,10 @@
#define CHECK_BYTE /*empty*/
#endif /*}*/
-/* "mov lr,pc; bxx ..." implements conditional subroutine call */
+/* "mov lr,pc; bxx ..." implements conditional subroutine call
+ *
+ * NOTE: the lsb will not be set, so you MUST NOT use 'bx lr' to return,
+ * else the T bit will be cleared and processor will go in ARM state */
#define GETBIT add bits,bits; mov lr,pc; beq get1_n2e
#define getnextb(reg) GETBIT; adc reg,reg
@@ -123,6 +126,8 @@ get1_n2e: @ In: Carry set [from adding 0x80000000 (1<<31) to itself]
CHECK_SRC
add src,#1
lsl bits,#24 @ move to top byte, and set CarryOut from old bit 8
+ /* NOTE: the following instruction will not work on ARMv7+, because
+ * it will update the T bit and return into ARM state */
mov pc,lr @ return, stay in current (THUMB) mode
lit_n2e: