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authorRafaël Carré <rafael.carre@gmail.com>2010-09-05 15:34:34 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-09-05 15:34:34 +0000
commitc196da2ceeddfc03a42e6a620aa08e3f583c8f0d (patch)
tree93fc7d4214af51ae689d02754a7192b36d94abe9 /rbutil
parentd71d537b17f8a3cf385a6523b4d22458831a4afe (diff)
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FS#11597 : decrease FCLK frequency when unboosted
FCLK is unused because we use fastbus clocking: CPU clock = PCLK Base PCLK off PLLA and use the lowest frqeuency for FCLK (24MHz source, maximum divider) Save a bit of power, adjust Clipv1/e200v2/Fuzev1 current usage accordingly Note: the power saving (in mA) is a bit less on e200v2/Fuzev1 than on Clipv1 git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28000 a1c6a512-1295-4272-9138-f99709370657
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