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authorMarcin Bukat <marcin.bukat@gmail.com>2014-02-14 08:37:01 +0100
committerMarcin Bukat <marcin.bukat@gmail.com>2014-02-14 08:37:01 +0100
commit101d10ff6c6ee6992504700452901fd779cbb26e (patch)
tree5b0872263deab63f96ad146f108c93888f90a38f /utils/atj2137/adfuload
parent44afbd3ac248ec01304e54e53316667bf601ae6d (diff)
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atj213x: rework crt0.S in test code
Rework init code so relocation is safe for binaries linked into cached unmapped KSEG0 region. Change-Id: I705ee3f0334f8998237f249a2c3059d6dbe78a43
Diffstat (limited to 'utils/atj2137/adfuload')
-rw-r--r--utils/atj2137/adfuload/test_binary/timer_irq/crt0.S17
1 files changed, 8 insertions, 9 deletions
diff --git a/utils/atj2137/adfuload/test_binary/timer_irq/crt0.S b/utils/atj2137/adfuload/test_binary/timer_irq/crt0.S
index 7b46164ab4..eb78ba4fee 100644
--- a/utils/atj2137/adfuload/test_binary/timer_irq/crt0.S
+++ b/utils/atj2137/adfuload/test_binary/timer_irq/crt0.S
@@ -18,9 +18,12 @@ load_addr:
addiu v0, ra, -12 # calc real load address
# account for branch delay slot
# and very first 'di' instruction
- la t0, relocstart
+ lui t3, 0xa000 # use KSEG1 uncached unmapped
+ la t0, relocstart # addresses as we don't know
+ or t0, t0, t3 # the state of caches
la t1, relocend
- beq t0, v0, entry_point # no relocation needed
+ or t1, t1, t3
+ beq t0, v0, cache_init # no relocation needed
nop
reloc_loop:
@@ -30,12 +33,7 @@ reloc_loop:
bne t0, t1, reloc_loop
addiu t0, 4 # inc dst addr
-entry_point_jump:
- la t0, entry_point
- jr t0
- nop
-
-entry_point:
+cache_init:
# setup caches
# 4-way, 256 sets, 16 bytes cacheline I/D
li t0, 3 # enable cache for kseg0 accesses
@@ -91,7 +89,8 @@ stack_munge_loop:
addiu t0, 4
# jump to C code with enabled interrupts
- j main
+ la t0, main
+ jr t0
ei
.set at