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author | Marcin Bukat <marcin.bukat@gmail.com> | 2014-11-18 23:27:26 +0100 |
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committer | Marcin Bukat <marcin.bukat@gmail.com> | 2014-11-18 23:30:44 +0100 |
commit | cd04a5f1aadc8e2ec4e787f5ba4cc8c38a579314 (patch) | |
tree | 63e9f095451aeba0139152c8742d0af67413690a /utils/hwstub/stub/asm/mips/atomic_rw.S | |
parent | 794169a18f644eea32de20b26646381137545e2d (diff) | |
download | rockbox-cd04a5f1aadc8e2ec4e787f5ba4cc8c38a579314.tar.gz rockbox-cd04a5f1aadc8e2ec4e787f5ba4cc8c38a579314.zip |
hwstub/qeditor: add support for atomic read/writes
The current code assumed that READ/WRITE would produce atomic read/writes for
8/16/32-bit words, which in turned put assumption on the memcpy function.
Since some memcpy implementation do not always guarantee such strong assumption,
introduce two new operation READ/WRITE_ATOMIC which provide the necessary
tools to do correct read and write to register in a single memory access.
Change-Id: I37451bd5057bb0dcaf5a800d8aef8791c792a090
Diffstat (limited to 'utils/hwstub/stub/asm/mips/atomic_rw.S')
-rw-r--r-- | utils/hwstub/stub/asm/mips/atomic_rw.S | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/utils/hwstub/stub/asm/mips/atomic_rw.S b/utils/hwstub/stub/asm/mips/atomic_rw.S new file mode 100644 index 0000000000..47c4213a5d --- /dev/null +++ b/utils/hwstub/stub/asm/mips/atomic_rw.S @@ -0,0 +1,61 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * Copyright (C) 2014 by Marcin Bukat + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#include "mips.h" + + .set noreorder + .section .text, "ax", %progbits + .global target_read8 + .type target_read8, %function + .global target_read16 + .type target_read16, %function + .global target_read32 + .type target_read32, %function + .global target_write8 + .type target_write8, %function + .global target_write16 + .type target_write16, %function + .global target_write32 + .type target_write32, %function + +target_read8: + jr ra + lbu v0, 0(a0) + +target_read16: + jr ra + lhu v0, 0(a0) + +target_read32: + jr ra + lw v0, 0(a0) + +target_write8: + jr ra + sb a1, 0(a0) + +target_write16: + jr ra + sh a1, 0(a0) + +target_write32: + jr ra + sw a1, 0(a0) + + .set reorder |