hwstub: add proper PP support

- drop support for PP500x: it's very different from other PP and although
  it would be possible to support them, I don't have one to test the code
- make sure only the CPU is started
- add PP descriptor to report chip ID and revision
- add code in shell and lua to support pp (no register description yet)
- compile for ARMv4 because PP502x is an ARM7TDMI

Change-Id: I36c4e465dfc2cfdfe7433b2f65cc8f6f0720fe62

4 files changed, 85 insertions, 19 deletions

diff --git a/utils/hwstub/stub/pp/Makefile b/utils/hwstub/stub/pp/Makefile
index 6e79a2b1c8..73d5838f49 100644
--- a/utils/hwstub/stub/pp/Makefile
+++ b/utils/hwstub/stub/pp/Makefile
@@ -7,7 +7,7 @@ AS=arm-elf-eabi-gcc
 OC=arm-elf-eabi-objcopy
 DEFINES=
 INCLUDES=-I$(CURDIR)
-GCCOPTS=-mcpu=arm926ej-s
+GCCOPTS=-mcpu=arm7tdmi
 BUILD_DIR=$(CURDIR)/build/
 ROOT_DIR=$(CURDIR)/..
 
diff --git a/utils/hwstub/stub/pp/crt0.S b/utils/hwstub/stub/pp/crt0.S
index 38b6f18ac5..a128391286 100644
--- a/utils/hwstub/stub/pp/crt0.S
+++ b/utils/hwstub/stub/pp/crt0.S
@@ -5,9 +5,25 @@
 start:
     sub     r7, pc, #8 /* Copy running address */
     msr     cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
-    /* The stub could be located at a virtual address so killing the MMU at
-     * this point would be mere suicide. We assume that the remap location
-     * is identically mapped and kill the MMU after the copy */
+
+    /* Get processor ID */
+    ldr     r0, =0x60000000 /* PROC_ID */
+    ldrb    r4, [r0]
+
+    /* Halt the COP */
+    ldr     r6, =0x60007004 /* COP_CTL */
+    cmp     r4, #0x55   /* CPU_ID */
+1:
+    ldrne   r1, [r6]
+    orrne   r1, #0x80000000 /* PROC_SLEEP */
+    strne   r1, [r6]
+    bne     1b
+
+    /* Wait for the COP to be stopped */
+1:
+    ldr     r0, [r6]
+    tst     r0, #0x80000000 /* PROC_SLEEP */
+    beq     1b
 
     /* Relocate to right address */
     mov    r2, r7
@@ -19,16 +35,11 @@ start:
     strhi   r5, [r3], #4
     bhi     1b
     mov     r2, #0
-    mcr     p15, 0, r2, c7, c5, 0   @ Invalidate ICache
+    /* FIXME invalid Icache here ? */
     /* Jump to real location */
     ldr     pc, =remap
 remap:
-    /* Disable MMU, disable caching and buffering;
-     * use low exception range address */
-    mrc     p15, 0, r0, c1, c0, 0
-    ldr     r1, =0x3005
-    bic     r0, r1
-    mcr     p15, 0, r0, c1, c0, 0
+    /* NOTE on PP611x, we should make sure the MMU is disabled at this point */
     /* clear bss */
     ldr     r2, =bss_start
     ldr     r3, =bss_end
diff --git a/utils/hwstub/stub/pp/target-config.h b/utils/hwstub/stub/pp/target-config.h
index 0774137277..0cd7c0ccc7 100644
--- a/utils/hwstub/stub/pp/target-config.h
+++ b/utils/hwstub/stub/pp/target-config.h
@@ -1,9 +1,7 @@
 #define CONFIG_PP
 #define IRAM_ORIG       0x40000000
-#define IRAM_SIZE       0x20000
-#define DRAM_ORIG       0x10f00000
-#define DRAM_SIZE       (MEMORYSIZE * 0x100000)
+#define IRAM_SIZE       0xc000
 #define CPU_ARM
-#define ARM_ARCH        5
+#define ARM_ARCH        4
 #define USB_BASE            0xc5000000
 #define USB_NUM_ENDPOINTS   2
\ No newline at end of file
diff --git a/utils/hwstub/stub/pp/target.c b/utils/hwstub/stub/pp/target.c
index 14eab80080..5e3a819114 100644
--- a/utils/hwstub/stub/pp/target.c
+++ b/utils/hwstub/stub/pp/target.c
@@ -30,28 +30,85 @@
  *
  */
 
-/* FIXME wrong for PP500x */
-#define USEC_TIMER   (*(volatile unsigned long *)(0x60005010))
+enum pp_family_t
+{
+    UNKNOWN,
+    PP502x,
+    PP611x
+};
+
+static enum pp_family_t g_pp_family = UNKNOWN;
+
+#define USEC_TIMER      (*(volatile unsigned long *)(0x60005010))
+
+// NOTE only valid for PP502x and above */
+#define PP_VER1          (*(volatile unsigned long *)(0x70000000))
+#define PP_VER2          (*(volatile unsigned long *)(0x70000004))
 
 struct hwstub_target_desc_t __attribute__((aligned(2))) target_descriptor =
 {
     sizeof(struct hwstub_target_desc_t),
     HWSTUB_DT_TARGET,
     HWSTUB_TARGET_PP,
-    "PP500x / PP502x / PP610x"
+    "PP502x / PP611x"
 };
 
+static struct hwstub_pp_desc_t __attribute__((aligned(2))) pp_descriptor =
+{
+    sizeof(struct hwstub_pp_desc_t),
+    HWSTUB_DT_PP,
+    0, {' ', ' '},
+};
+
+static uint16_t char2hex(uint8_t c)
+{
+    if(c >= '0' && c <= '9')
+        return c - '0';
+    else
+        return 0xf;
+}
+
 void target_init(void)
 {
+    /* try to read version for PP502x */
+    if(PP_VER2 >> 16 != ('P' | 'P' << 8))
+    {
+        logf("unidentified PP family");
+        g_pp_family = UNKNOWN;
+    }
+    else
+    {
+        pp_descriptor.wChipID = char2hex((PP_VER2 >> 8) & 0xff) << 12 |
+            char2hex(PP_VER2 & 0xff) << 8 |
+            char2hex((PP_VER1 >> 24) & 0xff) << 4 |
+            char2hex((PP_VER1 >> 16) & 0xff);
+        pp_descriptor.bRevision[0] = (PP_VER1 >> 8) & 0xff;
+        pp_descriptor.bRevision[1] = PP_VER1 & 0xff;
+        if(pp_descriptor.wChipID >= 0x6110)
+        {
+            logf("identified PP611x family");
+            g_pp_family = PP611x;
+        }
+        else
+        {
+            logf("identified PP502x family");
+            g_pp_family = PP502x;
+        }
+    }
 }
 
 void target_get_desc(int desc, void **buffer)
 {
-    *buffer = NULL;
+    if(desc == HWSTUB_DT_PP)
+        *buffer = &pp_descriptor;
+    else
+        *buffer = NULL;
 }
 
 void target_get_config_desc(void *buffer, int *size)
 {
+    memcpy(buffer, &pp_descriptor, sizeof(pp_descriptor));
+    *size += sizeof(pp_descriptor);
 }
 
 void target_udelay(int us)