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authorAmaury Pouly <amaury.pouly@gmail.com>2016-05-16 00:08:52 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2016-05-25 00:11:07 +0100
commite62203aac1876987e52f3be9db079bd4ad133b28 (patch)
tree8d12b01ca6e4790c5ef3e9da04ee646093a2008e /utils/regtools/include/soc_desc.hpp
parent00a3658e5a5fdca7c0d4dc532c5721efb8418ee5 (diff)
downloadrockbox-e62203aac1876987e52f3be9db079bd4ad133b28.tar.gz
rockbox-e62203aac1876987e52f3be9db079bd4ad133b28.zip
regtools: add headergen_v2
This new header generator works differently from the previous one: - it uses the new format - the generated macro follow a different style (see below) - the generated macro are highly documented! - it supports SCT-style platform or RMW-style ones Compared to the old style, the new one generate a big set of macros per register/field/enum (loosely related to iohw.h from Embedded C spec). The user then calls generic (names are customizable) macros to perform operations: reg_read(REG_A) reg_read(REG_B(3)) reg_read_field(REG_A, FIELD_X) reg_read_field(REG_B(3), COOL_FIELD) reg_write(REG_A, 0x42) reg_write_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ)) reg_write_fielc(REG_B(3), COOL_FIELD_V(I_AM_COOL), BLA(42)) the following use RMW or SET/CLR variants, depending on target: reg_set_field(REG_A, FLAG_U, FLAG_V) reg_clr_field(REG_A, FIELD_X, FIELD_Y, IRQ) reg_clr_field(REG_B(3), COOL_FIELD, BLA) the following does clear followed by set, on SET/CLR targets: reg_cs(REG_A, 0xff, 0x42) reg_cs(REG_B(3), 0xaa, 0x55) reg_cs_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ)) reg_cs_field(REG_B(3), COOL_FIELD_V(I_AM_COOL)) The generator code is pretty long but has lots of documentation and lots of macro names can be customized. Change-Id: I5d6c5ec2406e58b5da11a5240c3a409a5bb5239a
Diffstat (limited to 'utils/regtools/include/soc_desc.hpp')
-rw-r--r--utils/regtools/include/soc_desc.hpp10
1 files changed, 10 insertions, 0 deletions
diff --git a/utils/regtools/include/soc_desc.hpp b/utils/regtools/include/soc_desc.hpp
index 99f8706789..b8d16b423e 100644
--- a/utils/regtools/include/soc_desc.hpp
+++ b/utils/regtools/include/soc_desc.hpp
@@ -127,6 +127,16 @@ struct field_t
return ((1 << width) - 1) << pos;
}
+ /** Returns the unshifted bit mask of the field */
+ soc_word_t unshifted_bitmask() const
+ {
+ // WARNING beware of the case where width is 32
+ if(width == 32)
+ return 0xffffffff;
+ else
+ return (1 << width) - 1;
+ }
+
/** Extract field value from register value */
soc_word_t extract(soc_word_t reg_val) const
{