summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--firmware/crt0.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/crt0.S b/firmware/crt0.S
index e903bc9ddf..6cec3ec3ce 100644
--- a/firmware/crt0.S
+++ b/firmware/crt0.S
@@ -191,7 +191,7 @@ irq_handler:
/* Set up the DRAM controller. The refresh is based on the 11.2896MHz
clock (5.6448MHz bus frequency). We haven't yet started the PLL */
#if MEM < 32
- move.w #0x8202,%d0 /* DCR - Synchronous, 64 cycle refresh */
+ move.w #0x8204,%d0 /* DCR - Synchronous, 80 cycle refresh */
#else
move.w #0x8001,%d0 /* DCR - Synchronous, 32 cycle refresh */
#endif