diff options
-rw-r--r-- | utils/regtools/desc/regs-stmp3600.xml | 15570 | ||||
-rw-r--r-- | utils/regtools/desc/regs-stmp3700.xml | 21751 | ||||
-rw-r--r-- | utils/regtools/desc/regs-stmp3780.xml | 29872 |
3 files changed, 67193 insertions, 0 deletions
diff --git a/utils/regtools/desc/regs-stmp3600.xml b/utils/regtools/desc/regs-stmp3600.xml new file mode 100644 index 0000000000..9506980146 --- /dev/null +++ b/utils/regtools/desc/regs-stmp3600.xml @@ -0,0 +1,15570 @@ +<?xml version="1.0"?> +<soc version="2"> + <name>stmp3600</name> + <title>STMP3600</title> + <author>Amaury Pouly</author> + <version>2.4.0</version> + <node> + <name>ANATOP</name> + <title>Analog TOP</title> + <desc>Analog TOP</desc> + <instance> + <name>ANATOP</name> + <address>0x8003c200</address> + </instance> + <node> + <name>PROBE_OUTPUT_SELECT</name> + <instance> + <name>PROBE_OUTPUT_SELECT</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>OUTPUT_SELECT</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PROBE_INPUT_SELECT</name> + <instance> + <name>PROBE_INPUT_SELECT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>INPUT_SELECT</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PROBE_DATA</name> + <instance> + <name>PROBE_DATA</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PROBE_DIGTOP_SELECT</name> + <instance> + <name>PROBE_DIGTOP_SELECT</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>DIGTOP_SELECT</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>APBH</name> + <title>APHB DMA</title> + <desc>AHB-to-APBH Bridge with DMA</desc> + <instance> + <name>APBH</name> + <address>0x80004000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>RESET_CHANNEL</name> + <position>16</position> + <width>8</width> + <enum> + <name>HWECC</name> + <value>0x1</value> + </enum> + <enum> + <name>SSP</name> + <value>0x2</value> + </enum> + <enum> + <name>SRC</name> + <value>0x4</value> + </enum> + <enum> + <name>DEST</name> + <value>0x8</value> + </enum> + <enum> + <name>ATA</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND0</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND1</name> + <value>0x20</value> + </enum> + <enum> + <name>NAND2</name> + <value>0x30</value> + </enum> + <enum> + <name>NAND3</name> + <value>0x40</value> + </enum> + </field> + <field> + <name>CLKGATE_CHANNEL</name> + <position>8</position> + <width>8</width> + <enum> + <name>HWECC</name> + <value>0x1</value> + </enum> + <enum> + <name>SSP</name> + <value>0x2</value> + </enum> + <enum> + <name>SRC</name> + <value>0x4</value> + </enum> + <enum> + <name>DEST</name> + <value>0x8</value> + </enum> + <enum> + <name>ATA</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND0</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND1</name> + <value>0x20</value> + </enum> + <enum> + <name>NAND2</name> + <value>0x30</value> + </enum> + <enum> + <name>NAND3</name> + <value>0x40</value> + </enum> + </field> + <field> + <name>FREEZE_CHANNEL</name> + <position>0</position> + <width>8</width> + <enum> + <name>HWECC</name> + <value>0x1</value> + </enum> + <enum> + <name>SSP</name> + <value>0x2</value> + </enum> + <enum> + <name>SRC</name> + <value>0x4</value> + </enum> + <enum> + <name>DEST</name> + <value>0x8</value> + </enum> + <enum> + <name>ATA</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND0</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND1</name> + <value>0x20</value> + </enum> + <enum> + <name>NAND2</name> + <value>0x30</value> + </enum> + <enum> + <name>NAND3</name> + <value>0x40</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>CH_CMDCMPLT_IRQ_EN</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>CH_CMDCMPLT_IRQ</name> + <position>0</position> + <width>8</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEVSEL</name> + <instance> + <name>DEVSEL</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>CH7</name> + <position>28</position> + <width>4</width> + </field> + <field> + <name>CH6</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>CH5</name> + <position>20</position> + <width>4</width> + </field> + <field> + <name>CH4</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>CH3</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>CH2</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>CH1</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>CH0</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + <node> + <name>CHn_DEBUG2</name> + <instance> + <name>CHn_DEBUG2</name> + <range> + <first>0</first> + <count>8</count> + <base>0x90</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>APB_BYTES</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>AHB_BYTES</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>CHn_CURCMDAR</name> + <instance> + <name>CHn_CURCMDAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x30</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>CMD_ADDR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_BAR</name> + <instance> + <name>CHn_BAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x60</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>ADDRESS</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_CMD</name> + <instance> + <name>CHn_CMD</name> + <range> + <first>0</first> + <count>8</count> + <base>0x50</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>XFER_COUNT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>CMDWORDS</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>WAIT4ENDCMD</name> + <position>7</position> + </field> + <field> + <name>SEMAPHORE</name> + <position>6</position> + </field> + <field> + <name>NANDWAIT4READY</name> + <position>5</position> + </field> + <field> + <name>NANDLOCK</name> + <position>4</position> + </field> + <field> + <name>IRQONCMPLT</name> + <position>3</position> + </field> + <field> + <name>CHAIN</name> + <position>2</position> + </field> + <field> + <name>COMMAND</name> + <position>0</position> + <width>2</width> + <enum> + <name>NO_DMA_XFER</name> + <value>0x0</value> + </enum> + <enum> + <name>DMA_WRITE</name> + <value>0x1</value> + </enum> + <enum> + <name>DMA_READ</name> + <value>0x2</value> + </enum> + <enum> + <name>DMA_SENSE</name> + <value>0x3</value> + </enum> + </field> + </register> + </node> + <node> + <name>CHn_NXTCMDAR</name> + <instance> + <name>CHn_NXTCMDAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x40</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>CMD_ADDR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_SEMA</name> + <instance> + <name>CHn_SEMA</name> + <range> + <first>0</first> + <count>8</count> + <base>0x70</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>PHORE</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>INCREMENT_SEMA</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>CHn_DEBUG1</name> + <instance> + <name>CHn_DEBUG1</name> + <range> + <first>0</first> + <count>8</count> + <base>0x80</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>REQ</name> + <position>31</position> + </field> + <field> + <name>BURST</name> + <position>30</position> + </field> + <field> + <name>KICK</name> + <position>29</position> + </field> + <field> + <name>END</name> + <position>28</position> + </field> + <field> + <name>RSVD2</name> + <position>25</position> + <width>3</width> + </field> + <field> + <name>NEXTCMDADDRVALID</name> + <position>24</position> + </field> + <field> + <name>RD_FIFO_EMPTY</name> + <position>23</position> + </field> + <field> + <name>RD_FIFO_FULL</name> + <position>22</position> + </field> + <field> + <name>WR_FIFO_EMPTY</name> + <position>21</position> + </field> + <field> + <name>WR_FIFO_FULL</name> + <position>20</position> + </field> + <field> + <name>RSVD1</name> + <position>5</position> + <width>15</width> + </field> + <field> + <name>STATEMACHINE</name> + <position>0</position> + <width>5</width> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>REQ_CMD1</name> + <value>0x1</value> + </enum> + <enum> + <name>REQ_CMD3</name> + <value>0x2</value> + </enum> + <enum> + <name>REQ_CMD2</name> + <value>0x3</value> + </enum> + <enum> + <name>XFER_DECODE</name> + <value>0x4</value> + </enum> + <enum> + <name>REQ_WAIT</name> + <value>0x5</value> + </enum> + <enum> + <name>REQ_CMD4</name> + <value>0x6</value> + </enum> + <enum> + <name>PIO_REQ</name> + <value>0x7</value> + </enum> + <enum> + <name>READ_FLUSH</name> + <value>0x8</value> + </enum> + <enum> + <name>READ_WAIT</name> + <value>0x9</value> + </enum> + <enum> + <name>WRITE</name> + <value>0xc</value> + </enum> + <enum> + <name>READ_REQ</name> + <value>0xd</value> + </enum> + <enum> + <name>CHECK_CHAIN</name> + <value>0xe</value> + </enum> + <enum> + <name>XFER_COMPLETE</name> + <value>0xf</value> + </enum> + <enum> + <name>WAIT_END</name> + <value>0x15</value> + </enum> + <enum> + <name>WRITE_WAIT</name> + <value>0x1c</value> + </enum> + <enum> + <name>CHECK_WAIT</name> + <value>0x1e</value> + </enum> + </field> + </register> + </node> + </node> + <node> + <name>APBX</name> + <title>APHX DMA</title> + <desc>AHB-to-APBX Bridge with DMA</desc> + <instance> + <name>APBX</name> + <address>0x80024000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>RESET_CHANNEL</name> + <position>16</position> + <width>8</width> + <enum> + <name>AUDIOIN</name> + <value>0x1</value> + </enum> + <enum> + <name>AUDIOOUT</name> + <value>0x2</value> + </enum> + <enum> + <name>SPDIF_TX</name> + <value>0x4</value> + </enum> + <enum> + <name>I2C</name> + <value>0x8</value> + </enum> + <enum> + <name>LCDIF</name> + <value>0x10</value> + </enum> + <enum> + <name>DRI</name> + <value>0x20</value> + </enum> + <enum> + <name>UART_RX</name> + <value>0x30</value> + </enum> + <enum> + <name>IRDA_RX</name> + <value>0x30</value> + </enum> + <enum> + <name>UART_TX</name> + <value>0x40</value> + </enum> + <enum> + <name>IRDA_TX</name> + <value>0x40</value> + </enum> + </field> + <field> + <name>FREEZE_CHANNEL</name> + <position>0</position> + <width>8</width> + <enum> + <name>AUDIOIN</name> + <value>0x1</value> + </enum> + <enum> + <name>AUDIOOUT</name> + <value>0x2</value> + </enum> + <enum> + <name>SPDIF_TX</name> + <value>0x4</value> + </enum> + <enum> + <name>I2C</name> + <value>0x8</value> + </enum> + <enum> + <name>LCDIF</name> + <value>0x10</value> + </enum> + <enum> + <name>DRI</name> + <value>0x20</value> + </enum> + <enum> + <name>UART_RX</name> + <value>0x30</value> + </enum> + <enum> + <name>IRDA_RX</name> + <value>0x30</value> + </enum> + <enum> + <name>UART_TX</name> + <value>0x40</value> + </enum> + <enum> + <name>IRDA_TX</name> + <value>0x40</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>CH_CMDCMPLT_IRQ_EN</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>CH_CMDCMPLT_IRQ</name> + <position>0</position> + <width>8</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEVSEL</name> + <instance> + <name>DEVSEL</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>CH7</name> + <position>28</position> + <width>4</width> + <enum> + <name>USE_UART</name> + <value>0x0</value> + </enum> + <enum> + <name>USE_IRDA</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CH6</name> + <position>24</position> + <width>4</width> + <enum> + <name>USE_UART</name> + <value>0x0</value> + </enum> + <enum> + <name>USE_IRDA</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CH5</name> + <position>20</position> + <width>4</width> + </field> + <field> + <name>CH4</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>CH3</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>CH2</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>CH1</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>CH0</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + <node> + <name>CHn_NXTCMDAR</name> + <instance> + <name>CHn_NXTCMDAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x40</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>CMD_ADDR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_DEBUG2</name> + <instance> + <name>CHn_DEBUG2</name> + <range> + <first>0</first> + <count>8</count> + <base>0x90</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>APB_BYTES</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>AHB_BYTES</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>CHn_BAR</name> + <instance> + <name>CHn_BAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x60</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>ADDRESS</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_CMD</name> + <instance> + <name>CHn_CMD</name> + <range> + <first>0</first> + <count>8</count> + <base>0x50</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>XFER_COUNT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>CMDWORDS</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>WAIT4ENDCMD</name> + <position>7</position> + </field> + <field> + <name>SEMAPHORE</name> + <position>6</position> + </field> + <field> + <name>IRQONCMPLT</name> + <position>3</position> + </field> + <field> + <name>CHAIN</name> + <position>2</position> + </field> + <field> + <name>COMMAND</name> + <position>0</position> + <width>2</width> + <enum> + <name>NO_DMA_XFER</name> + <value>0x0</value> + </enum> + <enum> + <name>DMA_WRITE</name> + <value>0x1</value> + </enum> + <enum> + <name>DMA_READ</name> + <value>0x2</value> + </enum> + </field> + </register> + </node> + <node> + <name>CHn_DEBUG1</name> + <instance> + <name>CHn_DEBUG1</name> + <range> + <first>0</first> + <count>8</count> + <base>0x80</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>REQ</name> + <position>31</position> + </field> + <field> + <name>BURST</name> + <position>30</position> + </field> + <field> + <name>KICK</name> + <position>29</position> + </field> + <field> + <name>END</name> + <position>28</position> + </field> + <field> + <name>RSVD2</name> + <position>25</position> + <width>3</width> + </field> + <field> + <name>NEXTCMDADDRVALID</name> + <position>24</position> + </field> + <field> + <name>RD_FIFO_EMPTY</name> + <position>23</position> + </field> + <field> + <name>RD_FIFO_FULL</name> + <position>22</position> + </field> + <field> + <name>WR_FIFO_EMPTY</name> + <position>21</position> + </field> + <field> + <name>WR_FIFO_FULL</name> + <position>20</position> + </field> + <field> + <name>RSVD1</name> + <position>5</position> + <width>15</width> + </field> + <field> + <name>STATEMACHINE</name> + <position>0</position> + <width>5</width> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>REQ_CMD1</name> + <value>0x1</value> + </enum> + <enum> + <name>REQ_CMD3</name> + <value>0x2</value> + </enum> + <enum> + <name>REQ_CMD2</name> + <value>0x3</value> + </enum> + <enum> + <name>XFER_DECODE</name> + <value>0x4</value> + </enum> + <enum> + <name>REQ_WAIT</name> + <value>0x5</value> + </enum> + <enum> + <name>REQ_CMD4</name> + <value>0x6</value> + </enum> + <enum> + <name>PIO_REQ</name> + <value>0x7</value> + </enum> + <enum> + <name>READ_FLUSH</name> + <value>0x8</value> + </enum> + <enum> + <name>READ_WAIT</name> + <value>0x9</value> + </enum> + <enum> + <name>WRITE</name> + <value>0xc</value> + </enum> + <enum> + <name>READ_REQ</name> + <value>0xd</value> + </enum> + <enum> + <name>CHECK_CHAIN</name> + <value>0xe</value> + </enum> + <enum> + <name>XFER_COMPLETE</name> + <value>0xf</value> + </enum> + <enum> + <name>WAIT_END</name> + <value>0x15</value> + </enum> + <enum> + <name>WRITE_WAIT</name> + <value>0x1c</value> + </enum> + <enum> + <name>CHECK_WAIT</name> + <value>0x1e</value> + </enum> + </field> + </register> + </node> + <node> + <name>CHn_SEMA</name> + <instance> + <name>CHn_SEMA</name> + <range> + <first>0</first> + <count>8</count> + <base>0x70</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>PHORE</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>INCREMENT_SEMA</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>CHn_CURCMDAR</name> + <instance> + <name>CHn_CURCMDAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x30</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>CMD_ADDR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + </node> + <node> + <name>AUDIOIN</name> + <title>AUDIOIN/ADC</title> + <desc>Digital Audio Filter Input</desc> + <instance> + <name>AUDIOIN</name> + <address>0x8004c000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>DMAWAIT_COUNT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>LR_SWAP</name> + <position>10</position> + </field> + <field> + <name>EDGE_SYNC</name> + <position>9</position> + </field> + <field> + <name>INVERT_1BIT</name> + <position>8</position> + </field> + <field> + <name>OFFSET_ENABLE</name> + <position>7</position> + </field> + <field> + <name>HPF_ENABLE</name> + <position>6</position> + </field> + <field> + <name>WORD_LENGTH</name> + <position>5</position> + </field> + <field> + <name>LOOPBACK</name> + <position>4</position> + </field> + <field> + <name>FIFO_UNDERFLOW_IRQ</name> + <position>3</position> + </field> + <field> + <name>FIFO_OVERFLOW_IRQ</name> + <position>2</position> + </field> + <field> + <name>FIFO_ERROR_IRQ_EN</name> + <position>1</position> + </field> + <field> + <name>RUN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>ADC_PRESENT</name> + <position>31</position> + </field> + </register> + </node> + <node> + <name>ADCSRR</name> + <instance> + <name>ADCSRR</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>OSR</name> + <position>31</position> + <enum> + <name>OSR6</name> + <value>0x0</value> + </enum> + <enum> + <name>OSR12</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BASEMULT</name> + <position>28</position> + <width>3</width> + <enum> + <name>SINGLE_RATE</name> + <value>0x1</value> + </enum> + <enum> + <name>DOUBLE_RATE</name> + <value>0x2</value> + </enum> + <enum> + <name>QUAD_RATE</name> + <value>0x4</value> + </enum> + </field> + <field> + <name>SRC_HOLD</name> + <position>24</position> + <width>3</width> + </field> + <field> + <name>SRC_INT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>SRC_FRAC</name> + <position>0</position> + <width>13</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ADCVOLUME</name> + <instance> + <name>ADCVOLUME</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>VOLUME_UPDATE_LEFT</name> + <position>28</position> + </field> + <field> + <name>EN_ZCD</name> + <position>25</position> + </field> + <field> + <name>VOLUME_LEFT</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>VOLUME_UPDATE_RIGHT</name> + <position>12</position> + </field> + <field> + <name>VOLUME_RIGHT</name> + <position>0</position> + <width>8</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ADCDEBUG</name> + <instance> + <name>ADCDEBUG</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>ENABLE_ADCDMA</name> + <position>31</position> + </field> + <field> + <name>ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS</name> + <position>3</position> + </field> + <field> + <name>SET_INTERRUPT3_HAND_SHAKE</name> + <position>2</position> + </field> + <field> + <name>DMA_PREQ</name> + <position>1</position> + </field> + <field> + <name>FIFO_STATUS</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ADCVOL</name> + <instance> + <name>ADCVOL</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>SELECT_LEFT</name> + <position>28</position> + <width>2</width> + </field> + <field> + <name>SELECT_RIGHT</name> + <position>24</position> + <width>2</width> + </field> + <field> + <name>MUTE</name> + <position>8</position> + </field> + <field> + <name>GAIN_LEFT</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>GAIN_RIGHT</name> + <position>0</position> + <width>4</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>MICLINE</name> + <instance> + <name>MICLINE</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>ATTEN_LINE</name> + <position>30</position> + </field> + <field> + <name>DIVIDE_LINE1</name> + <position>29</position> + </field> + <field> + <name>DIVIDE_LINE2</name> + <position>28</position> + </field> + <field> + <name>MIC_SELECT</name> + <position>24</position> + </field> + <field> + <name>MIC_RESISTOR</name> + <position>20</position> + <width>2</width> + <enum> + <name>Off</name> + <value>0x0</value> + </enum> + <enum> + <name>2KOhm</name> + <value>0x1</value> + </enum> + <enum> + <name>4KOhm</name> + <value>0x2</value> + </enum> + <enum> + <name>8KOhm</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>MIC_BIAS</name> + <position>16</position> + <width>3</width> + </field> + <field> + <name>FORCE_MICAMP_PWRUP</name> + <position>8</position> + </field> + <field> + <name>MIC_GAIN</name> + <position>0</position> + <width>2</width> + <enum> + <name>0dB</name> + <value>0x0</value> + </enum> + <enum> + <name>20dB</name> + <value>0x1</value> + </enum> + <enum> + <name>30dB</name> + <value>0x2</value> + </enum> + <enum> + <name>40dB</name> + <value>0x3</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ANACLKCTRL</name> + <instance> + <name>ANACLKCTRL</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>DITHER_ENABLE</name> + <position>6</position> + </field> + <field> + <name>SLOW_DITHER</name> + <position>5</position> + </field> + <field> + <name>INVERT_ADCCLK</name> + <position>4</position> + </field> + <field> + <name>ADCDIV</name> + <position>0</position> + <width>3</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>HIGH</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>LOW</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + </node> + <node> + <name>AUDIOOUT</name> + <title>AUDIOOUT/DAC</title> + <desc>Digital Audio Filter Output</desc> + <instance> + <name>AUDIOOUT</name> + <address>0x80048000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>DMAWAIT_COUNT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>LR_SWAP</name> + <position>14</position> + </field> + <field> + <name>EDGE_SYNC</name> + <position>13</position> + </field> + <field> + <name>INVERT_1BIT</name> + <position>12</position> + </field> + <field> + <name>SS3D_EFFECT</name> + <position>8</position> + <width>2</width> + </field> + <field> + <name>WORD_LENGTH</name> + <position>6</position> + </field> + <field> + <name>DAC_ZERO_ENABLE</name> + <position>5</position> + </field> + <field> + <name>LOOPBACK</name> + <position>4</position> + </field> + <field> + <name>FIFO_UNDERFLOW_IRQ</name> + <position>3</position> + </field> + <field> + <name>FIFO_OVERFLOW_IRQ</name> + <position>2</position> + </field> + <field> + <name>FIFO_ERROR_IRQ_EN</name> + <position>1</position> + </field> + <field> + <name>RUN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>DAC_PRESENT</name> + <position>31</position> + </field> + </register> + </node> + <node> + <name>DACSRR</name> + <instance> + <name>DACSRR</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>OSR</name> + <position>31</position> + <enum> + <name>OSR6</name> + <value>0x0</value> + </enum> + <enum> + <name>OSR12</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BASEMULT</name> + <position>28</position> + <width>3</width> + <enum> + <name>SINGLE_RATE</name> + <value>0x1</value> + </enum> + <enum> + <name>DOUBLE_RATE</name> + <value>0x2</value> + </enum> + <enum> + <name>QUAD_RATE</name> + <value>0x4</value> + </enum> + </field> + <field> + <name>SRC_HOLD</name> + <position>24</position> + <width>3</width> + </field> + <field> + <name>SRC_INT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>SRC_FRAC</name> + <position>0</position> + <width>13</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DACVOLUME</name> + <instance> + <name>DACVOLUME</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>VOLUME_UPDATE_LEFT</name> + <position>28</position> + </field> + <field> + <name>EN_ZCD</name> + <position>25</position> + </field> + <field> + <name>MUTE_LEFT</name> + <position>24</position> + </field> + <field> + <name>VOLUME_LEFT</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>VOLUME_UPDATE_RIGHT</name> + <position>12</position> + </field> + <field> + <name>MUTE_RIGHT</name> + <position>8</position> + </field> + <field> + <name>VOLUME_RIGHT</name> + <position>0</position> + <width>8</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DACDEBUG</name> + <instance> + <name>DACDEBUG</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>ENABLE_DACDMA</name> + <position>31</position> + </field> + <field> + <name>SET_INTERRUPT1_CLK_CROSS</name> + <position>5</position> + </field> + <field> + <name>SET_INTERRUPT0_CLK_CROSS</name> + <position>4</position> + </field> + <field> + <name>SET_INTERRUPT1_HAND_SHAKE</name> + <position>3</position> + </field> + <field> + <name>SET_INTERRUPT0_HAND_SHAKE</name> + <position>2</position> + </field> + <field> + <name>DMA_PREQ</name> + <position>1</position> + </field> + <field> + <name>FIFO_STATUS</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>HPVOL</name> + <instance> + <name>HPVOL</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>SELECT</name> + <position>24</position> + <width>2</width> + </field> + <field> + <name>MUTE</name> + <position>16</position> + </field> + <field> + <name>VOL_LEFT</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>VOL_RIGHT</name> + <position>0</position> + <width>5</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>SPKRVOL</name> + <instance> + <name>SPKRVOL</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>MUTE</name> + <position>16</position> + </field> + <field> + <name>VOL</name> + <position>0</position> + <width>4</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PWRDN</name> + <instance> + <name>PWRDN</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>SPEAKER</name> + <position>24</position> + </field> + <field> + <name>SELFBIAS</name> + <position>20</position> + </field> + <field> + <name>RIGHT_ADC</name> + <position>16</position> + </field> + <field> + <name>DAC</name> + <position>12</position> + </field> + <field> + <name>ADC</name> + <position>8</position> + </field> + <field> + <name>CAPLESS</name> + <position>4</position> + </field> + <field> + <name>HEADPHONE</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>REFCTRL</name> + <instance> + <name>REFCTRL</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>XTAL_BGR_BIAS</name> + <position>24</position> + </field> + <field> + <name>VBG_ADJ</name> + <position>20</position> + <width>3</width> + </field> + <field> + <name>LOW_PWR</name> + <position>19</position> + </field> + <field> + <name>LW_REF</name> + <position>18</position> + </field> + <field> + <name>BIAS_CTRL</name> + <position>16</position> + <width>2</width> + </field> + <field> + <name>ADJ_ADC</name> + <position>13</position> + </field> + <field> + <name>ADJ_VAG</name> + <position>12</position> + </field> + <field> + <name>ADC_REFVAL</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>VAG_VAL</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>DAC_ADJ</name> + <position>0</position> + <width>3</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ANACTRL</name> + <instance> + <name>ANACTRL</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>SHORT_CM_STS</name> + <position>28</position> + </field> + <field> + <name>SHORT_LR_STS</name> + <position>24</position> + </field> + <field> + <name>SHORTMODE_CM</name> + <position>20</position> + <width>2</width> + </field> + <field> + <name>SHORTMODE_LR</name> + <position>17</position> + <width>2</width> + </field> + <field> + <name>SHORT_LVLADJL</name> + <position>12</position> + <width>3</width> + </field> + <field> + <name>SHORT_LVLADJR</name> + <position>8</position> + <width>3</width> + </field> + <field> + <name>HP_HOLD_GND</name> + <position>5</position> + </field> + <field> + <name>HP_CLASSAB</name> + <position>4</position> + </field> + <field> + <name>EN_SPKR_ZCD</name> + <position>2</position> + </field> + <field> + <name>ZCD_SELECTADC</name> + <position>1</position> + </field> + <field> + <name>EN_ZCD</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TEST</name> + <instance> + <name>TEST</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>HP_ANTIPOP</name> + <position>28</position> + <width>3</width> + </field> + <field> + <name>TM_ADCIN_TOHP</name> + <position>26</position> + </field> + <field> + <name>TM_SPEAKER</name> + <position>25</position> + </field> + <field> + <name>TM_HPCOMMON</name> + <position>24</position> + </field> + <field> + <name>HP_I1_ADJ</name> + <position>22</position> + <width>2</width> + </field> + <field> + <name>HP_IALL_ADJ</name> + <position>20</position> + <width>2</width> + </field> + <field> + <name>SPKR_I1_ADJ</name> + <position>18</position> + <width>2</width> + </field> + <field> + <name>SPKR_IALL_ADJ</name> + <position>16</position> + <width>2</width> + </field> + <field> + <name>VAG_CLASSA</name> + <position>13</position> + </field> + <field> + <name>VAG_DOUBLE_I</name> + <position>12</position> + </field> + <field> + <name>HP_CHOPCLK</name> + <position>8</position> + <width>2</width> + </field> + <field> + <name>DAC_CHOPCLK</name> + <position>4</position> + <width>2</width> + </field> + <field> + <name>DAC_CLASSA</name> + <position>2</position> + </field> + <field> + <name>DAC_DOUBLE_I</name> + <position>1</position> + </field> + <field> + <name>DAC_DIS_RTZ</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>BISTCTRL</name> + <instance> + <name>BISTCTRL</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>FAIL</name> + <position>3</position> + </field> + <field> + <name>PASS</name> + <position>2</position> + </field> + <field> + <name>DONE</name> + <position>1</position> + </field> + <field> + <name>START</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>BISTSTAT0</name> + <instance> + <name>BISTSTAT0</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>24</width> + </field> + </register> + </node> + <node> + <name>BISTSTAT1</name> + <instance> + <name>BISTSTAT1</name> + <address>0xd0</address> + </instance> + <register> + <field> + <name>STATE</name> + <position>24</position> + <width>5</width> + </field> + <field> + <name>ADDR</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>ANACLKCTRL</name> + <instance> + <name>ANACLKCTRL</name> + <address>0xe0</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>INVERT_DACCLK</name> + <position>4</position> + </field> + <field> + <name>DACDIV</name> + <position>0</position> + <width>3</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0xf0</address> + </instance> + <register> + <field> + <name>HIGH</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>LOW</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>BRAZOIOCSR</name> + <title>BRAZO IO</title> + <desc>BRAZO PIO Control</desc> + <instance> + <name>BRAZOIOCSR</name> + <address>0x80038000</address> + </instance> + </node> + <node> + <name>CLKCTRL</name> + <title>Clock Controller</title> + <desc>Clock Generation and Control</desc> + <instance> + <name>CLKCTRL</name> + <address>0x80040000</address> + </instance> + <node> + <name>PLLCTRL0</name> + <instance> + <name>PLLCTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>PLLVCOKSTART</name> + <position>30</position> + </field> + <field> + <name>PLLCPSHORTLFR</name> + <position>29</position> + </field> + <field> + <name>PLLCPDBLIP</name> + <position>28</position> + </field> + <field> + <name>PLLCPNSEL</name> + <position>24</position> + <width>3</width> + <enum> + <name>DEFAULT</name> + <value>0x0</value> + </enum> + <enum> + <name>TIMES_15</name> + <value>0x2</value> + </enum> + <enum> + <name>TIMES_075</name> + <value>0x3</value> + </enum> + <enum> + <name>TIMES_05</name> + <value>0x4</value> + </enum> + <enum> + <name>TIMES_04</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>PLLV2ISEL</name> + <position>20</position> + <width>2</width> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>LOWER</name> + <value>0x1</value> + </enum> + <enum> + <name>LOWEST</name> + <value>0x2</value> + </enum> + <enum> + <name>HIGHEST</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>FORCE_FREQ</name> + <position>19</position> + <enum> + <name>FORCE_SAME_FREQ</name> + <value>0x1</value> + </enum> + <enum> + <name>HONOR_SAME_FREQ_RULE</name> + <value>0x0</value> + </enum> + </field> + <field> + <name>EN_USB_CLKS</name> + <position>18</position> + </field> + <field> + <name>BYPASS</name> + <position>17</position> + </field> + <field> + <name>POWER</name> + <position>16</position> + </field> + <field> + <name>FREQ</name> + <position>0</position> + <width>9</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PLLCTRL1</name> + <instance> + <name>PLLCTRL1</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>LOCK</name> + <position>31</position> + </field> + <field> + <name>FORCE_LOCK</name> + <position>30</position> + </field> + <field> + <name>LOCK_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CPU</name> + <instance> + <name>CPU</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>WAIT_PLL_LOCK</name> + <position>30</position> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>INTERRUPT_WAIT</name> + <position>12</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>10</width> + </field> + </register> + </node> + <node> + <name>HBUS</name> + <instance> + <name>HBUS</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>WAIT_PLL_LOCK</name> + <position>30</position> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>EMI_BUSY_FAST</name> + <position>27</position> + </field> + <field> + <name>APBHDMA_BUSY_FAST</name> + <position>26</position> + </field> + <field> + <name>APBXDMA_BUSY_FAST</name> + <position>25</position> + </field> + <field> + <name>TRAFFIC_JAM_FAST</name> + <position>24</position> + </field> + <field> + <name>TRAFFIC_FAST</name> + <position>23</position> + </field> + <field> + <name>CPU_DATA_FAST</name> + <position>22</position> + </field> + <field> + <name>CPU_INSTR_FAST</name> + <position>21</position> + </field> + <field> + <name>AUTO_SLOW_MODE</name> + <position>20</position> + </field> + <field> + <name>SLOW_DIV</name> + <position>16</position> + <width>2</width> + <enum> + <name>BY1</name> + <value>0x0</value> + </enum> + <enum> + <name>BY2</name> + <value>0x1</value> + </enum> + <enum> + <name>BY4</name> + <value>0x2</value> + </enum> + <enum> + <name>BY8</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>5</width> + </field> + </register> + </node> + <node> + <name>XBUS</name> + <instance> + <name>XBUS</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>BUSY</name> + <position>31</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>10</width> + </field> + </register> + </node> + <node> + <name>XTAL</name> + <instance> + <name>XTAL</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>UART_CLK_GATE</name> + <position>31</position> + </field> + <field> + <name>FILT_CLK24M_GATE</name> + <position>30</position> + </field> + <field> + <name>PWM_CLK24M_GATE</name> + <position>29</position> + </field> + <field> + <name>DRI_CLK24M_GATE</name> + <position>28</position> + </field> + <field> + <name>DIGCTRL_CLK1M_GATE</name> + <position>27</position> + </field> + <field> + <name>TIMROT_CLK32K_GATE</name> + <position>26</position> + </field> + <field> + <name>EXRAM_CLK16K_GATE</name> + <position>25</position> + </field> + <field> + <name>LRADC_CLK2K_GATE</name> + <position>24</position> + </field> + </register> + </node> + <node> + <name>OCRAM</name> + <instance> + <name>OCRAM</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>BUSY</name> + <position>30</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>10</width> + </field> + </register> + </node> + <node> + <name>UTMI</name> + <instance> + <name>UTMI</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>UTMI_CLK120M_GATE</name> + <position>31</position> + </field> + <field> + <name>UTMI_CLK30M_GATE</name> + <position>30</position> + </field> + </register> + </node> + <node> + <name>SSP</name> + <instance> + <name>SSP</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>WAIT_PLL_LOCK</name> + <position>30</position> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>GPMI</name> + <instance> + <name>GPMI</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>WAIT_PLL_LOCK</name> + <position>30</position> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>10</width> + </field> + </register> + </node> + <node> + <name>SPDIF</name> + <instance> + <name>SPDIF</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>BUSY</name> + <position>30</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>3</width> + </field> + </register> + </node> + <node> + <name>EMI</name> + <instance> + <name>EMI</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>WAIT_PLL_LOCK</name> + <position>30</position> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>DIV</name> + <position>0</position> + <width>3</width> + </field> + </register> + </node> + <node> + <name>IR</name> + <instance> + <name>IR</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>31</position> + </field> + <field> + <name>WAIT_PLL_LOCK</name> + <position>30</position> + </field> + <field> + <name>AUTO_DIV</name> + <position>29</position> + </field> + <field> + <name>IR_BUSY</name> + <position>28</position> + </field> + <field> + <name>IROV_BUSY</name> + <position>27</position> + </field> + <field> + <name>IROV_DIV</name> + <position>16</position> + <width>9</width> + </field> + <field> + <name>IR_DIV</name> + <position>0</position> + <width>10</width> + </field> + </register> + </node> + </node> + <node> + <name>DACDMA</name> + <title>DAC DMA</title> + <desc>DAC DMA Control</desc> + <instance> + <name>DACDMA</name> + <address>0x8004c000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>RUN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>HIGH</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>LOW</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + </node> + <node> + <name>DIGCTL</name> + <title>Digital Control</title> + <desc>Digital Control and On-Chip RAM</desc> + <instance> + <name>DIGCTL</name> + <address>0x8001c000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>MASTER_SELECT</name> + <position>24</position> + <width>5</width> + <enum> + <name>ARM_I</name> + <value>0x1</value> + </enum> + <enum> + <name>ARM_D</name> + <value>0x2</value> + </enum> + <enum> + <name>USB</name> + <value>0x4</value> + </enum> + <enum> + <name>APBH</name> + <value>0x8</value> + </enum> + <enum> + <name>APBX</name> + <value>0x10</value> + </enum> + </field> + <field> + <name>USB_TESTMODE</name> + <position>20</position> + </field> + <field> + <name>ANALOG_TESTMODE</name> + <position>19</position> + </field> + <field> + <name>DIGITAL_TESTMODE</name> + <position>18</position> + </field> + <field> + <name>UTMI_TESTMODE</name> + <position>17</position> + </field> + <field> + <name>UART_LOOPBACK</name> + <position>16</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>LOOPIT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DEBUG_DISABLE</name> + <position>3</position> + </field> + <field> + <name>USB_CLKGATE</name> + <position>2</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_CLKS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>JTAG_SHIELD</name> + <position>1</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>SHIELDS_UP</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PACKAGE_SENSE_ENABLE</name> + <position>0</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STATUS</name> + <instance> + <name>STATUS</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>ROM_KEYS_PRESENT</name> + <position>31</position> + </field> + <field> + <name>JTAG_SHIELD_DEFAULT</name> + <position>6</position> + </field> + <field> + <name>ROM_SHIELDED</name> + <position>5</position> + </field> + <field> + <name>JTAG_IN_USE</name> + <position>4</position> + </field> + <field> + <name>PSWITCH</name> + <position>2</position> + <width>2</width> + </field> + <field> + <name>PACKAGE_TYPE</name> + <position>1</position> + </field> + <field> + <name>WRITTEN</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>HCLKCOUNT</name> + <instance> + <name>HCLKCOUNT</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>COUNT</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>RAMCTRL</name> + <instance> + <name>RAMCTRL</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>TEST_MARGIN</name> + <position>28</position> + <width>3</width> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x3</value> + </enum> + <enum> + <name>LEVEL4</name> + <value>0x4</value> + </enum> + <enum> + <name>LEVEL5</name> + <value>0x5</value> + </enum> + <enum> + <name>LEVEL6</name> + <value>0x6</value> + </enum> + <enum> + <name>LEVEL7</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>PWDN_BANKS</name> + <position>24</position> + <width>4</width> + <enum> + <name>PWDN_BANK3</name> + <value>0x8</value> + </enum> + <enum> + <name>PWDN_BANK2</name> + <value>0x4</value> + </enum> + <enum> + <name>PWDN_BANK1</name> + <value>0x2</value> + </enum> + <enum> + <name>PWDN_BANK0</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TEMP_SENSOR</name> + <position>20</position> + <width>3</width> + </field> + <field> + <name>TEST_TEMP_COMP</name> + <position>16</position> + <width>3</width> + <enum> + <name>LOW_TEMP</name> + <value>0x1</value> + </enum> + <enum> + <name>RANGE_A</name> + <value>0x2</value> + </enum> + <enum> + <name>RANGE_B</name> + <value>0x3</value> + </enum> + <enum> + <name>RANGE_C</name> + <value>0x4</value> + </enum> + <enum> + <name>RANGE_D</name> + <value>0x5</value> + </enum> + <enum> + <name>RANGE_E</name> + <value>0x6</value> + </enum> + <enum> + <name>RANGE_F</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>SHIFT_COUNT</name> + <position>8</position> + <width>7</width> + </field> + <field> + <name>FLIP_CLK</name> + <position>7</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>INVERT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>OVER_RIDE_TEMP</name> + <position>3</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>OVER_RIDE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>REF_CLK_GATE</name> + <position>2</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>OFF</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>REPAIR_STATUS</name> + <position>1</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>REPAIR_TRANSMIT</name> + <position>0</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>SEND</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>RAMREPAIR0</name> + <instance> + <name>RAMREPAIR0</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>EFUSE3</name> + <position>24</position> + <width>7</width> + </field> + <field> + <name>EFUSE2</name> + <position>16</position> + <width>7</width> + </field> + <field> + <name>EFUSE1</name> + <position>8</position> + <width>7</width> + </field> + <field> + <name>EFUSE0</name> + <position>0</position> + <width>7</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>RAMREPAIR1</name> + <instance> + <name>RAMREPAIR1</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>EFUSE3</name> + <position>24</position> + <width>7</width> + </field> + <field> + <name>EFUSE2</name> + <position>16</position> + <width>7</width> + </field> + <field> + <name>EFUSE1</name> + <position>8</position> + <width>7</width> + </field> + <field> + <name>EFUSE0</name> + <position>0</position> + <width>7</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>WRITEONCE</name> + <instance> + <name>WRITEONCE</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>AHBCYCLES</name> + <instance> + <name>AHBCYCLES</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>COUNT</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>AHBSTALLED</name> + <instance> + <name>AHBSTALLED</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>COUNT</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>ENTROPY</name> + <instance> + <name>ENTROPY</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>VALUE</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>ROMSHIELD</name> + <instance> + <name>ROMSHIELD</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>WRITE_ONCE</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>MICROSECONDS</name> + <instance> + <name>MICROSECONDS</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>VALUE</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DBGRD</name> + <instance> + <name>DBGRD</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>COMPLEMENT</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>DBG</name> + <instance> + <name>DBG</name> + <address>0xd0</address> + </instance> + <register> + <field> + <name>VALUE</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_BIST_CSR</name> + <instance> + <name>1TRAM_BIST_CSR</name> + <address>0xe0</address> + </instance> + <register> + <field> + <name>FAIL</name> + <position>3</position> + </field> + <field> + <name>PASS</name> + <position>2</position> + </field> + <field> + <name>DONE</name> + <position>1</position> + </field> + <field> + <name>START</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>1TRAM_BIST_REPAIR0</name> + <instance> + <name>1TRAM_BIST_REPAIR0</name> + <address>0xf0</address> + </instance> + <register/> + </node> + <node> + <name>1TRAM_BIST_REPAIR1</name> + <instance> + <name>1TRAM_BIST_REPAIR1</name> + <address>0x100</address> + </instance> + <register/> + </node> + <node> + <name>1TRAM_STATUS0</name> + <instance> + <name>1TRAM_STATUS0</name> + <address>0x110</address> + </instance> + <register> + <field> + <name>FAILDATA00</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS1</name> + <instance> + <name>1TRAM_STATUS1</name> + <address>0x120</address> + </instance> + <register> + <field> + <name>FAILDATA01</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS2</name> + <instance> + <name>1TRAM_STATUS2</name> + <address>0x130</address> + </instance> + <register> + <field> + <name>FAILDATA10</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS3</name> + <instance> + <name>1TRAM_STATUS3</name> + <address>0x140</address> + </instance> + <register> + <field> + <name>FAILDATA11</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS4</name> + <instance> + <name>1TRAM_STATUS4</name> + <address>0x150</address> + </instance> + <register> + <field> + <name>FAILDATA20</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS5</name> + <instance> + <name>1TRAM_STATUS5</name> + <address>0x160</address> + </instance> + <register> + <field> + <name>FAILDATA21</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS6</name> + <instance> + <name>1TRAM_STATUS6</name> + <address>0x170</address> + </instance> + <register> + <field> + <name>FAILDATA30</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS7</name> + <instance> + <name>1TRAM_STATUS7</name> + <address>0x180</address> + </instance> + <register> + <field> + <name>FAILDATA31</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS8</name> + <instance> + <name>1TRAM_STATUS8</name> + <address>0x190</address> + </instance> + <register> + <field> + <name>FAILADDR01</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>FAILADDR00</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS9</name> + <instance> + <name>1TRAM_STATUS9</name> + <address>0x1a0</address> + </instance> + <register> + <field> + <name>FAILADDR11</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>FAILADDR10</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS10</name> + <instance> + <name>1TRAM_STATUS10</name> + <address>0x1b0</address> + </instance> + <register> + <field> + <name>FAILADDR21</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>FAILADDR20</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS11</name> + <instance> + <name>1TRAM_STATUS11</name> + <address>0x1c0</address> + </instance> + <register> + <field> + <name>FAILADDR31</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>FAILADDR30</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS12</name> + <instance> + <name>1TRAM_STATUS12</name> + <address>0x1d0</address> + </instance> + <register> + <field> + <name>FAILSTATE11</name> + <position>24</position> + <width>5</width> + </field> + <field> + <name>FAILSTATE10</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>FAILSTATE01</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>FAILSTATE00</name> + <position>0</position> + <width>5</width> + </field> + </register> + </node> + <node> + <name>1TRAM_STATUS13</name> + <instance> + <name>1TRAM_STATUS13</name> + <address>0x1e0</address> + </instance> + <register> + <field> + <name>FAILSTATE31</name> + <position>24</position> + <width>5</width> + </field> + <field> + <name>FAILSTATE30</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>FAILSTATE21</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>FAILSTATE20</name> + <position>0</position> + <width>5</width> + </field> + </register> + </node> + <node> + <name>SCRATCH0</name> + <instance> + <name>SCRATCH0</name> + <address>0x290</address> + </instance> + <register> + <field> + <name>PTR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>SCRATCH1</name> + <instance> + <name>SCRATCH1</name> + <address>0x2a0</address> + </instance> + <register> + <field> + <name>PTR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>ARMCACHE</name> + <instance> + <name>ARMCACHE</name> + <address>0x2b0</address> + </instance> + <register> + <field> + <name>CACHE_SS</name> + <position>8</position> + <width>2</width> + </field> + <field> + <name>DTAG_SS</name> + <position>4</position> + <width>2</width> + </field> + <field> + <name>ITAG_SS</name> + <position>0</position> + <width>2</width> + </field> + </register> + </node> + <node> + <name>SGTL</name> + <instance> + <name>SGTL</name> + <address>0x300</address> + </instance> + <register> + <field> + <name>COPYRIGHT</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHIPID</name> + <instance> + <name>CHIPID</name> + <address>0x310</address> + </instance> + <register> + <field> + <name>PRODUCT_CODE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>REVISION</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + </node> + <node> + <name>DRI</name> + <title>Digital Radio Interface</title> + <desc>Digital Radio Interface (DRI)</desc> + <instance> + <name>DRI</name> + <address>0x80074000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>RESET</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_CLKS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE_INPUTS</name> + <position>29</position> + <enum> + <name>ANALOG_LINE_IN</name> + <value>0x0</value> + </enum> + <enum> + <name>DRI_DIGITAL_IN</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>STOP_ON_OFLOW_ERROR</name> + <position>26</position> + <enum> + <name>IGNORE</name> + <value>0x0</value> + </enum> + <enum> + <name>STOP</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>STOP_ON_PILOT_ERROR</name> + <position>25</position> + <enum> + <name>IGNORE</name> + <value>0x0</value> + </enum> + <enum> + <name>STOP</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DMA_DELAY_COUNT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>REACQUIRE_PHASE</name> + <position>15</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>NEW_PHASE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>OVERFLOW_IRQ_EN</name> + <position>11</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PILOT_SYNC_LOSS_IRQ_EN</name> + <position>10</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ATTENTION_IRQ_EN</name> + <position>9</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>OVERFLOW_IRQ</name> + <position>3</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PILOT_SYNC_LOSS_IRQ</name> + <position>2</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ATTENTION_IRQ</name> + <position>1</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RUN</name> + <position>0</position> + <enum> + <name>HALT</name> + <value>0x0</value> + </enum> + <enum> + <name>RUN</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMING</name> + <instance> + <name>TIMING</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>PILOT_REP_RATE</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>GAP_DETECTION_INTERVAL</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DRI_PRESENT</name> + <position>31</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PILOT_PHASE</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>OVERFLOW_IRQ_SUMMARY</name> + <position>3</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PILOT_SYNC_LOSS_IRQ_SUMMARY</name> + <position>2</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ATTENTION_IRQ_SUMMARY</name> + <position>1</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>DEBUG0</name> + <instance> + <name>DEBUG0</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>DMAREQ</name> + <position>31</position> + </field> + <field> + <name>DMACMDKICK</name> + <position>30</position> + </field> + <field> + <name>DRI_CLK_INPUT</name> + <position>29</position> + </field> + <field> + <name>DRI_DATA_INPUT</name> + <position>28</position> + </field> + <field> + <name>TEST_MODE</name> + <position>27</position> + </field> + <field> + <name>PILOT_REP_RATE</name> + <position>26</position> + <enum> + <name>8_AT_4MHZ</name> + <value>0x0</value> + </enum> + <enum> + <name>12_AT_6MHZ</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SPARE</name> + <position>18</position> + <width>8</width> + </field> + <field> + <name>FRAME</name> + <position>0</position> + <width>18</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG1</name> + <instance> + <name>DEBUG1</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>INVERT_PILOT</name> + <position>31</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>INVERTED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>INVERT_ATTENTION</name> + <position>30</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>INVERTED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>INVERT_DRI_DATA</name> + <position>29</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>INVERTED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>INVERT_DRI_CLOCK</name> + <position>28</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>INVERTED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>REVERSE_FRAME</name> + <position>27</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>REVERSED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SWIZZLED_FRAME</name> + <position>0</position> + <width>18</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>EMI</name> + <title>External Memory Interface</title> + <desc>External Memory Interface (EMI)</desc> + <instance> + <name>EMI</name> + <address>0x80020000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>CE3_MODE</name> + <position>3</position> + <enum> + <name>STATIC</name> + <value>0x0</value> + </enum> + <enum> + <name>DRAM</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CE2_MODE</name> + <position>2</position> + <enum> + <name>STATIC</name> + <value>0x0</value> + </enum> + <enum> + <name>DRAM</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CE1_MODE</name> + <position>1</position> + <enum> + <name>STATIC</name> + <value>0x0</value> + </enum> + <enum> + <name>DRAM</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CE0_MODE</name> + <position>0</position> + <enum> + <name>STATIC</name> + <value>0x0</value> + </enum> + <enum> + <name>DRAM</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>DRAM_PRESENT</name> + <position>31</position> + </field> + <field> + <name>STATIC_PRESENT</name> + <position>30</position> + </field> + <field> + <name>LARGE_DRAM_ENABLED</name> + <position>29</position> + </field> + <field> + <name>WRITE_BUFFER_DATA</name> + <position>1</position> + <enum> + <name>EMPTY</name> + <value>0x0</value> + </enum> + <enum> + <name>NOT_EMPTY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BUSY</name> + <position>0</position> + <enum> + <name>NOT_BUSY</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>STATIC_STATE</name> + <position>16</position> + <width>3</width> + </field> + <field> + <name>DRAM_STATE</name> + <position>0</position> + <width>5</width> + </field> + </register> + </node> + <node> + <name>DRAMSTAT</name> + <instance> + <name>DRAMSTAT</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>SELF_REFRESH_ACK</name> + <position>2</position> + </field> + <field> + <name>BUSY</name> + <position>1</position> + </field> + <field> + <name>READY</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>DRAMCTRL</name> + <instance> + <name>DRAMCTRL</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>EMICLK_DIVIDE</name> + <position>24</position> + <width>3</width> + </field> + <field> + <name>AUTO_EMICLK_GATE</name> + <position>23</position> + </field> + <field> + <name>EMICLK_ENABLE</name> + <position>21</position> + </field> + <field> + <name>EMICLKEN_ENABLE</name> + <position>20</position> + </field> + <field> + <name>DRAM_TYPE</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>PRECHARGE</name> + <position>2</position> + </field> + <field> + <name>SELF_REFRESH</name> + <position>1</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DRAMADDR</name> + <instance> + <name>DRAMADDR</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>MODE</name> + <position>8</position> + <enum> + <name>RBC</name> + <value>0x0</value> + </enum> + <enum> + <name>BRC</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ROW_BITS</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>COLUMN_BITS</name> + <position>0</position> + <width>4</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DRAMMODE</name> + <instance> + <name>DRAMMODE</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>CAS_LATENCY</name> + <position>4</position> + <width>3</width> + <enum> + <name>RESERVED0</name> + <value>0x0</value> + </enum> + <enum> + <name>RESERVED1</name> + <value>0x1</value> + </enum> + <enum> + <name>CAS2</name> + <value>0x2</value> + </enum> + <enum> + <name>CAS3</name> + <value>0x3</value> + </enum> + <enum> + <name>RESERVED4</name> + <value>0x4</value> + </enum> + <enum> + <name>RESERVED5</name> + <value>0x5</value> + </enum> + <enum> + <name>RESERVED6</name> + <value>0x6</value> + </enum> + <enum> + <name>RESERVED7</name> + <value>0x7</value> + </enum> + </field> + </register> + </node> + <node> + <name>DRAMTIME</name> + <instance> + <name>DRAMTIME</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>TRFC</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>TRC</name> + <position>20</position> + <width>4</width> + </field> + <field> + <name>TRAS</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>TRCD</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>TRP</name> + <position>8</position> + <width>2</width> + </field> + <field> + <name>TXSR</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>REFRESH_COUNTER</name> + <position>0</position> + <width>4</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DRAMTIME2</name> + <instance> + <name>DRAMTIME2</name> + <address>0xd0</address> + </instance> + <register> + <field> + <name>PRECHARGE_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STATICCTRL</name> + <instance> + <name>STATICCTRL</name> + <address>0x100</address> + </instance> + <register> + <field> + <name>MEM_WIDTH</name> + <position>2</position> + </field> + <field> + <name>WRITE_PROTECT</name> + <position>1</position> + </field> + <field> + <name>RESET_OUT</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STATICTIME</name> + <instance> + <name>STATICTIME</name> + <address>0x110</address> + </instance> + <register> + <field> + <name>THZ</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>TDH</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>TDS</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>TAS</name> + <position>0</position> + <width>4</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>GPMI</name> + <title>General Purpose Media Interface</title> + <desc>General Purpose Media Interface</desc> + <instance> + <name>GPMI</name> + <address>0x8000c000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>RESET</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_CLKS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RUN</name> + <position>29</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DEV_IRQ_EN</name> + <position>28</position> + </field> + <field> + <name>TIMEOUT_IRQ_EN</name> + <position>27</position> + </field> + <field> + <name>UDMA</name> + <position>26</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>COMMAND_MODE</name> + <position>24</position> + <width>2</width> + <enum> + <name>WRITE</name> + <value>0x0</value> + </enum> + <enum> + <name>READ</name> + <value>0x1</value> + </enum> + <enum> + <name>READ_AND_COMPARE</name> + <value>0x2</value> + </enum> + <enum> + <name>WAIT_FOR_READY</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>WORD_LENGTH</name> + <position>23</position> + <enum> + <name>16_BIT</name> + <value>0x0</value> + </enum> + <enum> + <name>8_BIT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LOCK_CS</name> + <position>22</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CS</name> + <position>20</position> + <width>2</width> + </field> + <field> + <name>ADDRESS</name> + <position>17</position> + <width>3</width> + <enum> + <name>NAND_DATA</name> + <value>0x0</value> + </enum> + <enum> + <name>NAND_CLE</name> + <value>0x1</value> + </enum> + <enum> + <name>NAND_ALE</name> + <value>0x2</value> + </enum> + </field> + <field> + <name>ADDRESS_INCREMENT</name> + <position>16</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>COMPARE</name> + <instance> + <name>COMPARE</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>MASK</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>REFERENCE</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DSAMPLE_TIME</name> + <position>12</position> + <width>2</width> + </field> + <field> + <name>DEV_IRQ</name> + <position>10</position> + </field> + <field> + <name>TIMEOUT_IRQ</name> + <position>9</position> + </field> + <field> + <name>BURST_EN</name> + <position>8</position> + </field> + <field> + <name>ABORT_WAIT_FOR_READY3</name> + <position>7</position> + </field> + <field> + <name>ABORT_WAIT_FOR_READY2</name> + <position>6</position> + </field> + <field> + <name>ABORT_WAIT_FOR_READY1</name> + <position>5</position> + </field> + <field> + <name>ABORT_WAIT_FOR_READY0</name> + <position>4</position> + </field> + <field> + <name>DEV_RESET</name> + <position>3</position> + <enum> + <name>ENABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>DISABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ATA_IRQRDY_POLARITY</name> + <position>2</position> + <enum> + <name>ACTIVELOW</name> + <value>0x0</value> + </enum> + <enum> + <name>ACTIVEHIGH</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CAMERA_MODE</name> + <position>1</position> + </field> + <field> + <name>GPMI_MODE</name> + <position>0</position> + <enum> + <name>NAND</name> + <value>0x0</value> + </enum> + <enum> + <name>ATA</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMING0</name> + <instance> + <name>TIMING0</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>ADDRESS_SETUP</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>DATA_HOLD</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>DATA_SETUP</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>TIMING1</name> + <instance> + <name>TIMING1</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>DEVICE_BUSY_TIMEOUT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>ATA_READY_TIMEOUT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>TIMING2</name> + <instance> + <name>TIMING2</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>UDMA_TRP</name> + <position>24</position> + <width>8</width> + </field> + <field> + <name>UDMA_ENV</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>UDMA_HOLD</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>UDMA_SETUP</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>PRESENT</name> + <position>31</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RDY_TIMEOUT</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>ATA_IRQ</name> + <position>7</position> + </field> + <field> + <name>FIFO_EMPTY</name> + <position>5</position> + <enum> + <name>NOT_EMPTY</name> + <value>0x0</value> + </enum> + <enum> + <name>EMPTY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FIFO_FULL</name> + <position>4</position> + <enum> + <name>NOT_FULL</name> + <value>0x0</value> + </enum> + <enum> + <name>FULL</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DEV3_ERROR</name> + <position>3</position> + </field> + <field> + <name>DEV2_ERROR</name> + <position>2</position> + </field> + <field> + <name>DEV1_ERROR</name> + <position>1</position> + </field> + <field> + <name>DEV0_ERROR</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>READY3</name> + <position>31</position> + </field> + <field> + <name>READY2</name> + <position>30</position> + </field> + <field> + <name>READY1</name> + <position>29</position> + </field> + <field> + <name>READY0</name> + <position>28</position> + </field> + <field> + <name>WAIT_FOR_READY_END3</name> + <position>27</position> + </field> + <field> + <name>WAIT_FOR_READY_END2</name> + <position>26</position> + </field> + <field> + <name>WAIT_FOR_READY_END1</name> + <position>25</position> + </field> + <field> + <name>WAIT_FOR_READY_END0</name> + <position>24</position> + </field> + <field> + <name>SENSE3</name> + <position>23</position> + </field> + <field> + <name>SENSE2</name> + <position>22</position> + </field> + <field> + <name>SENSE1</name> + <position>21</position> + </field> + <field> + <name>SENSE0</name> + <position>20</position> + </field> + <field> + <name>DMAREQ3</name> + <position>19</position> + </field> + <field> + <name>DMAREQ2</name> + <position>18</position> + </field> + <field> + <name>DMAREQ1</name> + <position>17</position> + </field> + <field> + <name>DMAREQ0</name> + <position>16</position> + </field> + <field> + <name>CMD_END</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>UDMA_STATE</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>BUSY</name> + <position>7</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PIN_STATE</name> + <position>4</position> + <width>3</width> + <enum> + <name>PSM_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>PSM_BYTCNT</name> + <value>0x1</value> + </enum> + <enum> + <name>PSM_ADDR</name> + <value>0x2</value> + </enum> + <enum> + <name>PSM_STALL</name> + <value>0x3</value> + </enum> + <enum> + <name>PSM_STROBE</name> + <value>0x4</value> + </enum> + <enum> + <name>PSM_ATARDY</name> + <value>0x5</value> + </enum> + <enum> + <name>PSM_DHOLD</name> + <value>0x6</value> + </enum> + <enum> + <name>PSM_DONE</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>MAIN_STATE</name> + <position>0</position> + <width>4</width> + <enum> + <name>MSM_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>MSM_BYTCNT</name> + <value>0x1</value> + </enum> + <enum> + <name>MSM_WAITFE</name> + <value>0x2</value> + </enum> + <enum> + <name>MSM_WAITFR</name> + <value>0x3</value> + </enum> + <enum> + <name>MSM_DMAREQ</name> + <value>0x4</value> + </enum> + <enum> + <name>MSM_DMAACK</name> + <value>0x5</value> + </enum> + <enum> + <name>MSM_WAITFF</name> + <value>0x6</value> + </enum> + <enum> + <name>MSM_LDFIFO</name> + <value>0x7</value> + </enum> + <enum> + <name>MSM_LDDMAR</name> + <value>0x8</value> + </enum> + <enum> + <name>MSM_RDCMP</name> + <value>0x9</value> + </enum> + <enum> + <name>MSM_DONE</name> + <value>0xa</value> + </enum> + </field> + </register> + </node> + </node> + <node> + <name>I2C</name> + <title>I2C Interface</title> + <desc>I2C Interface</desc> + <instance> + <name>I2C</name> + <address>0x80058000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>RESET</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_CLKS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RUN</name> + <position>29</position> + <enum> + <name>HALT</name> + <value>0x0</value> + </enum> + <enum> + <name>RUN</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRE_ACK</name> + <position>27</position> + </field> + <field> + <name>ACKNOWLEDGE</name> + <position>26</position> + <enum> + <name>SNAK</name> + <value>0x0</value> + </enum> + <enum> + <name>ACK</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SEND_NAK_ON_LAST</name> + <position>25</position> + <enum> + <name>ACK_IT</name> + <value>0x0</value> + </enum> + <enum> + <name>NAK_IT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PIO_MODE</name> + <position>24</position> + </field> + <field> + <name>MULTI_MASTER</name> + <position>23</position> + <enum> + <name>SINGLE</name> + <value>0x0</value> + </enum> + <enum> + <name>MULTIPLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLOCK_HELD</name> + <position>22</position> + <enum> + <name>RELEASE</name> + <value>0x0</value> + </enum> + <enum> + <name>HELD_LOW</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RETAIN_CLOCK</name> + <position>21</position> + <enum> + <name>RELEASE</name> + <value>0x0</value> + </enum> + <enum> + <name>HOLD_LOW</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>POST_SEND_STOP</name> + <position>20</position> + <enum> + <name>NO_STOP</name> + <value>0x0</value> + </enum> + <enum> + <name>SEND_STOP</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRE_SEND_START</name> + <position>19</position> + <enum> + <name>NO_START</name> + <value>0x0</value> + </enum> + <enum> + <name>SEND_START</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_ADDRESS_ENABLE</name> + <position>18</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MASTER_MODE</name> + <position>17</position> + <enum> + <name>SLAVE</name> + <value>0x0</value> + </enum> + <enum> + <name>MASTER</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DIRECTION</name> + <position>16</position> + <enum> + <name>RECEIVE</name> + <value>0x0</value> + </enum> + <enum> + <name>TRANSMIT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMING0</name> + <instance> + <name>TIMING0</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>HIGH_COUNT</name> + <position>16</position> + <width>10</width> + </field> + <field> + <name>RCV_COUNT</name> + <position>0</position> + <width>10</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMING1</name> + <instance> + <name>TIMING1</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>LOW_COUNT</name> + <position>16</position> + <width>10</width> + </field> + <field> + <name>XMIT_COUNT</name> + <position>0</position> + <width>10</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMING2</name> + <instance> + <name>TIMING2</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>BUS_FREE</name> + <position>16</position> + <width>10</width> + </field> + <field> + <name>LEADIN_COUNT</name> + <position>0</position> + <width>10</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>BCAST_SLAVE_EN</name> + <position>24</position> + <enum> + <name>NO_BCAST</name> + <value>0x0</value> + </enum> + <enum> + <name>WATCH_BCAST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_ADDRESS_BYTE</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>BUS_FREE_IRQ_EN</name> + <position>15</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DATA_ENGINE_CMPLT_IRQ_EN</name> + <position>14</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>NO_SLAVE_ACK_IRQ_EN</name> + <position>13</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>OVERSIZE_XFER_TERM_IRQ_EN</name> + <position>12</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>EARLY_TERM_IRQ_EN</name> + <position>11</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MASTER_LOSS_IRQ_EN</name> + <position>10</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_STOP_IRQ_EN</name> + <position>9</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_IRQ_EN</name> + <position>8</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BUS_FREE_IRQ</name> + <position>7</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DATA_ENGINE_CMPLT_IRQ</name> + <position>6</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>NO_SLAVE_ACK_IRQ</name> + <position>5</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>OVERSIZE_XFER_TERM_IRQ</name> + <position>4</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>EARLY_TERM_IRQ</name> + <position>3</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MASTER_LOSS_IRQ</name> + <position>2</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_STOP_IRQ</name> + <position>1</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_IRQ</name> + <position>0</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>MASTER_PRESENT</name> + <position>31</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_PRESENT</name> + <position>30</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ANY_ENABLED_IRQ</name> + <position>29</position> + <enum> + <name>NO_REQUESTS</name> + <value>0x0</value> + </enum> + <enum> + <name>AT_LEAST_ONE_REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RCVD_SLAVE_ADDR</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>SLAVE_ADDR_EQ_ZERO</name> + <position>15</position> + <enum> + <name>ZERO_NOT_MATCHED</name> + <value>0x0</value> + </enum> + <enum> + <name>WAS_ZERO</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_FOUND</name> + <position>14</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>WAITING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_SEARCHING</name> + <position>13</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ACTIVE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DATA_ENGINE_DMA_WAIT</name> + <position>12</position> + <enum> + <name>CONTINUE</name> + <value>0x0</value> + </enum> + <enum> + <name>WAITING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BUS_BUSY</name> + <position>11</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLK_GEN_BUSY</name> + <position>10</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DATA_ENGINE_BUSY</name> + <position>9</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_BUSY</name> + <position>8</position> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BUS_FREE_IRQ_SUMMARY</name> + <position>7</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DATA_ENGINE_CMPLT_IRQ_SUMMARY</name> + <position>6</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>NO_SLAVE_ACK_IRQ_SUMMARY</name> + <position>5</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>OVERSIZE_XFER_TERM_IRQ_SUMMARY</name> + <position>4</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>EARLY_TERM_IRQ_SUMMARY</name> + <position>3</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MASTER_LOSS_IRQ_SUMMARY</name> + <position>2</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_STOP_IRQ_SUMMARY</name> + <position>1</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SLAVE_IRQ_SUMMARY</name> + <position>0</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>DEBUG0</name> + <instance> + <name>DEBUG0</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>DMAREQ</name> + <position>31</position> + </field> + <field> + <name>DMAENDCMD</name> + <position>30</position> + </field> + <field> + <name>DMAKICK</name> + <position>29</position> + </field> + <field> + <name>TBD</name> + <position>26</position> + <width>3</width> + </field> + <field> + <name>DMA_STATE</name> + <position>16</position> + <width>10</width> + </field> + <field> + <name>START_TOGGLE</name> + <position>15</position> + </field> + <field> + <name>STOP_TOGGLE</name> + <position>14</position> + </field> + <field> + <name>GRAB_TOGGLE</name> + <position>13</position> + </field> + <field> + <name>CHANGE_TOGGLE</name> + <position>12</position> + </field> + <field> + <name>TESTMODE</name> + <position>11</position> + </field> + <field> + <name>SLAVE_HOLD_CLK</name> + <position>10</position> + </field> + <field> + <name>SLAVE_STATE</name> + <position>0</position> + <width>10</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG1</name> + <instance> + <name>DEBUG1</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>I2C_CLK_IN</name> + <position>31</position> + </field> + <field> + <name>I2C_DATA_IN</name> + <position>30</position> + </field> + <field> + <name>DMA_BYTE_ENABLES</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>CLK_GEN_STATE</name> + <position>16</position> + <width>7</width> + </field> + <field> + <name>LST_MODE</name> + <position>9</position> + <width>2</width> + <enum> + <name>BCAST</name> + <value>0x0</value> + </enum> + <enum> + <name>MY_WRITE</name> + <value>0x1</value> + </enum> + <enum> + <name>MY_READ</name> + <value>0x2</value> + </enum> + <enum> + <name>NOT_ME</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>LOCAL_SLAVE_TEST</name> + <position>8</position> + </field> + <field> + <name>FORCE_CLK_ON</name> + <position>5</position> + </field> + <field> + <name>FORCE_CLK_IDLE</name> + <position>4</position> + </field> + <field> + <name>FORCE_ARB_LOSS</name> + <position>3</position> + </field> + <field> + <name>FORCE_RCV_ACK</name> + <position>2</position> + </field> + <field> + <name>FORCE_I2C_DATA_OE</name> + <position>1</position> + </field> + <field> + <name>FORCE_I2C_CLK_OE</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>HWECC</name> + <title>Hardware ECC</title> + <desc>Hardware ECC Accelerator</desc> + <instance> + <name>HWECC</name> + <address>0x80008000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>NUM_SYMBOLS</name> + <position>16</position> + <width>9</width> + </field> + <field> + <name>DMAWAIT_COUNT</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>BYTE_ENABLE</name> + <position>6</position> + </field> + <field> + <name>ECC_SEL</name> + <position>5</position> + </field> + <field> + <name>ENC_SEL</name> + <position>4</position> + </field> + <field> + <name>UNCORR_IRQ</name> + <position>2</position> + </field> + <field> + <name>UNCORR_IRQ_EN</name> + <position>1</position> + </field> + <field> + <name>RUN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>RSDEC_PRESENT</name> + <position>31</position> + </field> + <field> + <name>RSENC_PRESENT</name> + <position>30</position> + </field> + <field> + <name>SSDEC_PRESENT</name> + <position>29</position> + </field> + <field> + <name>SSENC_PRESENT</name> + <position>28</position> + </field> + </register> + </node> + <node> + <name>DEBUG0</name> + <instance> + <name>DEBUG0</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DMA_PENDCMD</name> + <position>29</position> + </field> + <field> + <name>DMA_PREQ</name> + <position>28</position> + </field> + <field> + <name>SYMBOL_STATE</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>CTRL_STATE</name> + <position>16</position> + <width>6</width> + </field> + <field> + <name>ECC_EXCEPTION</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>NUM_BIT_ERRORS</name> + <position>4</position> + <width>6</width> + </field> + <field> + <name>NUM_SYMBOL_ERRORS</name> + <position>0</position> + <width>3</width> + </field> + </register> + </node> + <node> + <name>DEBUG1</name> + <instance> + <name>DEBUG1</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>SYNDROME2</name> + <position>18</position> + <width>9</width> + </field> + <field> + <name>SYNDROME1</name> + <position>9</position> + <width>9</width> + </field> + <field> + <name>SYNDROME0</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>DEBUG2</name> + <instance> + <name>DEBUG2</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>SYNDROME5</name> + <position>18</position> + <width>9</width> + </field> + <field> + <name>SYNDROME4</name> + <position>9</position> + <width>9</width> + </field> + <field> + <name>SYNDROME3</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>DEBUG3</name> + <instance> + <name>DEBUG3</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>OMEGA0</name> + <position>18</position> + <width>9</width> + </field> + <field> + <name>SYNDROME7</name> + <position>9</position> + <width>9</width> + </field> + <field> + <name>SYNDROME6</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>DEBUG4</name> + <instance> + <name>DEBUG4</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>OMEGA3</name> + <position>18</position> + <width>9</width> + </field> + <field> + <name>OMEGA2</name> + <position>9</position> + <width>9</width> + </field> + <field> + <name>OMEGA1</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>DEBUG5</name> + <instance> + <name>DEBUG5</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>LAMBDA2</name> + <position>18</position> + <width>9</width> + </field> + <field> + <name>LAMBDA1</name> + <position>9</position> + <width>9</width> + </field> + <field> + <name>LAMBDA0</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>DEBUG6</name> + <instance> + <name>DEBUG6</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>LAMBDA4</name> + <position>9</position> + <width>9</width> + </field> + <field> + <name>LAMBDA3</name> + <position>0</position> + <width>9</width> + </field> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>ICOLL</name> + <title>Interrupt Collector</title> + <desc>Interrupt Collector</desc> + <instance> + <name>ICOLL</name> + <address>0x80000000</address> + </instance> + <node> + <name>VECTOR</name> + <instance> + <name>VECTOR</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>IRQVECTOR</name> + <position>2</position> + <width>30</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>LEVELACK</name> + <instance> + <name>LEVELACK</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>IRQLEVELACK</name> + <position>0</position> + <width>4</width> + <enum> + <name>LEVEL0</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x4</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x8</value> + </enum> + </field> + </register> + </node> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>IN_RESET</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_CLOCKS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE2FIQ35</name> + <position>27</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE2FIQ34</name> + <position>26</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE2FIQ33</name> + <position>25</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE2FIQ32</name> + <position>24</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BYPASS_FSM</name> + <position>20</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>BYPASS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>NO_NESTING</name> + <position>19</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_NEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ARM_RSE_MODE</name> + <position>18</position> + <enum> + <name>MUST_WRITE</name> + <value>0x0</value> + </enum> + <enum> + <name>READ_SIDE_EFFECT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FIQ_FINAL_ENABLE</name> + <position>17</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>IRQ_FINAL_ENABLE</name> + <position>16</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>VECTOR_NUMBER</name> + <position>0</position> + <width>6</width> + </field> + </register> + </node> + <node> + <name>VBASE</name> + <instance> + <name>VBASE</name> + <address>0x160</address> + </instance> + <register> + <field> + <name>TABLE_ADDRESS</name> + <position>2</position> + <width>30</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x170</address> + </instance> + <register> + <field> + <name>INSERVICE</name> + <position>28</position> + <width>4</width> + <enum> + <name>LEVEL0</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x4</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x8</value> + </enum> + </field> + <field> + <name>LEVEL_REQUESTS</name> + <position>24</position> + <width>4</width> + <enum> + <name>LEVEL0</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x4</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x8</value> + </enum> + </field> + <field> + <name>REQUESTS_BY_LEVEL</name> + <position>20</position> + <width>4</width> + <enum> + <name>LEVEL0</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x4</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x8</value> + </enum> + </field> + <field> + <name>FIQ</name> + <position>17</position> + <enum> + <name>NO_FIQ_REQUESTED</name> + <value>0x0</value> + </enum> + <enum> + <name>FIQ_REQUESTED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>IRQ</name> + <position>16</position> + <enum> + <name>NO_IRQ_REQUESTED</name> + <value>0x0</value> + </enum> + <enum> + <name>IRQ_REQUESTED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>VECTOR_FSM</name> + <position>0</position> + <width>10</width> + <enum> + <name>FSM_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>FSM_MULTICYCLE1</name> + <value>0x1</value> + </enum> + <enum> + <name>FSM_MULTICYCLE2</name> + <value>0x2</value> + </enum> + <enum> + <name>FSM_PENDING</name> + <value>0x4</value> + </enum> + <enum> + <name>FSM_MULTICYCLE3</name> + <value>0x8</value> + </enum> + <enum> + <name>FSM_MULTICYCLE4</name> + <value>0x10</value> + </enum> + <enum> + <name>FSM_ISR_RUNNING1</name> + <value>0x20</value> + </enum> + <enum> + <name>FSM_ISR_RUNNING2</name> + <value>0x40</value> + </enum> + <enum> + <name>FSM_ISR_RUNNING3</name> + <value>0x80</value> + </enum> + <enum> + <name>FSM_MULTICYCLE5</name> + <value>0x100</value> + </enum> + <enum> + <name>FSM_MULTICYCLE6</name> + <value>0x200</value> + </enum> + </field> + </register> + </node> + <node> + <name>DBGFLAG</name> + <instance> + <name>DBGFLAG</name> + <address>0x1a0</address> + </instance> + <register> + <field> + <name>FLAG</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DBGREQUESTn</name> + <instance> + <name>DBGREQUESTn</name> + <range> + <first>0</first> + <count>2</count> + <base>0x1b0</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>RAWn</name> + <instance> + <name>RAWn</name> + <range> + <first>0</first> + <count>2</count> + <base>0x40</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>RAW_IRQS</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>DBGREADn</name> + <instance> + <name>DBGREADn</name> + <range> + <first>0</first> + <count>2</count> + <base>0x180</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>VALUE</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>PRIORITYn</name> + <instance> + <name>PRIORITYn</name> + <range> + <first>0</first> + <count>16</count> + <base>0x60</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>SOFTIRQ3</name> + <position>27</position> + <enum> + <name>NO_INTERRUPT</name> + <value>0x0</value> + </enum> + <enum> + <name>FORCE_INTERRUPT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE3</name> + <position>26</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRIORITY3</name> + <position>24</position> + <width>2</width> + <enum> + <name>LEVEL0</name> + <value>0x0</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SOFTIRQ2</name> + <position>19</position> + <enum> + <name>NO_INTERRUPT</name> + <value>0x0</value> + </enum> + <enum> + <name>FORCE_INTERRUPT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE2</name> + <position>18</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRIORITY2</name> + <position>16</position> + <width>2</width> + <enum> + <name>LEVEL0</name> + <value>0x0</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SOFTIRQ1</name> + <position>11</position> + <enum> + <name>NO_INTERRUPT</name> + <value>0x0</value> + </enum> + <enum> + <name>FORCE_INTERRUPT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE1</name> + <position>10</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRIORITY1</name> + <position>8</position> + <width>2</width> + <enum> + <name>LEVEL0</name> + <value>0x0</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SOFTIRQ0</name> + <position>3</position> + <enum> + <name>NO_INTERRUPT</name> + <value>0x0</value> + </enum> + <enum> + <name>FORCE_INTERRUPT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>ENABLE0</name> + <position>2</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRIORITY0</name> + <position>0</position> + <width>2</width> + <enum> + <name>LEVEL0</name> + <value>0x0</value> + </enum> + <enum> + <name>LEVEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>LEVEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>LEVEL3</name> + <value>0x3</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>IR</name> + <title>IrDA</title> + <desc>IrDA Controller</desc> + <instance> + <name>IR</name> + <address>0x80078000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>RESET</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>MTA</name> + <position>24</position> + <width>3</width> + <enum> + <name>MTA_10MS</name> + <value>0x0</value> + </enum> + <enum> + <name>MTA_5MS</name> + <value>0x1</value> + </enum> + <enum> + <name>MTA_1MS</name> + <value>0x2</value> + </enum> + <enum> + <name>MTA_500US</name> + <value>0x3</value> + </enum> + <enum> + <name>MTA_100US</name> + <value>0x4</value> + </enum> + <enum> + <name>MTA_50US</name> + <value>0x5</value> + </enum> + <enum> + <name>MTA_10US</name> + <value>0x6</value> + </enum> + <enum> + <name>MTA_0</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>MODE</name> + <position>22</position> + <width>2</width> + <enum> + <name>SIR</name> + <value>0x0</value> + </enum> + <enum> + <name>MIR</name> + <value>0x1</value> + </enum> + <enum> + <name>FIR</name> + <value>0x2</value> + </enum> + <enum> + <name>VFIR</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SPEED</name> + <position>19</position> + <width>3</width> + <enum> + <name>SPD000</name> + <value>0x0</value> + </enum> + <enum> + <name>SPD001</name> + <value>0x1</value> + </enum> + <enum> + <name>SPD010</name> + <value>0x2</value> + </enum> + <enum> + <name>SPD011</name> + <value>0x3</value> + </enum> + <enum> + <name>SPD100</name> + <value>0x4</value> + </enum> + <enum> + <name>SPD101</name> + <value>0x5</value> + </enum> + </field> + <field> + <name>TC_TIME_DIV</name> + <position>8</position> + <width>6</width> + </field> + <field> + <name>TC_TYPE</name> + <position>7</position> + </field> + <field> + <name>SIR_GAP</name> + <position>4</position> + <width>3</width> + <enum> + <name>GAP_10K</name> + <value>0x0</value> + </enum> + <enum> + <name>GAP_5K</name> + <value>0x1</value> + </enum> + <enum> + <name>GAP_1K</name> + <value>0x2</value> + </enum> + <enum> + <name>GAP_500</name> + <value>0x3</value> + </enum> + <enum> + <name>GAP_100</name> + <value>0x4</value> + </enum> + <enum> + <name>GAP_50</name> + <value>0x5</value> + </enum> + <enum> + <name>GAP_10</name> + <value>0x6</value> + </enum> + <enum> + <name>GAP_0</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>SIPEN</name> + <position>3</position> + </field> + <field> + <name>TCEN</name> + <position>2</position> + </field> + <field> + <name>TXEN</name> + <position>1</position> + </field> + <field> + <name>RXEN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TXDMA</name> + <instance> + <name>TXDMA</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>RUN</name> + <position>31</position> + </field> + <field> + <name>EMPTY</name> + <position>29</position> + </field> + <field> + <name>INT</name> + <position>28</position> + </field> + <field> + <name>CHANGE</name> + <position>27</position> + </field> + <field> + <name>NEW_MTA</name> + <position>24</position> + <width>3</width> + </field> + <field> + <name>NEW_MODE</name> + <position>22</position> + <width>2</width> + </field> + <field> + <name>NEW_SPEED</name> + <position>19</position> + <width>3</width> + </field> + <field> + <name>BOF_TYPE</name> + <position>18</position> + </field> + <field> + <name>XBOFS</name> + <position>12</position> + <width>6</width> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>12</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>RXDMA</name> + <instance> + <name>RXDMA</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>RUN</name> + <position>31</position> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>10</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DBGCTRL</name> + <instance> + <name>DBGCTRL</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>VFIRSWZ</name> + <position>12</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>SWAP</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RXFRMOFF</name> + <position>11</position> + </field> + <field> + <name>RXCRCOFF</name> + <position>10</position> + </field> + <field> + <name>RXINVERT</name> + <position>9</position> + </field> + <field> + <name>TXFRMOFF</name> + <position>8</position> + </field> + <field> + <name>TXCRCOFF</name> + <position>7</position> + </field> + <field> + <name>TXINVERT</name> + <position>6</position> + </field> + <field> + <name>INTLOOPBACK</name> + <position>5</position> + </field> + <field> + <name>DUPLEX</name> + <position>4</position> + </field> + <field> + <name>MIO_RX</name> + <position>3</position> + </field> + <field> + <name>MIO_TX</name> + <position>2</position> + </field> + <field> + <name>MIO_SCLK</name> + <position>1</position> + </field> + <field> + <name>MIO_EN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>INTR</name> + <instance> + <name>INTR</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>RXABORT_IRQ_EN</name> + <position>22</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SPEED_IRQ_EN</name> + <position>21</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RXOF_IRQ_EN</name> + <position>20</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TXUF_IRQ_EN</name> + <position>19</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TC_IRQ_EN</name> + <position>18</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RX_IRQ_EN</name> + <position>17</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TX_IRQ_EN</name> + <position>16</position> + <enum> + <name>DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RXABORT_IRQ</name> + <position>6</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SPEED_IRQ</name> + <position>5</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RXOF_IRQ</name> + <position>4</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TXUF_IRQ</name> + <position>3</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TC_IRQ</name> + <position>2</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RX_IRQ</name> + <position>1</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TX_IRQ</name> + <position>0</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>PRESENT</name> + <position>31</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MODE_ALLOWED</name> + <position>29</position> + <width>2</width> + <enum> + <name>VFIR</name> + <value>0x0</value> + </enum> + <enum> + <name>FIR</name> + <value>0x1</value> + </enum> + <enum> + <name>MIR</name> + <value>0x2</value> + </enum> + <enum> + <name>SIR</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>ANY_IRQ</name> + <position>28</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RXABORT_SUMMARY</name> + <position>22</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SPEED_SUMMARY</name> + <position>21</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RXOF_SUMMARY</name> + <position>20</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TXUF_SUMMARY</name> + <position>19</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TC_SUMMARY</name> + <position>18</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RX_SUMMARY</name> + <position>17</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TX_SUMMARY</name> + <position>16</position> + <enum> + <name>NO_REQUEST</name> + <value>0x0</value> + </enum> + <enum> + <name>REQUEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MEDIA_BUSY</name> + <position>2</position> + </field> + <field> + <name>RX_ACTIVE</name> + <position>1</position> + </field> + <field> + <name>TX_ACTIVE</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>TCCTRL</name> + <instance> + <name>TCCTRL</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>INIT</name> + <position>31</position> + </field> + <field> + <name>GO</name> + <position>30</position> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>TEMIC</name> + <position>24</position> + <enum> + <name>LOW</name> + <value>0x0</value> + </enum> + <enum> + <name>HIGH</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>EXT_DATA</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>DATA</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>ADDR</name> + <position>5</position> + <width>3</width> + </field> + <field> + <name>INDX</name> + <position>1</position> + <width>4</width> + </field> + <field> + <name>C</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>SI_READ</name> + <instance> + <name>SI_READ</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>ABORT</name> + <position>8</position> + </field> + <field> + <name>DATA</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>TXDMAKICK</name> + <position>5</position> + </field> + <field> + <name>RXDMAKICK</name> + <position>4</position> + </field> + <field> + <name>TXDMAEND</name> + <position>3</position> + </field> + <field> + <name>RXDMAEND</name> + <position>2</position> + </field> + <field> + <name>TXDMAREQ</name> + <position>1</position> + </field> + <field> + <name>RXDMAREQ</name> + <position>0</position> + </field> + </register> + </node> + </node> + <node> + <name>LCDIF</name> + <title>LCD Interface</title> + <desc>LCD Interface (LCDIF)</desc> + <instance> + <name>LCDIF</name> + <address>0x80060000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>PRESENT</name> + <position>29</position> + </field> + <field> + <name>BUSY_ENABLE</name> + <position>25</position> + <enum> + <name>BUSY_DISABLED</name> + <value>0x0</value> + </enum> + <enum> + <name>BUSY_ENABLED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FIFO_STATUS</name> + <position>24</position> + <enum> + <name>FIFO_FULL</name> + <value>0x0</value> + </enum> + <enum> + <name>FIFO_OK</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DMA_REQ</name> + <position>23</position> + </field> + <field> + <name>DATA_SWIZZLE</name> + <position>21</position> + <width>2</width> + <enum> + <name>NO_SWAP</name> + <value>0x0</value> + </enum> + <enum> + <name>LITTLE_ENDIAN</name> + <value>0x0</value> + </enum> + <enum> + <name>BIG_ENDIAN_SWAP</name> + <value>0x1</value> + </enum> + <enum> + <name>SWAP_ALL_BYTES</name> + <value>0x1</value> + </enum> + <enum> + <name>HWD_SWAP</name> + <value>0x2</value> + </enum> + <enum> + <name>HWD_BYTE_SWAP</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>RESET</name> + <position>20</position> + <enum> + <name>LCDRESET_LOW</name> + <value>0x0</value> + </enum> + <enum> + <name>LCDRESET_HIGH</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>MODE86</name> + <position>19</position> + <enum> + <name>8080_MODE</name> + <value>0x0</value> + </enum> + <enum> + <name>6800_MODE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DATA_SELECT</name> + <position>18</position> + <enum> + <name>CMD_MODE</name> + <value>0x0</value> + </enum> + <enum> + <name>DATA_MODE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>WORD_LENGTH</name> + <position>17</position> + <enum> + <name>16_BIT</name> + <value>0x0</value> + </enum> + <enum> + <name>8_BIT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>RUN</name> + <position>16</position> + </field> + <field> + <name>COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMING</name> + <instance> + <name>TIMING</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>CMD_HOLD</name> + <position>24</position> + <width>8</width> + </field> + <field> + <name>CMD_SETUP</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>DATA_HOLD</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>DATA_SETUP</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DATA_THREE</name> + <position>24</position> + <width>8</width> + </field> + <field> + <name>DATA_TWO</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>DATA_ONE</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>DATA_ZERO</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>BUSY</name> + <position>27</position> + </field> + <field> + <name>LAST_SUBWORD</name> + <position>26</position> + </field> + <field> + <name>SUBWORD_POSITION</name> + <position>24</position> + <width>2</width> + </field> + <field> + <name>EMPTY_WORD</name> + <position>23</position> + </field> + <field> + <name>STATE</name> + <position>16</position> + <width>7</width> + </field> + <field> + <name>DATA_COUNT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + </node> + <node> + <name>LRADC</name> + <title>Low Resolution ADC</title> + <desc>Low-Resolution ADC and Touch-Screen Interface</desc> + <instance> + <name>LRADC</name> + <address>0x80050000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>ONCHIP_GROUNDREF</name> + <position>21</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TOUCH_DETECT_ENABLE</name> + <position>20</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>YMINUS_ENABLE</name> + <position>19</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>XMINUS_ENABLE</name> + <position>18</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>YPLUS_ENABLE</name> + <position>17</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>XPLUS_ENABLE</name> + <position>16</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SCHEDULE</name> + <position>0</position> + <width>8</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>TOUCH_DETECT_IRQ_EN</name> + <position>24</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC7_IRQ_EN</name> + <position>23</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC6_IRQ_EN</name> + <position>22</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC5_IRQ_EN</name> + <position>21</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC4_IRQ_EN</name> + <position>20</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC3_IRQ_EN</name> + <position>19</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC2_IRQ_EN</name> + <position>18</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC1_IRQ_EN</name> + <position>17</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC0_IRQ_EN</name> + <position>16</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TOUCH_DETECT_IRQ</name> + <position>8</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC7_IRQ</name> + <position>7</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC6_IRQ</name> + <position>6</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC5_IRQ</name> + <position>5</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC4_IRQ</name> + <position>4</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC3_IRQ</name> + <position>3</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC2_IRQ</name> + <position>2</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC1_IRQ</name> + <position>1</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>LRADC0_IRQ</name> + <position>0</position> + <enum> + <name>CLEAR</name> + <value>0x0</value> + </enum> + <enum> + <name>PENDING</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL2</name> + <instance> + <name>CTRL2</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DIVIDE_BY_TWO</name> + <position>24</position> + <width>8</width> + </field> + <field> + <name>LRADC6SELECT</name> + <position>20</position> + <width>4</width> + <enum> + <name>CHANNEL0</name> + <value>0x0</value> + </enum> + <enum> + <name>CHANNEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>CHANNEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>CHANNEL3</name> + <value>0x3</value> + </enum> + <enum> + <name>CHANNEL4</name> + <value>0x4</value> + </enum> + <enum> + <name>CHANNEL5</name> + <value>0x5</value> + </enum> + <enum> + <name>CHANNEL6</name> + <value>0x6</value> + </enum> + <enum> + <name>CHANNEL7</name> + <value>0x7</value> + </enum> + <enum> + <name>CHANNEL8</name> + <value>0x8</value> + </enum> + <enum> + <name>CHANNEL9</name> + <value>0x9</value> + </enum> + <enum> + <name>CHANNEL10</name> + <value>0xa</value> + </enum> + <enum> + <name>CHANNEL11</name> + <value>0xb</value> + </enum> + <enum> + <name>CHANNEL12</name> + <value>0xc</value> + </enum> + <enum> + <name>CHANNEL13</name> + <value>0xd</value> + </enum> + <enum> + <name>CHANNEL14</name> + <value>0xe</value> + </enum> + <enum> + <name>CHANNEL15</name> + <value>0xf</value> + </enum> + </field> + <field> + <name>LRADC7SELECT</name> + <position>16</position> + <width>4</width> + <enum> + <name>CHANNEL0</name> + <value>0x0</value> + </enum> + <enum> + <name>CHANNEL1</name> + <value>0x1</value> + </enum> + <enum> + <name>CHANNEL2</name> + <value>0x2</value> + </enum> + <enum> + <name>CHANNEL3</name> + <value>0x3</value> + </enum> + <enum> + <name>CHANNEL4</name> + <value>0x4</value> + </enum> + <enum> + <name>CHANNEL5</name> + <value>0x5</value> + </enum> + <enum> + <name>CHANNEL6</name> + <value>0x6</value> + </enum> + <enum> + <name>CHANNEL7</name> + <value>0x7</value> + </enum> + <enum> + <name>CHANNEL8</name> + <value>0x8</value> + </enum> + <enum> + <name>CHANNEL9</name> + <value>0x9</value> + </enum> + <enum> + <name>CHANNEL10</name> + <value>0xa</value> + </enum> + <enum> + <name>CHANNEL11</name> + <value>0xb</value> + </enum> + <enum> + <name>CHANNEL12</name> + <value>0xc</value> + </enum> + <enum> + <name>CHANNEL13</name> + <value>0xd</value> + </enum> + <enum> + <name>CHANNEL14</name> + <value>0xe</value> + </enum> + <enum> + <name>CHANNEL15</name> + <value>0xf</value> + </enum> + </field> + <field> + <name>TEMP_SENSOR_IENABLE1</name> + <position>9</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TEMP_SENSOR_IENABLE0</name> + <position>8</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TEMP_ISRC1</name> + <position>4</position> + <width>4</width> + <enum> + <name>300</name> + <value>0xf</value> + </enum> + <enum> + <name>280</name> + <value>0xe</value> + </enum> + <enum> + <name>260</name> + <value>0xd</value> + </enum> + <enum> + <name>240</name> + <value>0xc</value> + </enum> + <enum> + <name>220</name> + <value>0xb</value> + </enum> + <enum> + <name>200</name> + <value>0xa</value> + </enum> + <enum> + <name>180</name> + <value>0x9</value> + </enum> + <enum> + <name>160</name> + <value>0x8</value> + </enum> + <enum> + <name>140</name> + <value>0x7</value> + </enum> + <enum> + <name>120</name> + <value>0x6</value> + </enum> + <enum> + <name>100</name> + <value>0x5</value> + </enum> + <enum> + <name>80</name> + <value>0x4</value> + </enum> + <enum> + <name>60</name> + <value>0x3</value> + </enum> + <enum> + <name>40</name> + <value>0x2</value> + </enum> + <enum> + <name>20</name> + <value>0x1</value> + </enum> + <enum> + <name>ZERO</name> + <value>0x0</value> + </enum> + </field> + <field> + <name>TEMP_ISRC0</name> + <position>0</position> + <width>4</width> + <enum> + <name>300</name> + <value>0xf</value> + </enum> + <enum> + <name>280</name> + <value>0xe</value> + </enum> + <enum> + <name>260</name> + <value>0xd</value> + </enum> + <enum> + <name>240</name> + <value>0xc</value> + </enum> + <enum> + <name>220</name> + <value>0xb</value> + </enum> + <enum> + <name>200</name> + <value>0xa</value> + </enum> + <enum> + <name>180</name> + <value>0x9</value> + </enum> + <enum> + <name>160</name> + <value>0x8</value> + </enum> + <enum> + <name>140</name> + <value>0x7</value> + </enum> + <enum> + <name>120</name> + <value>0x6</value> + </enum> + <enum> + <name>100</name> + <value>0x5</value> + </enum> + <enum> + <name>80</name> + <value>0x4</value> + </enum> + <enum> + <name>60</name> + <value>0x3</value> + </enum> + <enum> + <name>40</name> + <value>0x2</value> + </enum> + <enum> + <name>20</name> + <value>0x1</value> + </enum> + <enum> + <name>ZERO</name> + <value>0x0</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL3</name> + <instance> + <name>CTRL3</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>DISCARD</name> + <position>24</position> + <width>2</width> + <enum> + <name>1_SAMPLE</name> + <value>0x1</value> + </enum> + <enum> + <name>2_SAMPLES</name> + <value>0x2</value> + </enum> + <enum> + <name>3_SAMPLES</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>FORCE_ANALOG_PWUP</name> + <position>23</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FORCE_ANALOG_PWDN</name> + <position>22</position> + <enum> + <name>ON</name> + <value>0x0</value> + </enum> + <enum> + <name>OFF</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FORCE_PWD40UA_PWUP</name> + <position>21</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FORCE_PWD40UA_PWDN</name> + <position>20</position> + <enum> + <name>ON</name> + <value>0x0</value> + </enum> + <enum> + <name>OFF</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>VDD_FILTER</name> + <position>16</position> + <width>2</width> + <enum> + <name>0OHMS</name> + <value>0x0</value> + </enum> + <enum> + <name>100OHMS</name> + <value>0x1</value> + </enum> + <enum> + <name>250OHMS</name> + <value>0x2</value> + </enum> + <enum> + <name>5000OHMS</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>ADD_CAP2INPUTS</name> + <position>12</position> + <width>2</width> + <enum> + <name>0PF</name> + <value>0x0</value> + </enum> + <enum> + <name>0_5PF</name> + <value>0x1</value> + </enum> + <enum> + <name>1_0PF</name> + <value>0x2</value> + </enum> + <enum> + <name>2_5PF</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>CYCLE_TIME</name> + <position>8</position> + <width>2</width> + <enum> + <name>6MHZ</name> + <value>0x0</value> + </enum> + <enum> + <name>4MHZ</name> + <value>0x1</value> + </enum> + <enum> + <name>3MHZ</name> + <value>0x2</value> + </enum> + <enum> + <name>2MHZ</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>HIGH_TIME</name> + <position>4</position> + <width>2</width> + <enum> + <name>42NS</name> + <value>0x0</value> + </enum> + <enum> + <name>83NS</name> + <value>0x1</value> + </enum> + <enum> + <name>125NS</name> + <value>0x2</value> + </enum> + <enum> + <name>250NS</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>REMOVE_CFILT</name> + <position>3</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SHORT_RFILT</name> + <position>2</position> + <enum> + <name>OFF</name> + <value>0x0</value> + </enum> + <enum> + <name>ON</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>DELAY_CLOCK</name> + <position>1</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>DELAYED</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>INVERT_CLOCK</name> + <position>0</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>INVERT</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STATUS</name> + <instance> + <name>STATUS</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>TEMP1_PRESENT</name> + <position>26</position> + </field> + <field> + <name>TEMP0_PRESENT</name> + <position>25</position> + </field> + <field> + <name>TOUCH_PANEL_PRESENT</name> + <position>24</position> + </field> + <field> + <name>CHANNEL7_PRESENT</name> + <position>23</position> + </field> + <field> + <name>CHANNEL6_PRESENT</name> + <position>22</position> + </field> + <field> + <name>CHANNEL5_PRESENT</name> + <position>21</position> + </field> + <field> + <name>CHANNEL4_PRESENT</name> + <position>20</position> + </field> + <field> + <name>CHANNEL3_PRESENT</name> + <position>19</position> + </field> + <field> + <name>CHANNEL2_PRESENT</name> + <position>18</position> + </field> + <field> + <name>CHANNEL1_PRESENT</name> + <position>17</position> + </field> + <field> + <name>CHANNEL0_PRESENT</name> + <position>16</position> + </field> + <field> + <name>TOUCH_DETECT_RAW</name> + <position>0</position> + <enum> + <name>OPEN</name> + <value>0x0</value> + </enum> + <enum> + <name>HIT</name> + <value>0x1</value> + </enum> + </field> + </register> + </node> + <node> + <name>DEBUG0</name> + <instance> + <name>DEBUG0</name> + <address>0x110</address> + </instance> + <register> + <field> + <name>READONLY</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>STATE</name> + <position>0</position> + <width>12</width> + </field> + </register> + </node> + <node> + <name>DEBUG1</name> + <instance> + <name>DEBUG1</name> + <address>0x120</address> + </instance> + <register> + <field> + <name>REQUEST</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>TESTMODE_COUNT</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>TESTMODE6</name> + <position>2</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>TEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TESTMODE5</name> + <position>1</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>TEST</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>TESTMODE</name> + <position>0</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>TEST</name> + <value>0x1</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CONVERSION</name> + <instance> + <name>CONVERSION</name> + <address>0x130</address> + </instance> + <register> + <field> + <name>AUTOMATIC</name> + <position>20</position> + <enum> + <name>DISABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>ENABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>SCALE_FACTOR</name> + <position>16</position> + <width>2</width> + <enum> + <name>NIMH</name> + <value>0x0</value> + </enum> + <enum> + <name>DUAL_NIMH</name> + <value>0x1</value> + </enum> + <enum> + <name>LI_ION</name> + <value>0x2</value> + </enum> + <enum> + <name>ALT_LI_ION</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SCALED_BATT_VOLTAGE</name> + <position>0</position> + <width>10</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DELAYn</name> + <instance> + <name>DELAYn</name> + <range> + <first>0</first> + <count>4</count> + <base>0xd0</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>TRIGGER_LRADCS</name> + <position>24</position> + <width>8</width> + </field> + <field> + <name>KICK</name> + <position>20</position> + </field> + <field> + <name>TRIGGER_DELAYS</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>LOOP_COUNT</name> + <position>11</position> + <width>5</width> + </field> + <field> + <name>DELAY</name> + <position>0</position> + <width>11</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CHn</name> + <instance> + <name>CHn</name> + <range> + <first>0</first> + <count>8</count> + <base>0x50</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>TOGGLE</name> + <position>31</position> + </field> + <field> + <name>ACCUMULATE</name> + <position>29</position> + </field> + <field> + <name>NUM_SAMPLES</name> + <position>24</position> + <width>5</width> + </field> + <field> + <name>VALUE</name> + <position>0</position> + <width>18</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>MEMCPY</name> + <title>MEMCPY Interface</title> + <desc>MEMCPY Interface</desc> + <instance> + <name>MEMCPY</name> + <address>0x80014000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>RESET</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + <enum> + <name>RUN</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_CLKS</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>PRESENT</name> + <position>29</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BURST</name> + <position>16</position> + </field> + <field> + <name>XFER_SIZE</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>DST_END_CMD</name> + <position>30</position> + </field> + <field> + <name>DST_KICK</name> + <position>29</position> + </field> + <field> + <name>DST_DMA_REQ</name> + <position>28</position> + </field> + <field> + <name>SRC_KICK</name> + <position>25</position> + </field> + <field> + <name>SRC_DMA_REQ</name> + <position>24</position> + </field> + <field> + <name>WRITE_STATE</name> + <position>2</position> + <width>2</width> + </field> + <field> + <name>READ_STATE</name> + <position>0</position> + <width>2</width> + </field> + </register> + </node> + </node> + <node> + <name>PINCTRL</name> + <title>Pin Control</title> + <desc>Pin Control and GPIO</desc> + <instance> + <name>PINCTRL</name> + <address>0x80018000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>PRESENT3</name> + <position>29</position> + </field> + <field> + <name>PRESENT2</name> + <position>28</position> + </field> + <field> + <name>PRESENT1</name> + <position>27</position> + </field> + <field> + <name>PRESENT0</name> + <position>26</position> + </field> + <field> + <name>IRQOUT3</name> + <position>3</position> + </field> + <field> + <name>IRQOUT2</name> + <position>2</position> + </field> + <field> + <name>IRQOUT1</name> + <position>1</position> + </field> + <field> + <name>IRQOUT0</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>MUXSELLn</name> + <instance> + <name>MUXSELLn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x10</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>MUXSELHn</name> + <instance> + <name>MUXSELHn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x20</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DRIVEn</name> + <instance> + <name>DRIVEn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x30</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DOUTn</name> + <instance> + <name>DOUTn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x50</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DINn</name> + <instance> + <name>DINn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x60</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DOEn</name> + <instance> + <name>DOEn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x70</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PIN2IRQn</name> + <instance> + <name>PIN2IRQn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x80</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>IRQENn</name> + <instance> + <name>IRQENn</name> + <range> + <first>0</first> + <count>4</count> + <base>0x90</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>IRQLEVELn</name> + <instance> + <name>IRQLEVELn</name> + <range> + <first>0</first> + <count>4</count> + <base>0xa0</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>IRQPOLn</name> + <instance> + <name>IRQPOLn</name> + <range> + <first>0</first> + <count>4</count> + <base>0xb0</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>IRQSTATn</name> + <instance> + <name>IRQSTATn</name> + <range> + <first>0</first> + <count>4</count> + <base>0xc0</base> + <stride>0x100</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>POWER</name> + <title>Power Control</title> + <desc>Power Supply</desc> + <instance> + <name>POWER</name> + <address>0x80044000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>BATT_BO_IRQ</name> + <position>8</position> + </field> + <field> + <name>ENIRQBATT_BO</name> + <position>7</position> + </field> + <field> + <name>VDDIO_BO_IRQ</name> + <position>6</position> + </field> + <field> + <name>ENIRQVDDIO_BO</name> + <position>5</position> + </field> + <field> + <name>VDDD_BO_IRQ</name> + <position>4</position> + </field> + <field> + <name>ENIRQVDDD_BO</name> + <position>3</position> + </field> + <field> + <name>POLARITY_VDD5V_GT_VDDIO</name> + <position>2</position> + </field> + <field> + <name>VDD5V_GT_VDDIO_IRQ</name> + <position>1</position> + </field> + <field> + <name>ENIRQ_VDD5V_GT_VDDIO</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>5VCTRL</name> + <instance> + <name>5VCTRL</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>PWDN_5VBRNOUT</name> + <position>21</position> + </field> + <field> + <name>PWDN_IOBRNOUT</name> + <position>20</position> + </field> + <field> + <name>DISABLE_ILIMIT</name> + <position>19</position> + </field> + <field> + <name>DCDC_XFER</name> + <position>18</position> + </field> + <field> + <name>EN_BATT_PULLDN</name> + <position>17</position> + </field> + <field> + <name>VBUSVALID_5VDETECT</name> + <position>16</position> + </field> + <field> + <name>VBUSVALID_TRSH</name> + <position>8</position> + <width>2</width> + </field> + <field> + <name>USB_SUSPEND_I</name> + <position>7</position> + </field> + <field> + <name>VBUSVALID_TO_B</name> + <position>6</position> + </field> + <field> + <name>ILIMIT_EQ_ZERO</name> + <position>5</position> + </field> + <field> + <name>OTG_PWRUP_CMPS</name> + <position>4</position> + </field> + <field> + <name>EN_DCDC2</name> + <position>3</position> + </field> + <field> + <name>PWD_VDDD_LINREG</name> + <position>2</position> + </field> + <field> + <name>EN_DCDC1</name> + <position>1</position> + </field> + <field> + <name>LINREG_OFFSET</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>MINPWR</name> + <instance> + <name>MINPWR</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>TEST_DISCHRG_VBUS</name> + <position>23</position> + </field> + <field> + <name>TEST_CHRG_VBUS</name> + <position>22</position> + </field> + <field> + <name>DC2_TST</name> + <position>21</position> + </field> + <field> + <name>DC1_TST</name> + <position>20</position> + </field> + <field> + <name>PERIPHERALSWOFF</name> + <position>19</position> + </field> + <field> + <name>TOGGLE_DIF</name> + <position>18</position> + </field> + <field> + <name>DISABLE_VDDIOSTEP</name> + <position>17</position> + </field> + <field> + <name>DISABLE_VDDSTEP</name> + <position>16</position> + </field> + <field> + <name>SEL_PLLDIV16CLK</name> + <position>9</position> + </field> + <field> + <name>PWD_VDDIOBO</name> + <position>8</position> + </field> + <field> + <name>LESSANA_I</name> + <position>7</position> + </field> + <field> + <name>DC1_HALFFETS</name> + <position>6</position> + </field> + <field> + <name>DC2_STOPCLK</name> + <position>5</position> + </field> + <field> + <name>DC1_STOPCLK</name> + <position>4</position> + </field> + <field> + <name>EN_DC2_PFM</name> + <position>3</position> + </field> + <field> + <name>EN_DC1_PFM</name> + <position>2</position> + </field> + <field> + <name>DC2_HALFCLK</name> + <position>1</position> + </field> + <field> + <name>DC1_HALFCLK</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>BATTCHRG</name> + <instance> + <name>BATTCHRG</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>CHRG_STS_OFF</name> + <position>19</position> + </field> + <field> + <name>LIION_4P1</name> + <position>18</position> + </field> + <field> + <name>USE_EXTERN_R</name> + <position>17</position> + </field> + <field> + <name>PWD_BATTCHRG</name> + <position>16</position> + </field> + <field> + <name>STOP_ILIMIT</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>BATTCHRG_I</name> + <position>0</position> + <width>6</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>VDDCTRL</name> + <instance> + <name>VDDCTRL</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>VDDIO_BO</name> + <position>24</position> + <width>5</width> + </field> + <field> + <name>VDDIO_TRG</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>VDDD_BO</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>VDDD_TRG</name> + <position>0</position> + <width>5</width> + </field> + </register> + </node> + <node> + <name>DC1MULTOUT</name> + <instance> + <name>DC1MULTOUT</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>FUNCV</name> + <position>16</position> + <width>9</width> + </field> + <field> + <name>EN_BATADJ</name> + <position>8</position> + </field> + <field> + <name>ADJTN</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + <node> + <name>DC1LIMITS</name> + <instance> + <name>DC1LIMITS</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>EN_PFETOFF</name> + <position>24</position> + </field> + <field> + <name>POSLIMIT_BOOST</name> + <position>16</position> + <width>7</width> + </field> + <field> + <name>POSLIMIT_BUCK</name> + <position>8</position> + <width>7</width> + </field> + <field> + <name>NEGLIMIT</name> + <position>0</position> + <width>7</width> + </field> + </register> + </node> + <node> + <name>DC2LIMITS</name> + <instance> + <name>DC2LIMITS</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>EN_BOOST</name> + <position>24</position> + </field> + <field> + <name>POSLIMIT_BOOST</name> + <position>16</position> + <width>7</width> + </field> + <field> + <name>POSLIMIT_BUCK</name> + <position>8</position> + <width>7</width> + </field> + <field> + <name>NEGLIMIT</name> + <position>0</position> + <width>7</width> + </field> + </register> + </node> + <node> + <name>LOOPCTRL</name> + <instance> + <name>LOOPCTRL</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>TRAN_NOHYST</name> + <position>30</position> + </field> + <field> + <name>HYST_SIGN</name> + <position>29</position> + </field> + <field> + <name>EN_CMP_HYST</name> + <position>28</position> + </field> + <field> + <name>EN_DC2_RCSCALE</name> + <position>27</position> + </field> + <field> + <name>EN_DC1_RCSCALE</name> + <position>26</position> + </field> + <field> + <name>RC_SIGN</name> + <position>25</position> + </field> + <field> + <name>EN_RCSCALE</name> + <position>24</position> + </field> + <field> + <name>DC2_FF</name> + <position>20</position> + <width>3</width> + </field> + <field> + <name>DC2_R</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>DC2_C</name> + <position>12</position> + <width>2</width> + </field> + <field> + <name>DC1_FF</name> + <position>8</position> + <width>3</width> + </field> + <field> + <name>DC1_R</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>DC1_C</name> + <position>0</position> + <width>2</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STS</name> + <instance> + <name>STS</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>BATT_CHRG_PRESENT</name> + <position>31</position> + </field> + <field> + <name>MODE</name> + <position>20</position> + <width>2</width> + </field> + <field> + <name>BATT_BO</name> + <position>16</position> + </field> + <field> + <name>CHRGSTS</name> + <position>14</position> + </field> + <field> + <name>DC2_OK</name> + <position>13</position> + </field> + <field> + <name>DC1_OK</name> + <position>12</position> + </field> + <field> + <name>VDDIO_BO</name> + <position>9</position> + </field> + <field> + <name>VDDD_BO</name> + <position>8</position> + </field> + <field> + <name>VDD5V_GT_VDDIO</name> + <position>4</position> + </field> + <field> + <name>AVALID</name> + <position>3</position> + </field> + <field> + <name>BVALID</name> + <position>2</position> + </field> + <field> + <name>VBUSVALID</name> + <position>1</position> + </field> + <field> + <name>SESSEND</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>SPEEDTEMP</name> + <instance> + <name>SPEEDTEMP</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>SPEED_STS1</name> + <position>24</position> + <width>8</width> + </field> + <field> + <name>SPEED_STS2</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>TEMP_STS</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>SPEED_CTRL</name> + <position>4</position> + <width>2</width> + </field> + <field> + <name>TEMP_CTRL</name> + <position>0</position> + <width>4</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>BATTMONITOR</name> + <instance> + <name>BATTMONITOR</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>BATT_VAL</name> + <position>16</position> + <width>10</width> + </field> + <field> + <name>PWDN_BATTBRNOUT</name> + <position>9</position> + </field> + <field> + <name>BRWNOUT_PWD</name> + <position>8</position> + </field> + <field> + <name>BRWNOUT_LVL</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + <node> + <name>RESET</name> + <instance> + <name>RESET</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>UNLOCK</name> + <position>16</position> + <width>16</width> + <enum> + <name>KEY</name> + <value>0x3e77</value> + </enum> + </field> + <field> + <name>PWD_OFF</name> + <position>4</position> + </field> + <field> + <name>POR</name> + <position>3</position> + </field> + <field> + <name>PWD</name> + <position>2</position> + </field> + <field> + <name>RST_DIG</name> + <position>1</position> + </field> + <field> + <name>RST_ALL</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0xd0</address> + </instance> + <register> + <field> + <name>ENCTRLVBUS</name> + <position>4</position> + </field> + <field> + <name>VBUSVALIDPIOLOCK</name> + <position>3</position> + </field> + <field> + <name>AVALIDPIOLOCK</name> + <position>2</position> + </field> + <field> + <name>BVALIDPIOLOCK</name> + <position>1</position> + </field> + <field> + <name>SESSENDPIOLOCK</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>PWM</name> + <title>Pulse width Modulation</title> + <desc>Pulse-Width Modulator (PWM) Controller</desc> + <instance> + <name>PWM</name> + <address>0x80064000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>PWM4_PRESENT</name> + <position>29</position> + </field> + <field> + <name>PWM3_PRESENT</name> + <position>28</position> + </field> + <field> + <name>PWM2_PRESENT</name> + <position>27</position> + </field> + <field> + <name>PWM1_PRESENT</name> + <position>26</position> + </field> + <field> + <name>PWM0_PRESENT</name> + <position>25</position> + </field> + <field> + <name>PWM4_ENABLE</name> + <position>4</position> + </field> + <field> + <name>PWM3_ENABLE</name> + <position>3</position> + </field> + <field> + <name>PWM2_ENABLE</name> + <position>2</position> + </field> + <field> + <name>PWM1_ENABLE</name> + <position>1</position> + </field> + <field> + <name>PWM0_ENABLE</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ACTIVEn</name> + <instance> + <name>ACTIVEn</name> + <range> + <first>0</first> + <count>5</count> + <base>0x10</base> + <stride>0x20</stride> + </range> + </instance> + <register> + <field> + <name>INACTIVE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>ACTIVE</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PERIODn</name> + <instance> + <name>PERIODn</name> + <range> + <first>0</first> + <count>5</count> + <base>0x20</base> + <stride>0x20</stride> + </range> + </instance> + <register> + <field> + <name>MATT</name> + <position>23</position> + </field> + <field> + <name>CDIV</name> + <position>20</position> + <width>3</width> + <enum> + <name>DIV_1</name> + <value>0x0</value> + </enum> + <enum> + <name>DIV_2</name> + <value>0x1</value> + </enum> + <enum> + <name>DIV_4</name> + <value>0x2</value> + </enum> + <enum> + <name>DIV_8</name> + <value>0x3</value> + </enum> + <enum> + <name>DIV_16</name> + <value>0x4</value> + </enum> + <enum> + <name>DIV_64</name> + <value>0x5</value> + </enum> + <enum> + <name>DIV_256</name> + <value>0x6</value> + </enum> + <enum> + <name>DIV_1024</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>INACTIVE_STATE</name> + <position>18</position> + <width>2</width> + <enum> + <name>HI_Z</name> + <value>0x0</value> + </enum> + <enum> + <name>0</name> + <value>0x2</value> + </enum> + <enum> + <name>1</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>ACTIVE_STATE</name> + <position>16</position> + <width>2</width> + <enum> + <name>HI_Z</name> + <value>0x0</value> + </enum> + <enum> + <name>0</name> + <value>0x2</value> + </enum> + <enum> + <name>1</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>PERIOD</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>RTC</name> + <title>Real Time Clock</title> + <desc>Real-Time Clock, Alarm, Watchdog, Persistent Bits</desc> + <instance> + <name>RTC</name> + <address>0x8005c000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>CLKDIV</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>SUPPRESS_COPY2ANALOG</name> + <position>6</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>NO_COPY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>FORCE_UPDATE</name> + <position>5</position> + <enum> + <name>NORMAL</name> + <value>0x0</value> + </enum> + <enum> + <name>FORCE_COPY</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>WATCHDOGEN</name> + <position>4</position> + </field> + <field> + <name>ONEMSEC_IRQ</name> + <position>3</position> + </field> + <field> + <name>ALARM_IRQ</name> + <position>2</position> + </field> + <field> + <name>ONEMSEC_IRQ_EN</name> + <position>1</position> + </field> + <field> + <name>ALARM_IRQ_EN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>RTC_PRESENT</name> + <position>31</position> + </field> + <field> + <name>ALARM_PRESENT</name> + <position>30</position> + </field> + <field> + <name>WATCHDOG_PRESENT</name> + <position>29</position> + </field> + <field> + <name>XTAL32768_PRESENT</name> + <position>28</position> + </field> + <field> + <name>STALE_REGS</name> + <position>16</position> + <width>6</width> + </field> + <field> + <name>NEW_REGS</name> + <position>8</position> + <width>6</width> + </field> + <field> + <name>FUSE_UNLOCK</name> + <position>1</position> + </field> + <field> + <name>FUSE_DONE</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>MILLISECONDS</name> + <instance> + <name>MILLISECONDS</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>COUNT</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>SECONDS</name> + <instance> + <name>SECONDS</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>COUNT</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ALARM</name> + <instance> + <name>ALARM</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>VALUE</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>WATCHDOG</name> + <instance> + <name>WATCHDOG</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>COUNT</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PERSISTENT0</name> + <instance> + <name>PERSISTENT0</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>GENERAL</name> + <position>16</position> + <width>16</width> + <enum> + <name>SDRAM_BOOT</name> + <value>0x8000</value> + </enum> + <enum> + <name>ENUMERATE_500MA_TWICE</name> + <value>0x4000</value> + </enum> + <enum> + <name>USB_BOOT_PLAYER_MODE</name> + <value>0x2000</value> + </enum> + <enum> + <name>SKIP_CHECKDISK</name> + <value>0x1000</value> + </enum> + <enum> + <name>USB_LOW_POWER_MODE</name> + <value>0x800</value> + </enum> + <enum> + <name>OTG_HNP_BIT</name> + <value>0x400</value> + </enum> + <enum> + <name>OTG_ATL_ROLE_BIT</name> + <value>0x200</value> + </enum> + <enum> + <name>SDRAM_CS_HI</name> + <value>0x100</value> + </enum> + <enum> + <name>SDRAM_CS_LO</name> + <value>0x80</value> + </enum> + <enum> + <name>SDRAM_NDX_3</name> + <value>0x40</value> + </enum> + <enum> + <name>SDRAM_NDX_2</name> + <value>0x20</value> + </enum> + <enum> + <name>SDRAM_NDX_1</name> + <value>0x10</value> + </enum> + <enum> + <name>SDRAM_NDX_0</name> + <value>0x8</value> + </enum> + <enum> + <name>ETM_ENABLE</name> + <value>0x4</value> + </enum> + </field> + <field> + <name>DCDC_CTRL</name> + <position>6</position> + <width>10</width> + <enum> + <name>SD_PRESENT</name> + <value>0x200</value> + </enum> + <enum> + <name>LOWBAT_3P0</name> + <value>0x100</value> + </enum> + <enum> + <name>SELFBIAS_PWRUP</name> + <value>0x80</value> + </enum> + <enum> + <name>AUTO_RESTART</name> + <value>0x40</value> + </enum> + <enum> + <name>DETECT_LOWBAT</name> + <value>0x20</value> + </enum> + <enum> + <name>DROP_BIAS1</name> + <value>0x10</value> + </enum> + <enum> + <name>DROP_BIAS2</name> + <value>0x8</value> + </enum> + <enum> + <name>SPARE</name> + <value>0x4</value> + </enum> + <enum> + <name>DISABLE_XTALSTOP</name> + <value>0x2</value> + </enum> + <enum> + <name>SPARE2</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>XTAL32_PDOWN</name> + <position>5</position> + </field> + <field> + <name>XTAL24_PDOWN</name> + <position>4</position> + </field> + <field> + <name>ALARM_WAKE_EN</name> + <position>3</position> + </field> + <field> + <name>ALARM_EN</name> + <position>2</position> + </field> + <field> + <name>ALARM_WAKE</name> + <position>1</position> + </field> + <field> + <name>CLOCKSOURCE</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PERSISTENT1</name> + <instance> + <name>PERSISTENT1</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>GENERAL</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PERSISTENT2</name> + <instance> + <name>PERSISTENT2</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>SRAM_LO</name> + <position>0</position> + <width>32</width> + <enum> + <name>WARM_BOOT</name> + <value>0x80000000</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>PERSISTENT3</name> + <instance> + <name>PERSISTENT3</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>SRAM_HI</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>WATCHDOG_RESET_MASK</name> + <position>1</position> + </field> + <field> + <name>WATCHDOG_RESET</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>UNLOCK</name> + <instance> + <name>UNLOCK</name> + <address>0x200</address> + </instance> + <register> + <field> + <name>KEY</name> + <position>0</position> + <width>32</width> + <enum> + <name>VAL</name> + <value>0xc6a83957</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>LASERFUSEn</name> + <instance> + <name>LASERFUSEn</name> + <range> + <first>0</first> + <count>12</count> + <base>0x300</base> + <stride>0x10</stride> + </range> + </instance> + <register> + <field> + <name>BITS</name> + <position>0</position> + <width>32</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>SPDIF</name> + <title>Sony/Phillips Digital Audio Interface</title> + <desc>SPDIF Transmitter</desc> + <instance> + <name>SPDIF</name> + <address>0x80054000</address> + </instance> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>DMAWAIT_COUNT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>WAIT_END_XFER</name> + <position>5</position> + </field> + <field> + <name>WORD_LENGTH</name> + <position>4</position> + </field> + <field> + <name>FIFO_UNDERFLOW_IRQ</name> + <position>3</position> + </field> + <field> + <name>FIFO_OVERFLOW_IRQ</name> + <position>2</position> + </field> + <field> + <name>FIFO_ERROR_IRQ_EN</name> + <position>1</position> + </field> + <field> + <name>RUN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>PRESENT</name> + <position>31</position> + </field> + <field> + <name>END_XFER</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>FRAMECTRL</name> + <instance> + <name>FRAMECTRL</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>V_CONFIG</name> + <position>17</position> + </field> + <field> + <name>AUTO_MUTE</name> + <position>16</position> + </field> + <field> + <name>USER_DATA</name> + <position>14</position> + </field> + <field> + <name>V</name> + <position>13</position> + </field> + <field> + <name>L</name> + <position>12</position> + </field> + <field> + <name>CC</name> + <position>4</position> + <width>7</width> + </field> + <field> + <name>PRE</name> + <position>3</position> + </field> + <field> + <name>COPY</name> + <position>2</position> + </field> + <field> + <name>AUDIO</name> + <position>1</position> + </field> + <field> + <name>PRO</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>SRR</name> + <instance> + <name>SRR</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>BASEMULT</name> + <position>28</position> + <width>3</width> + </field> + <field> + <name>RATE</name> + <position>0</position> + <width>20</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>DMA_PREQ</name> + <position>1</position> + </field> + <field> + <name>FIFO_STATUS</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>HIGH</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>LOW</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>SSP</name> + <title>Sync Serial Port</title> + <desc>Synchronous Serial Ports (SSP)</desc> + <instance> + <name>SSP</name> + <address>0x80010000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>RUN</name> + <position>29</position> + </field> + <field> + <name>HALF_DUPLEX</name> + <position>28</position> + </field> + <field> + <name>LOCK_CS</name> + <position>27</position> + </field> + <field> + <name>IGNORE_CRC</name> + <position>26</position> + </field> + <field> + <name>READ</name> + <position>25</position> + </field> + <field> + <name>DATA_XFER</name> + <position>24</position> + </field> + <field> + <name>SDIO_IRQ</name> + <position>23</position> + </field> + <field> + <name>BUS_WIDTH</name> + <position>22</position> + <enum> + <name>ONE_BIT</name> + <value>0x0</value> + </enum> + <enum> + <name>FOUR_BIT</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>WAIT_FOR_IRQ</name> + <position>21</position> + </field> + <field> + <name>WAIT_FOR_CMD</name> + <position>20</position> + </field> + <field> + <name>LONG_RESP</name> + <position>19</position> + </field> + <field> + <name>CHECK_RESP</name> + <position>18</position> + </field> + <field> + <name>GET_RESP</name> + <position>17</position> + </field> + <field> + <name>ENABLE</name> + <position>16</position> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CMD0</name> + <instance> + <name>CMD0</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>CMD</name> + <position>0</position> + <width>8</width> + <enum> + <name>MMC_GO_IDLE_STATE</name> + <value>0x0</value> + </enum> + <enum> + <name>MMC_SEND_OP_COND</name> + <value>0x1</value> + </enum> + <enum> + <name>MMC_ALL_SEND_CID</name> + <value>0x2</value> + </enum> + <enum> + <name>MMC_SET_RELATIVE_ADDR</name> + <value>0x3</value> + </enum> + <enum> + <name>MMC_SET_DSR</name> + <value>0x4</value> + </enum> + <enum> + <name>MMC_RESERVED_5</name> + <value>0x5</value> + </enum> + <enum> + <name>MMC_SWITCH</name> + <value>0x6</value> + </enum> + <enum> + <name>MMC_SELECT_DESELECT_CARD</name> + <value>0x7</value> + </enum> + <enum> + <name>MMC_SEND_EXT_CSD</name> + <value>0x8</value> + </enum> + <enum> + <name>MMC_SEND_CSD</name> + <value>0x9</value> + </enum> + <enum> + <name>MMC_SEND_CID</name> + <value>0xa</value> + </enum> + <enum> + <name>MMC_READ_DAT_UNTIL_STOP</name> + <value>0xb</value> + </enum> + <enum> + <name>MMC_STOP_TRANSMISSION</name> + <value>0xc</value> + </enum> + <enum> + <name>MMC_SEND_STATUS</name> + <value>0xd</value> + </enum> + <enum> + <name>MMC_BUSTEST_R</name> + <value>0xe</value> + </enum> + <enum> + <name>MMC_GO_INACTIVE_STATE</name> + <value>0xf</value> + </enum> + <enum> + <name>MMC_SET_BLOCKLEN</name> + <value>0x10</value> + </enum> + <enum> + <name>MMC_READ_SINGLE_BLOCK</name> + <value>0x11</value> + </enum> + <enum> + <name>MMC_READ_MULTIPLE_BLOCK</name> + <value>0x12</value> + </enum> + <enum> + <name>MMC_BUSTEST_W</name> + <value>0x13</value> + </enum> + <enum> + <name>MMC_WRITE_DAT_UNTIL_STOP</name> + <value>0x14</value> + </enum> + <enum> + <name>MMC_SET_BLOCK_COUNT</name> + <value>0x17</value> + </enum> + <enum> + <name>MMC_WRITE_BLOCK</name> + <value>0x18</value> + </enum> + <enum> + <name>MMC_WRITE_MULTIPLE_BLOCK</name> + <value>0x19</value> + </enum> + <enum> + <name>MMC_PROGRAM_CID</name> + <value>0x1a</value> + </enum> + <enum> + <name>MMC_PROGRAM_CSD</name> + <value>0x1b</value> + </enum> + <enum> + <name>MMC_SET_WRITE_PROT</name> + <value>0x1c</value> + </enum> + <enum> + <name>MMC_CLR_WRITE_PROT</name> + <value>0x1d</value> + </enum> + <enum> + <name>MMC_SEND_WRITE_PROT</name> + <value>0x1e</value> + </enum> + <enum> + <name>MMC_ERASE_GROUP_START</name> + <value>0x23</value> + </enum> + <enum> + <name>MMC_ERASE_GROUP_END</name> + <value>0x24</value> + </enum> + <enum> + <name>MMC_ERASE</name> + <value>0x26</value> + </enum> + <enum> + <name>MMC_FAST_IO</name> + <value>0x27</value> + </enum> + <enum> + <name>MMC_GO_IRQ_STATE</name> + <value>0x28</value> + </enum> + <enum> + <name>MMC_LOCK_UNLOCK</name> + <value>0x2a</value> + </enum> + <enum> + <name>MMC_APP_CMD</name> + <value>0x37</value> + </enum> + <enum> + <name>MMC_GEN_CMD</name> + <value>0x38</value> + </enum> + <enum> + <name>SD_GO_IDLE_STATE</name> + <value>0x0</value> + </enum> + <enum> + <name>SD_ALL_SEND_CID</name> + <value>0x2</value> + </enum> + <enum> + <name>SD_SEND_RELATIVE_ADDR</name> + <value>0x3</value> + </enum> + <enum> + <name>SD_SET_DSR</name> + <value>0x4</value> + </enum> + <enum> + <name>SD_IO_SEND_OP_COND</name> + <value>0x5</value> + </enum> + <enum> + <name>SD_SELECT_DESELECT_CARD</name> + <value>0x7</value> + </enum> + <enum> + <name>SD_SEND_CSD</name> + <value>0x9</value> + </enum> + <enum> + <name>SD_SEND_CID</name> + <value>0xa</value> + </enum> + <enum> + <name>SD_STOP_TRANSMISSION</name> + <value>0xc</value> + </enum> + <enum> + <name>SD_SEND_STATUS</name> + <value>0xd</value> + </enum> + <enum> + <name>SD_GO_INACTIVE_STATE</name> + <value>0xf</value> + </enum> + <enum> + <name>SD_SET_BLOCKLEN</name> + <value>0x10</value> + </enum> + <enum> + <name>SD_READ_SINGLE_BLOCK</name> + <value>0x11</value> + </enum> + <enum> + <name>SD_READ_MULTIPLE_BLOCK</name> + <value>0x12</value> + </enum> + <enum> + <name>SD_WRITE_BLOCK</name> + <value>0x18</value> + </enum> + <enum> + <name>SD_WRITE_MULTIPLE_BLOCK</name> + <value>0x19</value> + </enum> + <enum> + <name>SD_PROGRAM_CSD</name> + <value>0x1b</value> + </enum> + <enum> + <name>SD_SET_WRITE_PROT</name> + <value>0x1c</value> + </enum> + <enum> + <name>SD_CLR_WRITE_PROT</name> + <value>0x1d</value> + </enum> + <enum> + <name>SD_SEND_WRITE_PROT</name> + <value>0x1e</value> + </enum> + <enum> + <name>SD_ERASE_WR_BLK_START</name> + <value>0x20</value> + </enum> + <enum> + <name>SD_ERASE_WR_BLK_END</name> + <value>0x21</value> + </enum> + <enum> + <name>SD_ERASE_GROUP_START</name> + <value>0x23</value> + </enum> + <enum> + <name>SD_ERASE_GROUP_END</name> + <value>0x24</value> + </enum> + <enum> + <name>SD_ERASE</name> + <value>0x26</value> + </enum> + <enum> + <name>SD_LOCK_UNLOCK</name> + <value>0x2a</value> + </enum> + <enum> + <name>SD_IO_RW_DIRECT</name> + <value>0x34</value> + </enum> + <enum> + <name>SD_IO_RW_EXTENDED</name> + <value>0x35</value> + </enum> + <enum> + <name>SD_APP_CMD</name> + <value>0x37</value> + </enum> + <enum> + <name>SD_GEN_CMD</name> + <value>0x38</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CMD1</name> + <instance> + <name>CMD1</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>CMD_ARG</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>COMPREF</name> + <instance> + <name>COMPREF</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>REFERENCE</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>COMPMASK</name> + <instance> + <name>COMPMASK</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>MASK</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>TIMING</name> + <instance> + <name>TIMING</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>TIMEOUT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>CLOCK_DIVIDE</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>CLOCK_RATE</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>SDIO_IRQ</name> + <position>31</position> + </field> + <field> + <name>SDIO_IRQ_EN</name> + <position>30</position> + </field> + <field> + <name>RESP_ERR_IRQ</name> + <position>29</position> + </field> + <field> + <name>RESP_ERR_IRQ_EN</name> + <position>28</position> + </field> + <field> + <name>RESP_TIMEOUT_IRQ</name> + <position>27</position> + </field> + <field> + <name>RESP_TIMEOUT_IRQ_EN</name> + <position>26</position> + </field> + <field> + <name>DATA_TIMEOUT_IRQ</name> + <position>25</position> + </field> + <field> + <name>DATA_TIMEOUT_IRQ_EN</name> + <position>24</position> + </field> + <field> + <name>DATA_CRC_IRQ</name> + <position>23</position> + </field> + <field> + <name>DATA_CRC_IRQ_EN</name> + <position>22</position> + </field> + <field> + <name>XMIT_IRQ</name> + <position>21</position> + </field> + <field> + <name>XMIT_IRQ_EN</name> + <position>20</position> + </field> + <field> + <name>RECV_IRQ</name> + <position>19</position> + </field> + <field> + <name>RECV_IRQ_EN</name> + <position>18</position> + </field> + <field> + <name>RECV_TIMEOUT_IRQ</name> + <position>17</position> + </field> + <field> + <name>RECV_TIMEOUT_IRQ_EN</name> + <position>16</position> + </field> + <field> + <name>RECV_OVRFLW_IRQ</name> + <position>15</position> + </field> + <field> + <name>RECV_OVRFLW_IRQ_EN</name> + <position>14</position> + </field> + <field> + <name>DMA_ENABLE</name> + <position>13</position> + </field> + <field> + <name>LOOPBACK</name> + <position>12</position> + </field> + <field> + <name>SLAVE_OUT_DISABLE</name> + <position>11</position> + </field> + <field> + <name>PHASE</name> + <position>10</position> + </field> + <field> + <name>POLARITY</name> + <position>9</position> + </field> + <field> + <name>SLAVE_MODE</name> + <position>8</position> + </field> + <field> + <name>WORD_LENGTH</name> + <position>4</position> + <width>4</width> + <enum> + <name>RESERVED0</name> + <value>0x0</value> + </enum> + <enum> + <name>RESERVED1</name> + <value>0x1</value> + </enum> + <enum> + <name>RESERVED2</name> + <value>0x2</value> + </enum> + <enum> + <name>FOUR_BITS</name> + <value>0x3</value> + </enum> + <enum> + <name>EIGHT_BITS</name> + <value>0x7</value> + </enum> + <enum> + <name>SIXTEEN_BITS</name> + <value>0xf</value> + </enum> + </field> + <field> + <name>SSP_MODE</name> + <position>0</position> + <width>4</width> + <enum> + <name>SPI</name> + <value>0x0</value> + </enum> + <enum> + <name>SSI</name> + <value>0x1</value> + </enum> + <enum> + <name>MICROWIRE</name> + <value>0x2</value> + </enum> + <enum> + <name>SD_MMC</name> + <value>0x3</value> + </enum> + <enum> + <name>MS</name> + <value>0x4</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>SDRESP0</name> + <instance> + <name>SDRESP0</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>RESP0</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>SDRESP1</name> + <instance> + <name>SDRESP1</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>RESP1</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>SDRESP2</name> + <instance> + <name>SDRESP2</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>RESP2</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>SDRESP3</name> + <instance> + <name>SDRESP3</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>RESP3</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>STATUS</name> + <instance> + <name>STATUS</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>PRESENT</name> + <position>31</position> + </field> + <field> + <name>MS_PRESENT</name> + <position>30</position> + </field> + <field> + <name>SD_PRESENT</name> + <position>29</position> + </field> + <field> + <name>CARD_DETECT</name> + <position>28</position> + </field> + <field> + <name>RECV_COUNT</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>XMIT_COUNT</name> + <position>20</position> + <width>4</width> + </field> + <field> + <name>DMAREQ</name> + <position>19</position> + </field> + <field> + <name>DMAEND</name> + <position>18</position> + </field> + <field> + <name>SDIO_IRQ</name> + <position>17</position> + </field> + <field> + <name>RESP_CRC_ERR</name> + <position>16</position> + </field> + <field> + <name>RESP_ERR</name> + <position>15</position> + </field> + <field> + <name>RESP_TIMEOUT</name> + <position>14</position> + </field> + <field> + <name>DATA_CRC_ERR</name> + <position>13</position> + </field> + <field> + <name>TIMEOUT</name> + <position>12</position> + </field> + <field> + <name>RECV_TIMEOUT_STAT</name> + <position>11</position> + </field> + <field> + <name>RECV_DATA_STAT</name> + <position>10</position> + </field> + <field> + <name>RECV_OVRFLW</name> + <position>9</position> + </field> + <field> + <name>RECV_FULL</name> + <position>8</position> + </field> + <field> + <name>RECV_NOT_EMPTY</name> + <position>7</position> + </field> + <field> + <name>XMIT_NOT_FULL</name> + <position>6</position> + </field> + <field> + <name>XMIT_EMPTY</name> + <position>5</position> + </field> + <field> + <name>XMIT_UNDRFLW</name> + <position>4</position> + </field> + <field> + <name>CMD_BUSY</name> + <position>3</position> + </field> + <field> + <name>DATA_BUSY</name> + <position>2</position> + </field> + <field> + <name>DATA_XFER</name> + <position>1</position> + </field> + <field> + <name>BUSY</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x100</address> + </instance> + <register> + <field> + <name>DATACRC_ERR</name> + <position>28</position> + <width>4</width> + </field> + <field> + <name>DATA_STALL</name> + <position>27</position> + </field> + <field> + <name>DAT_SM</name> + <position>24</position> + <width>3</width> + <enum> + <name>DSM_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>DSM_START</name> + <value>0x1</value> + </enum> + <enum> + <name>DSM_WORD</name> + <value>0x2</value> + </enum> + <enum> + <name>DSM_CRC1</name> + <value>0x3</value> + </enum> + <enum> + <name>DSM_CRC2</name> + <value>0x4</value> + </enum> + <enum> + <name>DSM_END</name> + <value>0x5</value> + </enum> + <enum> + <name>DSM_RXDLY</name> + <value>0x6</value> + </enum> + </field> + <field> + <name>MSTK_SM</name> + <position>20</position> + <width>4</width> + <enum> + <name>MSTK_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>MSTK_CKON</name> + <value>0x1</value> + </enum> + <enum> + <name>MSTK_BS1</name> + <value>0x2</value> + </enum> + <enum> + <name>MSTK_TPC</name> + <value>0x3</value> + </enum> + <enum> + <name>MSTK_BS2</name> + <value>0x4</value> + </enum> + <enum> + <name>MSTK_HDSHK</name> + <value>0x5</value> + </enum> + <enum> + <name>MSTK_BS3</name> + <value>0x6</value> + </enum> + <enum> + <name>MSTK_RW</name> + <value>0x7</value> + </enum> + <enum> + <name>MSTK_CRC1</name> + <value>0x8</value> + </enum> + <enum> + <name>MSTK_CRC2</name> + <value>0x9</value> + </enum> + <enum> + <name>MSTK_BS0</name> + <value>0xa</value> + </enum> + <enum> + <name>MSTK_DONE</name> + <value>0xb</value> + </enum> + </field> + <field> + <name>CMD_OE</name> + <position>19</position> + </field> + <field> + <name>CMD_SM</name> + <position>16</position> + <width>3</width> + <enum> + <name>CSM_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>CSM_INDEX</name> + <value>0x1</value> + </enum> + <enum> + <name>CSM_ARG</name> + <value>0x2</value> + </enum> + <enum> + <name>CSM_CRC</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>CLK_OE</name> + <position>15</position> + </field> + <field> + <name>MMC_SM</name> + <position>12</position> + <width>3</width> + <enum> + <name>MMC_IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>MMC_CMD</name> + <value>0x1</value> + </enum> + <enum> + <name>MMC_TRC</name> + <value>0x2</value> + </enum> + <enum> + <name>MMC_RESP</name> + <value>0x3</value> + </enum> + <enum> + <name>MMC_RPRX</name> + <value>0x4</value> + </enum> + <enum> + <name>MMC_TX</name> + <value>0x5</value> + </enum> + <enum> + <name>MMC_CTOK</name> + <value>0x6</value> + </enum> + <enum> + <name>MMC_RX</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>DAT0_OE</name> + <position>11</position> + </field> + <field> + <name>DAT321_OE</name> + <position>10</position> + </field> + <field> + <name>SSP_CMD</name> + <position>9</position> + </field> + <field> + <name>SSP_RESP</name> + <position>8</position> + </field> + <field> + <name>SSP_TXD</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>SSP_RXD</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + </node> + <node> + <name>TIMROT</name> + <title>Timers/Rotary Interface</title> + <desc>Timers and Rotary Decoder</desc> + <instance> + <name>TIMROT</name> + <address>0x80068000</address> + </instance> + <node> + <name>ROTCTRL</name> + <instance> + <name>ROTCTRL</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>ROTARY_PRESENT</name> + <position>29</position> + </field> + <field> + <name>TIM3_PRESENT</name> + <position>28</position> + </field> + <field> + <name>TIM2_PRESENT</name> + <position>27</position> + </field> + <field> + <name>TIM1_PRESENT</name> + <position>26</position> + </field> + <field> + <name>TIM0_PRESENT</name> + <position>25</position> + </field> + <field> + <name>STATE</name> + <position>22</position> + <width>3</width> + </field> + <field> + <name>DIVIDER</name> + <position>16</position> + <width>6</width> + </field> + <field> + <name>RELATIVE</name> + <position>12</position> + </field> + <field> + <name>OVERSAMPLE</name> + <position>10</position> + <width>2</width> + <enum> + <name>8X</name> + <value>0x0</value> + </enum> + <enum> + <name>4X</name> + <value>0x1</value> + </enum> + <enum> + <name>2X</name> + <value>0x2</value> + </enum> + <enum> + <name>1X</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>POLARITY_B</name> + <position>9</position> + </field> + <field> + <name>POLARITY_A</name> + <position>8</position> + </field> + <field> + <name>SELECT_B</name> + <position>4</position> + <width>3</width> + <enum> + <name>NEVER_TICK</name> + <value>0x0</value> + </enum> + <enum> + <name>PWM0</name> + <value>0x1</value> + </enum> + <enum> + <name>PWM1</name> + <value>0x2</value> + </enum> + <enum> + <name>PWM2</name> + <value>0x3</value> + </enum> + <enum> + <name>PWM3</name> + <value>0x4</value> + </enum> + <enum> + <name>PWM4</name> + <value>0x5</value> + </enum> + <enum> + <name>ROTARYA</name> + <value>0x6</value> + </enum> + <enum> + <name>ROTARYB</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>SELECT_A</name> + <position>0</position> + <width>3</width> + <enum> + <name>NEVER_TICK</name> + <value>0x0</value> + </enum> + <enum> + <name>PWM0</name> + <value>0x1</value> + </enum> + <enum> + <name>PWM1</name> + <value>0x2</value> + </enum> + <enum> + <name>PWM2</name> + <value>0x3</value> + </enum> + <enum> + <name>PWM3</name> + <value>0x4</value> + </enum> + <enum> + <name>PWM4</name> + <value>0x5</value> + </enum> + <enum> + <name>ROTARYA</name> + <value>0x6</value> + </enum> + <enum> + <name>ROTARYB</name> + <value>0x7</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>ROTCOUNT</name> + <instance> + <name>ROTCOUNT</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>UPDOWN</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>TIMCTRL3</name> + <instance> + <name>TIMCTRL3</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>TEST_SIGNAL</name> + <position>16</position> + <width>4</width> + <enum> + <name>NEVER_TICK</name> + <value>0x0</value> + </enum> + <enum> + <name>PWM0</name> + <value>0x1</value> + </enum> + <enum> + <name>PWM1</name> + <value>0x2</value> + </enum> + <enum> + <name>PWM2</name> + <value>0x3</value> + </enum> + <enum> + <name>PWM3</name> + <value>0x4</value> + </enum> + <enum> + <name>PWM4</name> + <value>0x5</value> + </enum> + <enum> + <name>ROTARYA</name> + <value>0x6</value> + </enum> + <enum> + <name>ROTARYB</name> + <value>0x7</value> + </enum> + <enum> + <name>32KHZ_XTAL</name> + <value>0x8</value> + </enum> + <enum> + <name>8KHZ_XTAL</name> + <value>0x9</value> + </enum> + <enum> + <name>4KHZ_XTAL</name> + <value>0xa</value> + </enum> + <enum> + <name>1KHZ_XTAL</name> + <value>0xb</value> + </enum> + <enum> + <name>TICK_ALWAYS</name> + <value>0xc</value> + </enum> + </field> + <field> + <name>IRQ</name> + <position>15</position> + </field> + <field> + <name>IRQ_EN</name> + <position>14</position> + </field> + <field> + <name>DUTY_VALID</name> + <position>10</position> + </field> + <field> + <name>DUTY_CYCLE</name> + <position>9</position> + </field> + <field> + <name>POLARITY</name> + <position>8</position> + </field> + <field> + <name>UPDATE</name> + <position>7</position> + </field> + <field> + <name>RELOAD</name> + <position>6</position> + </field> + <field> + <name>PRESCALE</name> + <position>4</position> + <width>2</width> + <enum> + <name>DIV_BY_1</name> + <value>0x0</value> + </enum> + <enum> + <name>DIV_BY_2</name> + <value>0x1</value> + </enum> + <enum> + <name>DIV_BY_4</name> + <value>0x2</value> + </enum> + <enum> + <name>DIV_BY_8</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SELECT</name> + <position>0</position> + <width>4</width> + <enum> + <name>NEVER_TICK</name> + <value>0x0</value> + </enum> + <enum> + <name>PWM0</name> + <value>0x1</value> + </enum> + <enum> + <name>PWM1</name> + <value>0x2</value> + </enum> + <enum> + <name>PWM2</name> + <value>0x3</value> + </enum> + <enum> + <name>PWM3</name> + <value>0x4</value> + </enum> + <enum> + <name>PWM4</name> + <value>0x5</value> + </enum> + <enum> + <name>ROTARYA</name> + <value>0x6</value> + </enum> + <enum> + <name>ROTARYB</name> + <value>0x7</value> + </enum> + <enum> + <name>32KHZ_XTAL</name> + <value>0x8</value> + </enum> + <enum> + <name>8KHZ_XTAL</name> + <value>0x9</value> + </enum> + <enum> + <name>4KHZ_XTAL</name> + <value>0xa</value> + </enum> + <enum> + <name>1KHZ_XTAL</name> + <value>0xb</value> + </enum> + <enum> + <name>TICK_ALWAYS</name> + <value>0xc</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TIMCOUNT3</name> + <instance> + <name>TIMCOUNT3</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>LOW_RUNNING_COUNT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>HIGH_FIXED_COUNT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>TIMCOUNTn</name> + <instance> + <name>TIMCOUNTn</name> + <range> + <first>0</first> + <count>3</count> + <base>0x30</base> + <stride>0x20</stride> + </range> + </instance> + <register> + <field> + <name>RUNNING_COUNT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>FIXED_COUNT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>TIMCTRLn</name> + <instance> + <name>TIMCTRLn</name> + <range> + <first>0</first> + <count>3</count> + <base>0x20</base> + <stride>0x20</stride> + </range> + </instance> + <register> + <field> + <name>IRQ</name> + <position>15</position> + </field> + <field> + <name>IRQ_EN</name> + <position>14</position> + </field> + <field> + <name>POLARITY</name> + <position>8</position> + </field> + <field> + <name>UPDATE</name> + <position>7</position> + </field> + <field> + <name>RELOAD</name> + <position>6</position> + </field> + <field> + <name>PRESCALE</name> + <position>4</position> + <width>2</width> + <enum> + <name>DIV_BY_1</name> + <value>0x0</value> + </enum> + <enum> + <name>DIV_BY_2</name> + <value>0x1</value> + </enum> + <enum> + <name>DIV_BY_4</name> + <value>0x2</value> + </enum> + <enum> + <name>DIV_BY_8</name> + <value>0x3</value> + </enum> + </field> + <field> + <name>SELECT</name> + <position>0</position> + <width>4</width> + <enum> + <name>NEVER_TICK</name> + <value>0x0</value> + </enum> + <enum> + <name>PWM0</name> + <value>0x1</value> + </enum> + <enum> + <name>PWM1</name> + <value>0x2</value> + </enum> + <enum> + <name>PWM2</name> + <value>0x3</value> + </enum> + <enum> + <name>PWM3</name> + <value>0x4</value> + </enum> + <enum> + <name>PWM4</name> + <value>0x5</value> + </enum> + <enum> + <name>ROTARYA</name> + <value>0x6</value> + </enum> + <enum> + <name>ROTARYB</name> + <value>0x7</value> + </enum> + <enum> + <name>32KHZ_XTAL</name> + <value>0x8</value> + </enum> + <enum> + <name>8KHZ_XTAL</name> + <value>0x9</value> + </enum> + <enum> + <name>4KHZ_XTAL</name> + <value>0xa</value> + </enum> + <enum> + <name>1KHZ_XTAL</name> + <value>0xb</value> + </enum> + <enum> + <name>TICK_ALWAYS</name> + <value>0xc</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + </node> + <node> + <name>UARTAPP</name> + <title>Application UART</title> + <desc>Application UART</desc> + <instance> + <name>UARTAPP</name> + <address>0x8006c000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>RUN</name> + <position>28</position> + </field> + <field> + <name>RX_SOURCE</name> + <position>25</position> + </field> + <field> + <name>RXTO_ENABLE</name> + <position>24</position> + </field> + <field> + <name>RXTIMEOUT</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>RUN</name> + <position>28</position> + </field> + <field> + <name>XFER_COUNT</name> + <position>0</position> + <width>16</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL2</name> + <instance> + <name>CTRL2</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>INVERT_RTS</name> + <position>31</position> + </field> + <field> + <name>INVERT_CTS</name> + <position>30</position> + </field> + <field> + <name>INVERT_TX</name> + <position>29</position> + </field> + <field> + <name>INVERT_RX</name> + <position>28</position> + </field> + <field> + <name>DMAONERR</name> + <position>26</position> + </field> + <field> + <name>TXDMAE</name> + <position>25</position> + </field> + <field> + <name>RXDMAE</name> + <position>24</position> + </field> + <field> + <name>RXIFLSEL</name> + <position>20</position> + <width>3</width> + <enum> + <name>NOT_EMPTY</name> + <value>0x0</value> + </enum> + <enum> + <name>ONE_QUARTER</name> + <value>0x1</value> + </enum> + <enum> + <name>ONE_HALF</name> + <value>0x2</value> + </enum> + <enum> + <name>THREE_QUARTERS</name> + <value>0x3</value> + </enum> + <enum> + <name>SEVEN_EIGHTHS</name> + <value>0x4</value> + </enum> + <enum> + <name>INVALID5</name> + <value>0x5</value> + </enum> + <enum> + <name>INVALID6</name> + <value>0x6</value> + </enum> + <enum> + <name>INVALID7</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>TXIFLSEL</name> + <position>16</position> + <width>3</width> + <enum> + <name>EMPTY</name> + <value>0x0</value> + </enum> + <enum> + <name>ONE_QUARTER</name> + <value>0x1</value> + </enum> + <enum> + <name>ONE_HALF</name> + <value>0x2</value> + </enum> + <enum> + <name>THREE_QUARTERS</name> + <value>0x3</value> + </enum> + <enum> + <name>SEVEN_EIGHTHS</name> + <value>0x4</value> + </enum> + <enum> + <name>INVALID5</name> + <value>0x5</value> + </enum> + <enum> + <name>INVALID6</name> + <value>0x6</value> + </enum> + <enum> + <name>INVALID7</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>CTSEN</name> + <position>15</position> + </field> + <field> + <name>RTSEN</name> + <position>14</position> + </field> + <field> + <name>OUT2</name> + <position>13</position> + </field> + <field> + <name>OUT1</name> + <position>12</position> + </field> + <field> + <name>RTS</name> + <position>11</position> + </field> + <field> + <name>DTR</name> + <position>10</position> + </field> + <field> + <name>RXE</name> + <position>9</position> + </field> + <field> + <name>TXE</name> + <position>8</position> + </field> + <field> + <name>LBE</name> + <position>7</position> + </field> + <field> + <name>SIRLP</name> + <position>2</position> + </field> + <field> + <name>SIREN</name> + <position>1</position> + </field> + <field> + <name>UARTEN</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>LINECTRL</name> + <instance> + <name>LINECTRL</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>BAUD_DIVINT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>BAUD_DIVFRAC</name> + <position>8</position> + <width>6</width> + </field> + <field> + <name>SPS</name> + <position>7</position> + </field> + <field> + <name>WLEN</name> + <position>5</position> + <width>2</width> + </field> + <field> + <name>FEN</name> + <position>4</position> + </field> + <field> + <name>STP2</name> + <position>3</position> + </field> + <field> + <name>EPS</name> + <position>2</position> + </field> + <field> + <name>PEN</name> + <position>1</position> + </field> + <field> + <name>BRK</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>INTR</name> + <instance> + <name>INTR</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>OEIEN</name> + <position>26</position> + </field> + <field> + <name>BEIEN</name> + <position>25</position> + </field> + <field> + <name>PEIEN</name> + <position>24</position> + </field> + <field> + <name>FEIEN</name> + <position>23</position> + </field> + <field> + <name>RTIEN</name> + <position>22</position> + </field> + <field> + <name>TXIEN</name> + <position>21</position> + </field> + <field> + <name>RXIEN</name> + <position>20</position> + </field> + <field> + <name>DSRMIEN</name> + <position>19</position> + </field> + <field> + <name>DCDMIEN</name> + <position>18</position> + </field> + <field> + <name>CTSMIEN</name> + <position>17</position> + </field> + <field> + <name>RIMIEN</name> + <position>16</position> + </field> + <field> + <name>OEIS</name> + <position>10</position> + </field> + <field> + <name>BEIS</name> + <position>9</position> + </field> + <field> + <name>PEIS</name> + <position>8</position> + </field> + <field> + <name>FEIS</name> + <position>7</position> + </field> + <field> + <name>RTIS</name> + <position>6</position> + </field> + <field> + <name>TXIS</name> + <position>5</position> + </field> + <field> + <name>RXIS</name> + <position>4</position> + </field> + <field> + <name>DSRMIS</name> + <position>3</position> + </field> + <field> + <name>DCDMIS</name> + <position>2</position> + </field> + <field> + <name>CTSMIS</name> + <position>1</position> + </field> + <field> + <name>RIMIS</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DATA</name> + <instance> + <name>DATA</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>DATA</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>STAT</name> + <instance> + <name>STAT</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>PRESENT</name> + <position>31</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>HISPEED</name> + <position>30</position> + <enum> + <name>UNAVAILABLE</name> + <value>0x0</value> + </enum> + <enum> + <name>AVAILABLE</name> + <value>0x1</value> + </enum> + </field> + <field> + <name>BUSY</name> + <position>29</position> + </field> + <field> + <name>CTS</name> + <position>28</position> + </field> + <field> + <name>TXFE</name> + <position>27</position> + </field> + <field> + <name>RXFF</name> + <position>26</position> + </field> + <field> + <name>TXFF</name> + <position>25</position> + </field> + <field> + <name>RXFE</name> + <position>24</position> + </field> + <field> + <name>RXBYTE_INVALID</name> + <position>20</position> + <width>4</width> + </field> + <field> + <name>OERR</name> + <position>19</position> + </field> + <field> + <name>BERR</name> + <position>18</position> + </field> + <field> + <name>PERR</name> + <position>17</position> + </field> + <field> + <name>FERR</name> + <position>16</position> + </field> + <field> + <name>RXCOUNT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>TXDMARUN</name> + <position>5</position> + </field> + <field> + <name>RXDMARUN</name> + <position>4</position> + </field> + <field> + <name>TXCMDEND</name> + <position>3</position> + </field> + <field> + <name>RXCMDEND</name> + <position>2</position> + </field> + <field> + <name>TXDMARQ</name> + <position>1</position> + </field> + <field> + <name>RXDMARQ</name> + <position>0</position> + </field> + </register> + </node> + </node> + <node> + <name>UARTDBG</name> + <title>Debug UART</title> + <desc>Debug UART</desc> + <instance> + <name>UARTDBG</name> + <address>0x80070000</address> + </instance> + <node> + <name>DR</name> + <instance> + <name>DR</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>OE</name> + <position>11</position> + </field> + <field> + <name>BE</name> + <position>10</position> + </field> + <field> + <name>PE</name> + <position>9</position> + </field> + <field> + <name>FE</name> + <position>8</position> + </field> + <field> + <name>DATA</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>RSR_ECR</name> + <instance> + <name>RSR_ECR</name> + <address>0x4</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>8</position> + <width>24</width> + </field> + <field> + <name>EC</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>OE</name> + <position>3</position> + </field> + <field> + <name>BE</name> + <position>2</position> + </field> + <field> + <name>PE</name> + <position>1</position> + </field> + <field> + <name>FE</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>FR</name> + <instance> + <name>FR</name> + <address>0x18</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>9</position> + <width>7</width> + </field> + <field> + <name>RI</name> + <position>8</position> + </field> + <field> + <name>TXFE</name> + <position>7</position> + </field> + <field> + <name>RXFF</name> + <position>6</position> + </field> + <field> + <name>TXFF</name> + <position>5</position> + </field> + <field> + <name>RXFE</name> + <position>4</position> + </field> + <field> + <name>BUSY</name> + <position>3</position> + </field> + <field> + <name>DCD</name> + <position>2</position> + </field> + <field> + <name>DSR</name> + <position>1</position> + </field> + <field> + <name>CTS</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>ILPR</name> + <instance> + <name>ILPR</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>8</position> + <width>24</width> + </field> + <field> + <name>ILPDVSR</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>IBRD</name> + <instance> + <name>IBRD</name> + <address>0x24</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>BAUD_DIVINT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>FBRD</name> + <instance> + <name>FBRD</name> + <address>0x28</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>8</position> + <width>24</width> + </field> + <field> + <name>RESERVED</name> + <position>6</position> + <width>2</width> + </field> + <field> + <name>BAUD_DIVFRAC</name> + <position>0</position> + <width>6</width> + </field> + </register> + </node> + <node> + <name>LCR_H</name> + <instance> + <name>LCR_H</name> + <address>0x2c</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>SPS</name> + <position>7</position> + </field> + <field> + <name>WLEN</name> + <position>5</position> + <width>2</width> + </field> + <field> + <name>FEN</name> + <position>4</position> + </field> + <field> + <name>STP2</name> + <position>3</position> + </field> + <field> + <name>EPS</name> + <position>2</position> + </field> + <field> + <name>PEN</name> + <position>1</position> + </field> + <field> + <name>BRK</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>CR</name> + <instance> + <name>CR</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>CTSEN</name> + <position>15</position> + </field> + <field> + <name>RTSEN</name> + <position>14</position> + </field> + <field> + <name>OUT2</name> + <position>13</position> + </field> + <field> + <name>OUT1</name> + <position>12</position> + </field> + <field> + <name>RTS</name> + <position>11</position> + </field> + <field> + <name>DTR</name> + <position>10</position> + </field> + <field> + <name>RXE</name> + <position>9</position> + </field> + <field> + <name>TXE</name> + <position>8</position> + </field> + <field> + <name>LBE</name> + <position>7</position> + </field> + <field> + <name>RESERVED</name> + <position>3</position> + <width>4</width> + </field> + <field> + <name>SIRLP</name> + <position>2</position> + </field> + <field> + <name>SIREN</name> + <position>1</position> + </field> + <field> + <name>UARTEN</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>IFLS</name> + <instance> + <name>IFLS</name> + <address>0x34</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>6</position> + <width>10</width> + </field> + <field> + <name>RXIFLSEL</name> + <position>3</position> + <width>3</width> + <enum> + <name>NOT_EMPTY</name> + <value>0x0</value> + </enum> + <enum> + <name>ONE_QUARTER</name> + <value>0x1</value> + </enum> + <enum> + <name>ONE_HALF</name> + <value>0x2</value> + </enum> + <enum> + <name>THREE_QUARTERS</name> + <value>0x3</value> + </enum> + <enum> + <name>SEVEN_EIGHTHS</name> + <value>0x4</value> + </enum> + <enum> + <name>INVALID5</name> + <value>0x5</value> + </enum> + <enum> + <name>INVALID6</name> + <value>0x6</value> + </enum> + <enum> + <name>INVALID7</name> + <value>0x7</value> + </enum> + </field> + <field> + <name>TXIFLSEL</name> + <position>0</position> + <width>3</width> + <enum> + <name>EMPTY</name> + <value>0x0</value> + </enum> + <enum> + <name>ONE_QUARTER</name> + <value>0x1</value> + </enum> + <enum> + <name>ONE_HALF</name> + <value>0x2</value> + </enum> + <enum> + <name>THREE_QUARTERS</name> + <value>0x3</value> + </enum> + <enum> + <name>SEVEN_EIGHTHS</name> + <value>0x4</value> + </enum> + <enum> + <name>INVALID5</name> + <value>0x5</value> + </enum> + <enum> + <name>INVALID6</name> + <value>0x6</value> + </enum> + <enum> + <name>INVALID7</name> + <value>0x7</value> + </enum> + </field> + </register> + </node> + <node> + <name>IMSC</name> + <instance> + <name>IMSC</name> + <address>0x38</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>11</position> + <width>5</width> + </field> + <field> + <name>OEIM</name> + <position>10</position> + </field> + <field> + <name>BEIM</name> + <position>9</position> + </field> + <field> + <name>PEIM</name> + <position>8</position> + </field> + <field> + <name>FEIM</name> + <position>7</position> + </field> + <field> + <name>RTIM</name> + <position>6</position> + </field> + <field> + <name>TXIM</name> + <position>5</position> + </field> + <field> + <name>RXIM</name> + <position>4</position> + </field> + <field> + <name>DSRMIM</name> + <position>3</position> + </field> + <field> + <name>DCDMIM</name> + <position>2</position> + </field> + <field> + <name>CTSMIM</name> + <position>1</position> + </field> + <field> + <name>RIMIM</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>RIS</name> + <instance> + <name>RIS</name> + <address>0x3c</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>11</position> + <width>5</width> + </field> + <field> + <name>OERIS</name> + <position>10</position> + </field> + <field> + <name>BERIS</name> + <position>9</position> + </field> + <field> + <name>PERIS</name> + <position>8</position> + </field> + <field> + <name>FERIS</name> + <position>7</position> + </field> + <field> + <name>RTRIS</name> + <position>6</position> + </field> + <field> + <name>TXRIS</name> + <position>5</position> + </field> + <field> + <name>RXRIS</name> + <position>4</position> + </field> + <field> + <name>DSRRMIS</name> + <position>3</position> + </field> + <field> + <name>DCDRMIS</name> + <position>2</position> + </field> + <field> + <name>CTSRMIS</name> + <position>1</position> + </field> + <field> + <name>RIRMIS</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>MIS</name> + <instance> + <name>MIS</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>11</position> + <width>5</width> + </field> + <field> + <name>OEMIS</name> + <position>10</position> + </field> + <field> + <name>BEMIS</name> + <position>9</position> + </field> + <field> + <name>PEMIS</name> + <position>8</position> + </field> + <field> + <name>FEMIS</name> + <position>7</position> + </field> + <field> + <name>RTMIS</name> + <position>6</position> + </field> + <field> + <name>TXMIS</name> + <position>5</position> + </field> + <field> + <name>RXMIS</name> + <position>4</position> + </field> + <field> + <name>DSRMMIS</name> + <position>3</position> + </field> + <field> + <name>DCDMMIS</name> + <position>2</position> + </field> + <field> + <name>CTSMMIS</name> + <position>1</position> + </field> + <field> + <name>RIMMIS</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>ICR</name> + <instance> + <name>ICR</name> + <address>0x44</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>11</position> + <width>5</width> + </field> + <field> + <name>OEIC</name> + <position>10</position> + </field> + <field> + <name>BEIC</name> + <position>9</position> + </field> + <field> + <name>PEIC</name> + <position>8</position> + </field> + <field> + <name>FEIC</name> + <position>7</position> + </field> + <field> + <name>RTIC</name> + <position>6</position> + </field> + <field> + <name>TXIC</name> + <position>5</position> + </field> + <field> + <name>RXIC</name> + <position>4</position> + </field> + <field> + <name>DSRMIC</name> + <position>3</position> + </field> + <field> + <name>DCDMIC</name> + <position>2</position> + </field> + <field> + <name>CTSMIC</name> + <position>1</position> + </field> + <field> + <name>RIMIC</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>DMACR</name> + <instance> + <name>DMACR</name> + <address>0x48</address> + </instance> + <register> + <field> + <name>UNAVAILABLE</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>RESERVED</name> + <position>3</position> + <width>13</width> + </field> + <field> + <name>DMAONERR</name> + <position>2</position> + </field> + <field> + <name>TXDMAE</name> + <position>1</position> + </field> + <field> + <name>RXDMAE</name> + <position>0</position> + </field> + </register> + </node> + </node> + <node> + <name>ARC</name> + <title>USB Controller</title> + <desc>USB High-Speed Host/Device Controller</desc> + <instance> + <name>ARC</name> + <address>0x80080000</address> + </instance> + <node> + <name>BASE</name> + <instance> + <name>BASE</name> + <address>0x0</address> + </instance> + <register/> + </node> + <node> + <name>ID</name> + <instance> + <name>ID</name> + <address>0x0</address> + </instance> + <register/> + </node> + <node> + <name>HCSPARAMS</name> + <instance> + <name>HCSPARAMS</name> + <address>0x104</address> + </instance> + <register/> + </node> + <node> + <name>USBCMD</name> + <instance> + <name>USBCMD</name> + <address>0x140</address> + </instance> + <register/> + </node> + <node> + <name>USBSTS</name> + <instance> + <name>USBSTS</name> + <address>0x144</address> + </instance> + <register/> + </node> + <node> + <name>USBINTR</name> + <instance> + <name>USBINTR</name> + <address>0x148</address> + </instance> + <register/> + </node> + <node> + <name>FRINDEX</name> + <instance> + <name>FRINDEX</name> + <address>0x14c</address> + </instance> + <register/> + </node> + <node> + <name>DEVADDR</name> + <instance> + <name>DEVADDR</name> + <address>0x154</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTLISTADDR</name> + <instance> + <name>ENDPTLISTADDR</name> + <address>0x158</address> + </instance> + <register/> + </node> + <node> + <name>PORTSC1</name> + <instance> + <name>PORTSC1</name> + <address>0x184</address> + </instance> + <register/> + </node> + <node> + <name>OTGSC</name> + <instance> + <name>OTGSC</name> + <address>0x1a4</address> + </instance> + <register/> + </node> + <node> + <name>USBMODE</name> + <instance> + <name>USBMODE</name> + <address>0x1a8</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTSETUPSTAT</name> + <instance> + <name>ENDPTSETUPSTAT</name> + <address>0x1ac</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTPRIME</name> + <instance> + <name>ENDPTPRIME</name> + <address>0x1b0</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTFLUSH</name> + <instance> + <name>ENDPTFLUSH</name> + <address>0x1b4</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTSTATUS</name> + <instance> + <name>ENDPTSTATUS</name> + <address>0x1b8</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCOMPLETE</name> + <instance> + <name>ENDPTCOMPLETE</name> + <address>0x1bc</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL0</name> + <instance> + <name>ENDPTCTRL0</name> + <address>0x1c0</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL1</name> + <instance> + <name>ENDPTCTRL1</name> + <address>0x1c4</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL2</name> + <instance> + <name>ENDPTCTRL2</name> + <address>0x1c8</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL3</name> + <instance> + <name>ENDPTCTRL3</name> + <address>0x1cc</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL4</name> + <instance> + <name>ENDPTCTRL4</name> + <address>0x1d0</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL5</name> + <instance> + <name>ENDPTCTRL5</name> + <address>0x1d4</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL6</name> + <instance> + <name>ENDPTCTRL6</name> + <address>0x1d8</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL7</name> + <instance> + <name>ENDPTCTRL7</name> + <address>0x1dc</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL8</name> + <instance> + <name>ENDPTCTRL8</name> + <address>0x1e0</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL9</name> + <instance> + <name>ENDPTCTRL9</name> + <address>0x1e4</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL10</name> + <instance> + <name>ENDPTCTRL10</name> + <address>0x1e8</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL11</name> + <instance> + <name>ENDPTCTRL11</name> + <address>0x1ec</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL12</name> + <instance> + <name>ENDPTCTRL12</name> + <address>0x1f0</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL13</name> + <instance> + <name>ENDPTCTRL13</name> + <address>0x1f4</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL14</name> + <instance> + <name>ENDPTCTRL14</name> + <address>0x1f8</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRL15</name> + <instance> + <name>ENDPTCTRL15</name> + <address>0x1fc</address> + </instance> + <register/> + </node> + <node> + <name>ENDPTCTRLn</name> + <instance> + <name>ENDPTCTRLn</name> + <range> + <first>0</first> + <count>5</count> + <base>0x1c0</base> + <stride>0x4</stride> + </range> + </instance> + <register/> + </node> + </node> + <node> + <name>USBPHY</name> + <title>USB Physical Interface</title> + <desc>Integrated USB 2.0 PHY</desc> + <instance> + <name>USBPHY</name> + <address>0x8007c000</address> + </instance> + <node> + <name>PWD</name> + <instance> + <name>PWD</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>RXPWDRX</name> + <position>20</position> + </field> + <field> + <name>RXPWDDIFF</name> + <position>19</position> + </field> + <field> + <name>RXPWD1PT1</name> + <position>18</position> + </field> + <field> + <name>RXPWDENV</name> + <position>17</position> + </field> + <field> + <name>TXPWDCOMP</name> + <position>14</position> + </field> + <field> + <name>TXPWDVBG</name> + <position>13</position> + </field> + <field> + <name>TXPWDV2I</name> + <position>12</position> + </field> + <field> + <name>TXPWDIBIAS</name> + <position>11</position> + </field> + <field> + <name>TXPWDFS</name> + <position>10</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>TX</name> + <instance> + <name>TX</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>TXCMPOUT_STATUS</name> + <position>23</position> + </field> + <field> + <name>TXENCAL45DP</name> + <position>21</position> + </field> + <field> + <name>TXCAL45DP</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>TXENCAL45DN</name> + <position>13</position> + </field> + <field> + <name>TXCAL45DN</name> + <position>8</position> + <width>5</width> + </field> + <field> + <name>TXCALIBRATE</name> + <position>7</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>RX</name> + <instance> + <name>RX</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>RXDBYPASS</name> + <position>22</position> + </field> + <field> + <name>DISCONADJ</name> + <position>4</position> + <width>2</width> + </field> + <field> + <name>ENVADJ</name> + <position>0</position> + <width>2</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL</name> + <instance> + <name>CTRL</name> + <address>0x30</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>UTMI_SUSPENDM</name> + <position>29</position> + </field> + <field> + <name>RESUME_IRQ</name> + <position>10</position> + </field> + <field> + <name>ENIRQRESUMEDETECT</name> + <position>9</position> + </field> + <field> + <name>ENOTGIDDETECT</name> + <position>7</position> + </field> + <field> + <name>ENDEVPLUGINDETECT</name> + <position>4</position> + </field> + <field> + <name>HOSTDISCONDETECT_IRQ</name> + <position>3</position> + </field> + <field> + <name>ENIRQHOSTDISCON</name> + <position>2</position> + </field> + <field> + <name>ENHOSTDISCONDETECT</name> + <position>1</position> + </field> + <field> + <name>ENHSPRECHARGEXMIT</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>STATUS</name> + <instance> + <name>STATUS</name> + <address>0x40</address> + </instance> + <register> + <field> + <name>RESUME_STATUS</name> + <position>10</position> + </field> + <field> + <name>OTGID_STATUS</name> + <position>8</position> + </field> + <field> + <name>DEVPLUGIN_STATUS</name> + <position>6</position> + </field> + <field> + <name>HOSTDISCONDETECT_STATUS</name> + <position>3</position> + </field> + </register> + </node> + <node> + <name>DEBUG</name> + <instance> + <name>DEBUG</name> + <address>0x50</address> + </instance> + <register> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>SQUELCHRESETLENGTH</name> + <position>25</position> + <width>4</width> + </field> + <field> + <name>ENSQUELCHRESET</name> + <position>24</position> + </field> + <field> + <name>SQUELCHRESETCOUNT</name> + <position>16</position> + <width>5</width> + </field> + <field> + <name>ENTX2RXCOUNT</name> + <position>12</position> + </field> + <field> + <name>TX2RXCOUNT</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>ENHSTPULLDOWN</name> + <position>4</position> + <width>2</width> + </field> + <field> + <name>HSTPULLDOWN</name> + <position>2</position> + <width>2</width> + </field> + <field> + <name>DEBUG_INTERFACE_HOLD</name> + <position>1</position> + </field> + <field> + <name>OTGIDPIOLOCK</name> + <position>0</position> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEBUG0_STATUS</name> + <instance> + <name>DEBUG0_STATUS</name> + <address>0x60</address> + </instance> + <register> + <field> + <name>SQUELCH_COUNT</name> + <position>26</position> + <width>6</width> + </field> + <field> + <name>UTMI_RXERROR_FAIL_COUNT</name> + <position>16</position> + <width>10</width> + </field> + <field> + <name>LOOP_BACK_FAIL_COUNT</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>DEBUG1_STATUS</name> + <instance> + <name>DEBUG1_STATUS</name> + <address>0x70</address> + </instance> + <register> + <field> + <name>UTMI_TX_DATA</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>UTMI_RX_DATA</name> + <position>0</position> + <width>16</width> + </field> + </register> + </node> + <node> + <name>DEBUG2_STATUS</name> + <instance> + <name>DEBUG2_STATUS</name> + <address>0x80</address> + </instance> + <register> + <field> + <name>UTMI_TXVALIDH</name> + <position>22</position> + </field> + <field> + <name>UTMI_TXVALID</name> + <position>21</position> + </field> + <field> + <name>UTMI_TERMSELECT</name> + <position>20</position> + </field> + <field> + <name>UTMI_XCVRSELECT</name> + <position>18</position> + <width>2</width> + </field> + <field> + <name>UTMI_OPMODE</name> + <position>16</position> + <width>2</width> + </field> + <field> + <name>UTMI_LINESTATE</name> + <position>6</position> + <width>2</width> + </field> + <field> + <name>UTMI_SUSPENDM</name> + <position>5</position> + </field> + <field> + <name>UTMI_RXVALIDH</name> + <position>4</position> + </field> + <field> + <name>UTMI_RXVALID</name> + <position>3</position> + </field> + <field> + <name>UTMI_RXACTIVE</name> + <position>2</position> + </field> + <field> + <name>UTMI_RXERROR</name> + <position>1</position> + </field> + <field> + <name>UTMI_TXREADY</name> + <position>0</position> + </field> + </register> + </node> + <node> + <name>DEBUG3_STATUS</name> + <instance> + <name>DEBUG3_STATUS</name> + <address>0x90</address> + </instance> + <register> + <field> + <name>B_CNT_FSM</name> + <position>28</position> + <width>3</width> + </field> + <field> + <name>SQ_UNLOCK_FSM</name> + <position>23</position> + <width>3</width> + </field> + <field> + <name>BIT_CNT</name> + <position>12</position> + <width>10</width> + </field> + <field> + <name>MAIN_HS_RX_FSM</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>UNSTUFF_BIT_CNT</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>DEBUG4_STATUS</name> + <instance> + <name>DEBUG4_STATUS</name> + <address>0xa0</address> + </instance> + <register> + <field> + <name>BYTE_FSM</name> + <position>16</position> + <width>13</width> + </field> + <field> + <name>SND_FSM</name> + <position>0</position> + <width>14</width> + </field> + </register> + </node> + <node> + <name>DEBUG5_STATUS</name> + <instance> + <name>DEBUG5_STATUS</name> + <address>0xb0</address> + </instance> + <register> + <field> + <name>MAIN_FSM</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>SYNC_FSM</name> + <position>16</position> + <width>6</width> + </field> + <field> + <name>PRECHARGE_FSM</name> + <position>12</position> + <width>3</width> + </field> + <field> + <name>SHIFT_FSM</name> + <position>8</position> + <width>3</width> + </field> + <field> + <name>SOF_FSM</name> + <position>0</position> + <width>5</width> + </field> + </register> + </node> + <node> + <name>DEBUG6_STATUS</name> + <instance> + <name>DEBUG6_STATUS</name> + <address>0xc0</address> + </instance> + <register> + <field> + <name>FIRST_EOP_FSM</name> + <position>8</position> + <width>3</width> + </field> + <field> + <name>EOP_FSM</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>DEBUG7_STATUS</name> + <instance> + <name>DEBUG7_STATUS</name> + <address>0xd0</address> + </instance> + <register> + <field> + <name>FIRST_DATA_FSM</name> + <position>28</position> + <width>2</width> + </field> + <field> + <name>BIT_CNT</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>UNSTUFF_CNT</name> + <position>20</position> + <width>3</width> + </field> + <field> + <name>LD_FSM</name> + <position>16</position> + <width>2</width> + </field> + <field> + <name>FIFO_FSM</name> + <position>8</position> + <width>6</width> + </field> + <field> + <name>MAIN_FSM</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>EOP_FSM</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + <node> + <name>DEBUG8_STATUS</name> + <instance> + <name>DEBUG8_STATUS</name> + <address>0xe0</address> + </instance> + <register> + <field> + <name>RX_SIE_FSM</name> + <position>28</position> + <width>4</width> + </field> + <field> + <name>TX_SIE_FSM</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>SHIFT_FSM</name> + <position>8</position> + <width>2</width> + </field> + <field> + <name>FS_TX_MAIN_FSM</name> + <position>0</position> + <width>7</width> + </field> + </register> + </node> + </node> +</soc> diff --git a/utils/regtools/desc/regs-stmp3700.xml b/utils/regtools/desc/regs-stmp3700.xml new file mode 100644 index 0000000000..3640efdc4b --- /dev/null +++ b/utils/regtools/desc/regs-stmp3700.xml @@ -0,0 +1,21751 @@ +<?xml version="1.0"?> +<soc version="2"> + <name>stmp3700</name> + <title>STMP3700</title> + <author>Amaury Pouly</author> + <version>2.4.0</version> + <node> + <name>APBH</name> + <title>APHB DMA</title> + <desc>AHB-to-APBH Bridge with DMA</desc> + <instance> + <name>APBH</name> + <address>0x80004000</address> + </instance> + <node> + <name>CTRL0</name> + <instance> + <name>CTRL0</name> + <address>0x0</address> + </instance> + <register> + <field> + <name>SFTRST</name> + <position>31</position> + </field> + <field> + <name>CLKGATE</name> + <position>30</position> + </field> + <field> + <name>RESET_CHANNEL</name> + <position>16</position> + <width>8</width> + <enum> + <name>SSP1</name> + <value>0x1</value> + </enum> + <enum> + <name>SSP2</name> + <value>0x2</value> + </enum> + <enum> + <name>LCDIF</name> + <value>0x4</value> + </enum> + <enum> + <name>ATA</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND0</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND1</name> + <value>0x20</value> + </enum> + <enum> + <name>NAND2</name> + <value>0x40</value> + </enum> + <enum> + <name>NAND3</name> + <value>0x80</value> + </enum> + </field> + <field> + <name>CLKGATE_CHANNEL</name> + <position>8</position> + <width>8</width> + <enum> + <name>SSP1</name> + <value>0x1</value> + </enum> + <enum> + <name>SSP2</name> + <value>0x2</value> + </enum> + <enum> + <name>LCDIF</name> + <value>0x4</value> + </enum> + <enum> + <name>ATA</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND0</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND1</name> + <value>0x20</value> + </enum> + <enum> + <name>NAND2</name> + <value>0x40</value> + </enum> + <enum> + <name>NAND3</name> + <value>0x80</value> + </enum> + </field> + <field> + <name>FREEZE_CHANNEL</name> + <position>0</position> + <width>8</width> + <enum> + <name>SSP1</name> + <value>0x1</value> + </enum> + <enum> + <name>SSP2</name> + <value>0x2</value> + </enum> + <enum> + <name>LCDIF</name> + <value>0x4</value> + </enum> + <enum> + <name>ATA</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND0</name> + <value>0x10</value> + </enum> + <enum> + <name>NAND1</name> + <value>0x20</value> + </enum> + <enum> + <name>NAND2</name> + <value>0x30</value> + </enum> + <enum> + <name>NAND3</name> + <value>0x40</value> + </enum> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>CTRL1</name> + <instance> + <name>CTRL1</name> + <address>0x10</address> + </instance> + <register> + <field> + <name>CH_AHB_ERROR_IRQ</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>CH_CMDCMPLT_IRQ_EN</name> + <position>8</position> + <width>8</width> + </field> + <field> + <name>CH_CMDCMPLT_IRQ</name> + <position>0</position> + <width>8</width> + </field> + <variant> + <type>set</type> + <offset>4</offset> + </variant> + <variant> + <type>clr</type> + <offset>8</offset> + </variant> + <variant> + <type>tog</type> + <offset>12</offset> + </variant> + </register> + </node> + <node> + <name>DEVSEL</name> + <instance> + <name>DEVSEL</name> + <address>0x20</address> + </instance> + <register> + <field> + <name>CH7</name> + <position>28</position> + <width>4</width> + </field> + <field> + <name>CH6</name> + <position>24</position> + <width>4</width> + </field> + <field> + <name>CH5</name> + <position>20</position> + <width>4</width> + </field> + <field> + <name>CH4</name> + <position>16</position> + <width>4</width> + </field> + <field> + <name>CH3</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>CH2</name> + <position>8</position> + <width>4</width> + </field> + <field> + <name>CH1</name> + <position>4</position> + <width>4</width> + </field> + <field> + <name>CH0</name> + <position>0</position> + <width>4</width> + </field> + </register> + </node> + <node> + <name>CHn_CURCMDAR</name> + <instance> + <name>CHn_CURCMDAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x40</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>CMD_ADDR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_NXTCMDAR</name> + <instance> + <name>CHn_NXTCMDAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x50</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>CMD_ADDR</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_CMD</name> + <instance> + <name>CHn_CMD</name> + <range> + <first>0</first> + <count>8</count> + <base>0x60</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>XFER_COUNT</name> + <position>16</position> + <width>16</width> + </field> + <field> + <name>CMDWORDS</name> + <position>12</position> + <width>4</width> + </field> + <field> + <name>HALTONTERMINATE</name> + <position>8</position> + </field> + <field> + <name>WAIT4ENDCMD</name> + <position>7</position> + </field> + <field> + <name>SEMAPHORE</name> + <position>6</position> + </field> + <field> + <name>NANDWAIT4READY</name> + <position>5</position> + </field> + <field> + <name>NANDLOCK</name> + <position>4</position> + </field> + <field> + <name>IRQONCMPLT</name> + <position>3</position> + </field> + <field> + <name>CHAIN</name> + <position>2</position> + </field> + <field> + <name>COMMAND</name> + <position>0</position> + <width>2</width> + <enum> + <name>NO_DMA_XFER</name> + <value>0x0</value> + </enum> + <enum> + <name>DMA_WRITE</name> + <value>0x1</value> + </enum> + <enum> + <name>DMA_READ</name> + <value>0x2</value> + </enum> + <enum> + <name>DMA_SENSE</name> + <value>0x3</value> + </enum> + </field> + </register> + </node> + <node> + <name>CHn_BAR</name> + <instance> + <name>CHn_BAR</name> + <range> + <first>0</first> + <count>8</count> + <base>0x70</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>ADDRESS</name> + <position>0</position> + <width>32</width> + </field> + </register> + </node> + <node> + <name>CHn_SEMA</name> + <instance> + <name>CHn_SEMA</name> + <range> + <first>0</first> + <count>8</count> + <base>0x80</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>PHORE</name> + <position>16</position> + <width>8</width> + </field> + <field> + <name>INCREMENT_SEMA</name> + <position>0</position> + <width>8</width> + </field> + </register> + </node> + <node> + <name>CHn_DEBUG1</name> + <instance> + <name>CHn_DEBUG1</name> + <range> + <first>0</first> + <count>8</count> + <base>0x90</base> + <stride>0x70</stride> + </range> + </instance> + <register> + <field> + <name>REQ</name> + <position>31</position> + </field> + <field> + <name>BURST</name> + <position>30</position> + </field> + <field> + <name>KICK</name> + <position>29</position> + </field> + <field> + <name>END</name> + <position>28</position> + </field> + <field> + <name>NEXTCMDADDRVALID</name> + <position>24</position> + </field> + <field> + <name>RD_FIFO_EMPTY</name> + <position>23</position> + </field> + <field> + <name>RD_FIFO_FULL</name> + <position>22</position> + </field> + <field> + <name>WR_FIFO_EMPTY</name> + <position>21</position> + </field> + <field> + <name>WR_FIFO_FULL</name> + <position>20</position> + </field> + <field> + <name>STATEMACHINE</name> + <position>0</position> + <width>5</width> + <enum> + <name>IDLE</name> + <value>0x0</value> + </enum> + <enum> + <name>REQ_CMD1</name> + <value>0x1</value> + </enum> + <enum> + <name>REQ_CMD3</name> + <value>0x2</value> + </enum> + <enum> + <name>REQ_CMD2</name> + <value>0x3</value> + </enum> + <enum> + <name>XFER_DECODE</name> + <value>0x4</value> + </enum> + <enum> + <name>REQ_WAIT</name> + <value>0x5</value> + </enum> + <enum> + <name>REQ_CMD4</name> + <value>0x6</value> + </enum> + <enum> + <name>PIO_REQ</name> + <value>0x7</value> + </enum> + <enum> + <name>READ_FLUSH</name> + <value>0x8</value> + </enum> + <enum> + <name>READ_WAIT</name> + <value>0x9</value> + </enum> + <enum> + <name>WRITE</name> + <value>0xc</value> + </enum> + <enum> + <name>READ_REQ</name> + <value>0xd</value> + </enum> + <enum> + <name>CHECK_CHAIN</name> + <value>0xe</value> + </enum> + <enum> + <name>XFER_COMPLETE</name> + <value>0xf |