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-rw-r--r--bootloader/SOURCES3
-rw-r--r--bootloader/sansa_as3525.c58
-rw-r--r--bootloader/show_logo.c6
-rw-r--r--docs/CREDITS1
-rw-r--r--firmware/SOURCES8
-rw-r--r--firmware/export/as3525.h315
-rw-r--r--firmware/export/config-clip.h176
-rw-r--r--firmware/export/config.h7
-rw-r--r--firmware/export/cpu.h3
-rw-r--r--firmware/export/timer.h2
-rw-r--r--firmware/target/arm/as3525/boot.lds43
-rw-r--r--firmware/target/arm/as3525/clip/adc-target.h24
-rw-r--r--firmware/target/arm/as3525/clip/backlight-target.h37
-rw-r--r--firmware/target/arm/as3525/clip/button-clip.c92
-rw-r--r--firmware/target/arm/as3525/clip/button-target.h60
-rw-r--r--firmware/target/arm/as3525/clip/lcd-ssd1303.c312
-rw-r--r--firmware/target/arm/as3525/clip/system-target.h28
-rw-r--r--firmware/target/arm/as3525/clip/timer-target.h38
-rw-r--r--firmware/target/arm/as3525/system-as3525.c141
-rwxr-xr-xtools/configure21
20 files changed, 1372 insertions, 3 deletions
diff --git a/bootloader/SOURCES b/bootloader/SOURCES
index c54d1e16b1..f0c98a8bd3 100644
--- a/bootloader/SOURCES
+++ b/bootloader/SOURCES
@@ -39,4 +39,7 @@ meizu_m3.c
ondavx747.c
#elif defined(CREATIVE_ZVx)
creativezvm.c
+#elif defined(HAVE_AS3525)
+sansa_as3525.c
+show_logo.c
#endif
diff --git a/bootloader/sansa_as3525.c b/bootloader/sansa_as3525.c
new file mode 100644
index 0000000000..297fb2e769
--- /dev/null
+++ b/bootloader/sansa_as3525.c
@@ -0,0 +1,58 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id:$
+ *
+ * Copyright (C) 2008 by Rafaël Carré
+ *
+ * Based on Rockbox iriver bootloader by Linus Nielsen Feltzing
+ * and the ipodlinux bootloader by Daniel Palffy and Bernard Leach
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include <stdio.h>
+#include <system.h>
+#include <inttypes.h>
+#include "lcd.h"
+#include "common.h"
+#include "config.h"
+
+int show_logo(void);
+void main(void)
+{
+ lcd_init_device();
+ lcd_clear_display();
+
+ lcd_update();
+
+ lcd_enable(true);
+
+ show_logo();
+
+#ifdef SANSA_CLIP
+ /* Use hardware scrolling */
+
+ lcd_write_command(0x26); /* scroll setup */
+ lcd_write_command(0x01); /* columns scrolled per step */
+ lcd_write_command(0x00); /* start page */
+ lcd_write_command(0x00); /* steps freqency */
+ lcd_write_command(0x07); /* end page (including) */
+
+ lcd_write_command(0x2F); /* start horizontal scrolling */
+#endif
+
+ /* never returns */
+ while(1) ;
+}
diff --git a/bootloader/show_logo.c b/bootloader/show_logo.c
index b0cac3370f..b655e511cf 100644
--- a/bootloader/show_logo.c
+++ b/bootloader/show_logo.c
@@ -29,8 +29,12 @@
int show_logo( void )
{
char boot_version[32];
-
+
+#if LCD_WIDTH <= 128
+ snprintf(boot_version, sizeof(boot_version), "Boot %s", APPSVERSION);
+#else
snprintf(boot_version, sizeof(boot_version), "Boot Ver. %s", APPSVERSION);
+#endif
lcd_clear_display();
lcd_bitmap(rockboxlogo, 0, 10, BMPWIDTH_rockboxlogo, BMPHEIGHT_rockboxlogo);
diff --git a/docs/CREDITS b/docs/CREDITS
index 80db258272..121b030d41 100644
--- a/docs/CREDITS
+++ b/docs/CREDITS
@@ -423,6 +423,7 @@ Rafaël Carré
Denes Balatoni
Roy Wallace
Eric Lassauge
+François Dinel
The libmad team
The wavpack team
diff --git a/firmware/SOURCES b/firmware/SOURCES
index 5ea1b836b2..8d5d28eb5a 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -329,6 +329,14 @@ target/arm/i2c-telechips.c
target/arm/pnx0101/system-pnx0101.c
#endif
+#if CONFIG_CPU == AS3525
+target/arm/as3525/system-as3525.c
+#ifdef SANSA_CLIP
+target/arm/as3525/clip/lcd-ssd1303.c
+target/arm/as3525/clip/button-clip.c
+#endif
+#endif
+
#if defined(CPU_PP)
#if CONFIG_CPU == PP5002
target/arm/system-pp5002.c
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h
new file mode 100644
index 0000000000..237656d14f
--- /dev/null
+++ b/firmware/export/as3525.h
@@ -0,0 +1,315 @@
+/*
+* (C) Copyright 2006
+* Copyright (C) 2006 Austriamicrosystems, by thomas.luo
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License as
+* published by the Free Software Foundation; either version 2 of
+* the License, or (at your option) any later version.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+* GNU General Public License for more details.
+*
+* You should have received a copy of the GNU General Public License
+* along with this program; if not, write to the Free Software
+* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+* MA 02111-1307 USA
+*/
+#ifndef __AS3525_H__
+#define __AS3525_H__
+
+#define UART_CHANNELS 1
+
+/* AS352X only supports 512 Byte HW ECC */
+#define ECCSIZE 512
+#define ECCBYTES 3
+
+
+/* AS352X device base addresses */
+
+
+/*
+------------------------------------------------------------------------
+* AS352X Registers
+*
+------------------------------------------------------------------------
+*
+*/
+
+
+/* AHB */
+#define USB_BASE 0xC6000000
+#define VIC_BASE 0xC6010000
+#define DMAC_BASE 0xC6020000
+#define MPMC_BASE 0xC6030000
+#define MEMSTICK_BASE 0xC6040000
+#define CF_IDE_BASE 0xC6050000
+
+/* APB */
+#define NAND_FLASH_BASE 0xC8000000
+#define BIST_MANAGER_BASE 0xC8010000
+#define SD_MCI_BASE 0xC8020000
+#define TIMER_BASE 0xC8040000
+#define WDT_BASE 0xC8050000
+#define I2C_MS_BASE 0xC8060000
+#define I2C_AUDIO_BASE 0xC8070000
+#define SSP_BASE 0xC8080000
+#define I2SIN_BASE 0xC8090000
+#define I2SOUT_BASE 0xC80A0000
+#define GPIOA_BASE 0xC80B0000
+#define GPIOB_BASE 0xC80C0000
+#define GPIOC_BASE 0xC80D0000
+#define GPIOD_BASE 0xC80E0000
+#define CGU_BASE 0xC80F0000
+#define CCU_BASE 0xC8100000
+#define UART0_BASE 0xC8110000
+#define DBOP_BASE 0xC8120000
+
+
+
+
+
+
+
+
+/*
+------------------------------------------------------------------------
+* AS352X control registers
+*
+------------------------------------------------------------------------
+*/
+
+#define CCU_SRC (*(volatile unsigned long *)(CCU_BASE + 0x00))
+#define CCU_SRL (*(volatile unsigned long *)(CCU_BASE + 0x04))
+#define CCU_MEMMAP (*(volatile unsigned long *)(CCU_BASE + 0x08))
+#define CCU_IO (*(volatile unsigned long *)(CCU_BASE + 0x0C))
+#define CCU_SCON (*(volatile unsigned long *)(CCU_BASE + 0x10))
+#define CCU_VERS (*(volatile unsigned long *)(CCU_BASE + 0x14))
+#define CCU_SPARE1 (*(volatile unsigned long *)(CCU_BASE + 0x18))
+#define CCU_SPARE2 (*(volatile unsigned long *)(CCU_BASE + 0x1C))
+
+/* DBOP */
+#define DBOP_TIMPOL_01 (*(volatile unsigned long *)(DBOP_BASE + 0x00))
+#define DBOP_TIMPOL_23 (*(volatile unsigned long *)(DBOP_BASE + 0x04))
+#define DBOP_CTRL (*(volatile unsigned long *)(DBOP_BASE + 0x08))
+#define DBOP_STAT (*(volatile unsigned long *)(DBOP_BASE + 0x0C))
+#define DBOP_DOUT (*(volatile unsigned short*)(DBOP_BASE + 0x10))
+#define DBOP_DIN (*(volatile unsigned long *)(DBOP_BASE + 0x14))
+
+
+/**
+* Reset Control Lines in CCU_SRC register
+**/
+#define CCU_SRC_DBOP_EN ( 1 << 24 )
+#define CCU_SRC_SPDIF_EN ( 1 << 22 )
+#define CCU_SRC_TIMER_EN ( 1 << 21 )
+#define CCU_SRC_SSP_EN ( 1 << 20 )
+#define CCU_SRC_WDO_EN ( 1 << 19 )
+#define CCU_SRC_IDE_EN ( 1 << 18 )
+#define CCU_SRC_IDE_AHB_EN ( 1 << 17 )
+#define CCU_SRC_UART0 ( 1 << 16 )
+#define CCU_SRC_NAF_EN ( 1 << 15 )
+#define CCU_SRC_SDMCI_EN ( 1 << 14 )
+#define CCU_SRC_GPIO_EN ( 1 << 13 )
+#define CCU_SRC_I2C_AUDIO_EN ( 1 << 12 )
+#define CCU_SRC_I2C_EN ( 1 << 11 )
+#define CCU_SRC_MST_EN ( 1 << 10 )
+#define CCU_SRC_I2SIN ( 1 << 9 )
+#define CCU_SRC_I2SOUT ( 1 << 8 )
+#define CCU_SRC_USB_AHB_EN ( 1 << 7 )
+#define CCU_SRC_USB_PHY_EN ( 1 << 6 )
+#define CCU_SRC_DMAC_EN ( 1 << 5 )
+#define CCU_SRC_VIC_EN ( 1 << 4 )
+
+/**
+* Magic number for CCU_SRL for reset.
+**/
+#define CCU_SRL_MAGIC_NUMBER 0x1A720212
+
+/**
+* Chip select lines for NAF. Use these constants to select/deselct the
+CE lines
+* for NAND flashes in Register CCU_IO.
+**/
+#define CCU_IO_NAF_CE_LINE_0 ( 0 << 7 )
+#define CCU_IO_NAF_CE_LINE_1 ( 1 << 7 )
+#define CCU_IO_NAF_CE_LINE_2 ( 2 << 7 )
+#define CCU_IO_NAF_CE_LINE_3 ( 3 << 7 )
+
+/* CCU IO Select/Deselect IDE */
+#define CCU_IO_IDE ( 1 << 5 )
+
+/* CCU IO Select/desect I2C */
+#define CCU_IO_I2C_MASTER_SLAVE ( 1 << 1 )
+
+/* CCU IO Select/desect UART */
+#define CCU_IO_UART0 ( 1 << 0 )
+
+
+#define CCU_RESET_ALL_BUT_MEMORY \
+ ( CCU_SRC_DBOP_EN \
+ | CCU_SRC_SPDIF_EN \
+ | CCU_SRC_TIMER_EN \
+ | CCU_SRC_SSP_EN \
+ | CCU_SRC_WDO_EN \
+ | CCU_SRC_IDE_EN \
+ | CCU_SRC_IDE_AHB_EN \
+ | CCU_SRC_UART0 \
+ | CCU_SRC_NAF_EN \
+ | CCU_SRC_SDMCI_EN \
+ | CCU_SRC_GPIO_EN \
+ | CCU_SRC_I2C_AUDIO_EN \
+ | CCU_SRC_I2C_EN \
+ | CCU_SRC_MST_EN \
+ | CCU_SRC_I2SIN \
+ | CCU_SRC_I2SOUT \
+ | CCU_SRC_USB_AHB_EN \
+ | CCU_SRC_USB_PHY_EN \
+ | CCU_SRC_DMAC_EN \
+ | CCU_SRC_VIC_EN \
+ )
+
+#define CCU_IO_UART ( 1 << 0 )
+/*
+------------------------------------------------------------------------
+* AS352X clock control registers
+*
+------------------------------------------------------------------------
+*/
+
+#define CGU_PLLA (*(volatile unsigned long *)(CGU_BASE + 0x00))
+#define CGU_PLLB (*(volatile unsigned long *)(CGU_BASE + 0x04))
+#define CGU_PLLASUP (*(volatile unsigned long *)(CGU_BASE + 0x08))
+#define CGU_PLLBSUP (*(volatile unsigned long *)(CGU_BASE + 0x0C))
+#define CGU_PROC (*(volatile unsigned long *)(CGU_BASE + 0x10))
+#define CGU_PERI (*(volatile unsigned long *)(CGU_BASE + 0x14))
+#define CGU_AUDIO (*(volatile unsigned long *)(CGU_BASE + 0x18))
+#define CGU_USB (*(volatile unsigned long *)(CGU_BASE + 0x1C))
+#define CGU_INTCTRL (*(volatile unsigned long *)(CGU_BASE + 0x20))
+#define CGU_IRQ (*(volatile unsigned long *)(CGU_BASE + 0x24))
+#define CGU_COUNTA (*(volatile unsigned long *)(CGU_BASE + 0x28))
+#define CGU_COUNTB (*(volatile unsigned long *)(CGU_BASE + 0x2C))
+#define CGU_IDE (*(volatile unsigned long *)(CGU_BASE + 0x30))
+#define CGU_MEMSTICK (*(volatile unsigned long *)(CGU_BASE + 0x34))
+#define CGU_DBOP (*(volatile unsigned long *)(CGU_BASE + 0x38))
+
+
+/* --- are disabled after reset --- */
+#define CGU_DMA_CLOCK_ENABLE ( 1 << 22 ) /* dma */
+#define CGU_USB_CLOCK_ENABLE ( 1 << 21 ) /* usb */
+#define CGU_I2SOUT_APB_CLOCK_ENABLE ( 1 << 20 ) /* i2sout */
+#define CGU_I2SIN_APB_CLOCK_ENABLE ( 1 << 19 ) /* i2sin */
+#define CGU_I2C_MASTER_SLAVE_CLOCK_ENABLE ( 1 << 18 ) /* i2c master/slave */
+#define CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE ( 1 << 17 ) /* i2c audio master */
+#define CGU_GPIO_CLOCK_ENABLE ( 1 << 16 ) /* gpio */
+#define CGU_MCI_CLOCK_ENABLE ( 1 << 15 ) /* mmc + sd */
+#define CGU_NAF_CLOCK_ENABLE ( 1 << 14 ) /* naf */
+#define CGU_UART_APB_CLOCK_ENABLE ( 1 << 13 ) /* uart */
+#define CGU_WDOCNT_CLOCK_ENABLE ( 1 << 12 ) /* watchdog counter */
+#define CGU_WDOIF_CLOCK_ENABLE ( 1 << 11 ) /* watchdog timer module */
+#define CGU_SSP_CLOCK_ENABLE ( 1 << 10 ) /* ssp */
+#define CGU_TIMER1_CLOCK_ENABLE ( 1 << 9 ) /* timer 1 */
+#define CGU_TIMER2_CLOCK_ENABLE ( 1 << 8 ) /* timer 2 */
+#define CGU_TIMERIF_CLOCK_ENABLE ( 1 << 7 ) /* timer
+interface */
+
+/** ------------------------------------------------------------------
+* Number of cycles to wait before cgu is safely locked.
+**/
+#define CGU_LOCK_CNT 0xFF
+
+/* FIFO depth is 16 for tx and rx fifo */
+#define UART_FIFO_DEPTH 16
+
+/* ------------------- UART Line Control Register bit fields -------------------- */
+
+#define UART_LNCTL_DLSEN (1 << 7) /* Device latch select bit */
+
+
+/* -------------- UART Interrupt Control Register bit fields --------------- */
+
+#define UART_INTR_RXDRDY 0x1 /* Data ready interrupt */
+#define UART_INTR_TXEMT 0x2 /* Transmit data empty interrupt */
+#define UART_INTR_RXLINESTATUS 0x4 /* Receive line status interrupt */
+
+/* ------------------- UART Line Status Register bit fields -------------------- */
+
+#define UART_ERRORBITS 0x1E
+#define UART_RX_DATA_READY (1 << 0)
+#define UART_TX_HOLD_EMPTY (1 << 5)
+
+/* ------------------- FIFO CNTL Register contants -------------------*/
+
+#define UART_FIFO_EN (1 << 0) /* Enable the UART FIFO */
+#define UART_TX_FIFO_RST (1 << 1) /* Enable the UART FIFO */
+#define UART_RX_FIFO_RST (1 << 2)
+#define UART_RXFIFO_TRIGLVL_1 (0 << 4) /* RX FIFO TRIGGER_LEVEL 1 */
+#define UART_RXFIFO_TRIGLVL_4 0x08 /* RX FIFO TRIGGER_LEVEL 4 */
+#define UART_RXFIFO_TRIGLVL_8 0x10 /* RX FIFO TRIGGER_LEVEL 8 */
+#define UART_RXFIFO_TRIGLVL_14 0x18 /* RX FIFO TRIGGER_LEVEL 14 */
+
+
+/* ------------------- FIFO status Register contants ------------------*/
+#define UART_TX_FIFO_FULL (1 << 0)
+#define UART_RX_FIFO_FULL (1 << 1)
+#define UART_TX_FIFO_EMPTY (1 << 2)
+#define UART_RX_FIFO_EMPTY (1 << 3)
+
+
+/* ----------------------- defines ---------------------------------------- */
+
+
+
+#define UART_DATA_REG (*(volatile unsigned long*)(UART0_BASE + 0x00)) /* Data register */
+#define UART_DLO_REG (*(volatile unsigned long*)(UART0_BASE + 0x00)) /* Clock divider(lower byte) register */
+#define UART_DHI_REG (*(volatile unsigned long*)(UART0_BASE + 0x04)) /* Clock divider(higher byte) register */
+#define UART_INTEN_REG (*(volatile unsigned long*)(UART0_BASE + 0x04)) /* Interrupt enable register */
+#define UART_INTSTATUS_REG (*(volatile unsigned long*)(UART0_BASE + 0x08)) /* Interrupt status register */
+#define UART_FCTL_REG (*(volatile unsigned long*)(UART0_BASE + 0x0C)) /* Fifo control register */
+#define UART_FSTATUS_REG (*(volatile unsigned long*)(UART0_BASE + 0x0C)) /* Fifo status register */
+#define UART_LNCTL_REG (*(volatile unsigned long*)(UART0_BASE + 0x10)) /* Line control register */
+#define UART_LNSTATUS_REG (*(volatile unsigned long*)(UART0_BASE + 0x14)) /* Line status register */
+
+
+
+
+#define TIMER_LOAD (*(volatile unsigned long*)(TIMER_BASE + 0x00)) /* 32-bit width */
+#define TIMER_VALUE (*(volatile unsigned long*)(TIMER_BASE + 0x04)) /* 32 bit width */
+#define TIMER_CONTROL (*(volatile unsigned long*)(TIMER_BASE + 0x08)) /* 8 bit width */
+#define TIMER_INTCLR (*(volatile unsigned long*)(TIMER_BASE + 0x0C)) /* clears ir by write access */
+#define TIMER_RIS (*(volatile unsigned long*)(TIMER_BASE + 0x10)) /* 1 bit width */
+#define TIMER_MIS (*(volatile unsigned long*)(TIMER_BASE + 0x14)) /* 1 bit width */
+
+/**
+* Counter/Timer control register bits
+**/
+#define TIMER_ENABLE 0x80
+#define TIMER_PERIODIC 0x40
+#define TIMER_INT_ENABLE 0x20
+#define TIMER_32_BIT 0x02
+#define TIMER_ONE_SHOT 0x01
+#define TIMER_PRESCALE_1 0x00
+#define TIMER_PRESCALE_16 0x04
+#define TIMER_PRESCALE_256 0x08
+
+/* GPIO registers */
+
+#define GPIOA_DIR (*(volatile unsigned long*)(GPIOA_BASE+0x400))
+#define GPIOA_AFSEL (*(volatile unsigned char*)(GPIOA_BASE+0x420))
+#define GPIOA_PIN(a) (*(volatile unsigned long*)(GPIOA_BASE+4*(1<<(a))))
+
+#define GPIOB_DIR (*(volatile unsigned long*)(GPIOB_BASE+0x400))
+#define GPIOB_AFSEL (*(volatile unsigned char*)(GPIOB_BASE+0x420))
+#define GPIOB_PIN(a) (*(volatile unsigned long*)(GPIOB_BASE+4*(1<<(a))))
+
+#define GPIOC_DIR (*(volatile unsigned long*)(GPIOC_BASE+0x400))
+#define GPIOC_AFSEL (*(volatile unsigned char*)(GPIOC_BASE+0x420))
+#define GPIOC_PIN(a) (*(volatile unsigned long*)(GPIOC_BASE+4*(1<<(a))))
+
+#define GPIOD_DIR (*(volatile unsigned long*)(GPIOD_BASE+0x400))
+#define GPIOD_AFSEL (*(volatile unsigned char*)(GPIOD_BASE+0x420))
+#define GPIOD_PIN(a) (*(volatile unsigned long*)(GPIOD_BASE+4*(1<<(a))))
+
+#endif /*__AS3525_H__*/
diff --git a/firmware/export/config-clip.h b/firmware/export/config-clip.h
new file mode 100644
index 0000000000..b6ffccecab
--- /dev/null
+++ b/firmware/export/config-clip.h
@@ -0,0 +1,176 @@
+/*
+ * This config file is for the Sandisk Sansa e200
+ */
+#define TARGET_TREE /* this target is using the target tree system */
+
+/* For Rolo and boot loader */
+#define MODEL_NUMBER 50
+#define MODEL_NAME "Sandisk Sansa Clip"
+#define FIRMWARE_OFFSET_FILE_DATA 0
+#define FIRMWARE_OFFSET_FILE_CRC 0
+
+#if 0
+#define HW_SAMPR_CAPS (SAMPR_CAP_44)
+
+/* define this if you have recording possibility */
+#define HAVE_RECORDING
+
+#define REC_SAMPR_CAPS (SAMPR_CAP_22)
+#define REC_FREQ_DEFAULT REC_FREQ_22 /* Default is not 44.1kHz */
+#define REC_SAMPR_DEFAULT SAMPR_22
+
+
+/* Define bitmask of input sources - recordable bitmask can be defined
+ explicitly if different */
+#define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_FMRADIO)
+#endif
+
+/* define this if you have a bitmap LCD display */
+#define HAVE_LCD_BITMAP
+
+/* define this if you have a light associated with the buttons */
+#define HAVE_BUTTON_LIGHT
+
+/* define this if you have access to the quickscreen */
+//#define HAVE_QUICKSCREEN
+
+/* define this if you have access to the pitchscreen */
+//#define HAVE_PITCHSCREEN
+
+/* define this if you would like tagcache to build on this target */
+//#define HAVE_TAGCACHE
+
+/* LCD dimensions */
+#define LCD_WIDTH 128
+#define LCD_HEIGHT 64
+#define LCD_DEPTH 1
+#define LCD_PIXELFORMAT VERTICAL_PACKING
+
+/* define this if you have LCD enable function */
+#define HAVE_LCD_ENABLE
+
+#ifndef BOOTLOADER
+
+/* Define this if your LCD can be put to sleep. HAVE_LCD_ENABLE
+ should be defined as well. */
+//#define HAVE_LCD_SLEEP
+//#define HAVE_LCD_SLEEP_SETTING
+#endif
+
+/* define this if you can flip your LCD */
+//#define HAVE_LCD_FLIP
+
+/* #define IRAM_LCDFRAMEBUFFER IDATA_ATTR *//* put the lcd frame buffer in IRAM */
+
+#define CONFIG_KEYPAD SANSA_CLIP_PAD
+
+/* Define this if you do software codec */
+#define CONFIG_CODEC SWCODEC
+/* There is no hardware tone control */
+#define HAVE_SW_TONE_CONTROLS
+
+#define HAVE_AS3525
+
+/* define this if you have a real-time clock */
+#ifndef BOOTLOADER
+//#define CONFIG_RTC RTC_AS3525
+#endif
+
+/* Define this if you have a software controlled poweroff */
+//#define HAVE_SW_POWEROFF
+
+#define HAVE_FAT16SUPPORT
+
+/* The number of bytes reserved for loadable codecs */
+#define CODEC_SIZE 0
+//#define CODEC_SIZE 0x80000
+
+/* The number of bytes reserved for loadable plugins */
+//#define PLUGIN_BUFFER_SIZE 0x80000
+
+#define AB_REPEAT_ENABLE 1
+
+/* FM Tuner */
+//#define CONFIG_TUNER LV24020LP
+//#define HAVE_TUNER_PWR_CTRL
+
+/* Define this for LCD backlight available */
+#define HAVE_BACKLIGHT
+#define HAVE_BACKLIGHT_BRIGHTNESS
+
+/* define this if you have a flash memory storage */
+#define HAVE_FLASH_STORAGE
+
+/* define this if the flash memory uses the SecureDigital Memory Card protocol */
+#define HAVE_ATA_SD
+
+#define BATTERY_CAPACITY_DEFAULT 750 /* default battery capacity */
+#define BATTERY_CAPACITY_MIN 750 /* min. capacity selectable */
+#define BATTERY_CAPACITY_MAX 750 /* max. capacity selectable */
+#define BATTERY_CAPACITY_INC 0 /* capacity increment */
+#define BATTERY_TYPES_COUNT 1 /* only one type */
+
+/* Hardware controlled charging? FIXME */
+#define CONFIG_CHARGING CHARGING_SIMPLE
+
+/* define this if the unit can be powered or charged via USB */
+#define HAVE_USB_POWER
+
+/** Non-simulator section **/
+#ifndef SIMULATOR
+
+/* Define this if you have a PortalPlayer PP5024 */
+#define CONFIG_CPU AS3525
+
+/* Define this if you want to use the PP5024 i2c interface */
+#define CONFIG_I2C I2C_AS3525
+
+/* define this if the hardware can be powered off while charging */
+/* Sansa can't be powered off while charging */
+/* #define HAVE_POWEROFF_WHILE_CHARGING */
+
+/* The start address index for ROM builds */
+#define ROM_START 0x00000000
+
+/* Define this to the CPU frequency */
+#define CPU_FREQ 250000000
+
+/* Type of LCD */
+#define CONFIG_LCD LCD_SSD1303
+
+#ifndef BOOTLOADER
+#define HAVE_MULTIVOLUME
+#define HAVE_HOTSWAP
+
+/* USB On-the-go */
+#define CONFIG_USBOTG USBOTG_ARC
+
+/* enable these for the experimental usb stack */
+#define HAVE_USBSTACK
+#define USB_VENDOR_ID 0x0781
+#define USB_PRODUCT_ID 0x7421
+#endif /* BOOTLOADER */
+
+/* Virtual LED (icon) */
+#define CONFIG_LED LED_VIRTUAL
+
+/* Define this if you have adjustable CPU frequency */
+#define HAVE_ADJUSTABLE_CPU_FREQ
+
+#define ICODE_ATTR_TREMOR_NOT_MDCT
+
+#define INCLUDE_TIMEOUT_API
+
+#endif /* SIMULATOR */
+
+/** Port-specific settings **/
+
+/* Main LCD backlight brightness range and defaults */
+#define MIN_BRIGHTNESS_SETTING 1
+#define MAX_BRIGHTNESS_SETTING 12
+#define DEFAULT_BRIGHTNESS_SETTING 6
+
+/* Default recording levels */
+#define DEFAULT_REC_MIC_GAIN 23
+#define DEFAULT_REC_LEFT_GAIN 23
+#define DEFAULT_REC_RIGHT_GAIN 23
diff --git a/firmware/export/config.h b/firmware/export/config.h
index f6ec686b1f..7d36289ff2 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -61,6 +61,7 @@
#define TCC7801 7801
#define S5L8700 8700
#define JZ4732 4732
+#define AS3525 3525
/* CONFIG_KEYPAD */
#define PLAYER_PAD 1
@@ -97,6 +98,7 @@
#define ONDAVX767_PAD 32
#define MEIZU_M6SP_PAD 33
#define MEIZU_M3_PAD 34
+#define SANSA_CLIP_PAD 35
/* CONFIG_REMOTE_KEYPAD */
#define H100_REMOTE 1
@@ -141,6 +143,7 @@
#define LCD_MEIZUM6 28 /* as used by the Meizu M6SP and M6SL (various models) */
#define LCD_ONDAVX747 29 /* as used by the Onda VX747 */
#define LCD_ONDAVX767 30 /* as used by the Onda VX767 */
+#define LCD_SSD1303 31 /* as used by the Sansa Clip */
/* LCD_PIXELFORMAT */
#define HORIZONTAL_PACKING 1
@@ -301,6 +304,8 @@
#include "config-ondavx747.h"
#elif defined(ONDA_VX767)
#include "config-ondavx767.h"
+#elif defined(SANSA_CLIP)
+#include "config-clip.h"
#else
/* no known platform */
#endif
@@ -450,7 +455,7 @@
#define ARM_ARCH 6 /* ARMv6 */
#endif
-#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320)
+#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320) || (CONFIG_CPU == AS3525)
#define CPU_ARM
#define ARM_ARCH 5 /* ARMv5 */
#endif
diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h
index 86efd31ef1..75ac252ed7 100644
--- a/firmware/export/cpu.h
+++ b/firmware/export/cpu.h
@@ -62,3 +62,6 @@
#if CONFIG_CPU == JZ4732
#include "jz4740.h"
#endif
+#if CONFIG_CPU == AS3525
+#include "as3525.h"
+#endif
diff --git a/firmware/export/timer.h b/firmware/export/timer.h
index 6d95ef7718..f9aa650071 100644
--- a/firmware/export/timer.h
+++ b/firmware/export/timer.h
@@ -34,7 +34,7 @@
#elif CONFIG_CPU == PNX0101
#define TIMER_FREQ 3000000
#elif CONFIG_CPU == S3C2440 || CONFIG_CPU == DM320 || CONFIG_CPU == TCC7801 \
- || defined(CPU_TCC77X)
+ || defined(CPU_TCC77X) || CONFIG_CPU == AS3525
#include "timer-target.h"
#elif defined(SIMULATOR)
#define TIMER_FREQ 1000000
diff --git a/firmware/target/arm/as3525/boot.lds b/firmware/target/arm/as3525/boot.lds
new file mode 100644
index 0000000000..f94f1c33da
--- /dev/null
+++ b/firmware/target/arm/as3525/boot.lds
@@ -0,0 +1,43 @@
+#include "config.h"
+
+ENTRY(start)
+OUTPUT_FORMAT(elf32-littlearm)
+OUTPUT_ARCH(arm)
+STARTUP(target/arm/crt0.o)
+
+SECTIONS
+{
+ /*. = IRAMORIG; */
+
+ .text : {
+ *(.init.text)
+ *(.text*)
+ }
+
+ .data : {
+ *(.icode)
+ *(.irodata)
+ *(.idata)
+ *(.data*)
+ *(.ncdata*);
+ _dataend = . ;
+ }
+
+ .stack :
+ {
+ *(.stack)
+ _stackbegin = .;
+ stackbegin = .;
+ . += 0x2000;
+ _stackend = .;
+ stackend = .;
+ }
+
+ .bss : {
+ _edata = .;
+ *(.bss*);
+ *(.ibss);
+ *(.ncbss*);
+ _end = .;
+ }
+}
diff --git a/firmware/target/arm/as3525/clip/adc-target.h b/firmware/target/arm/as3525/clip/adc-target.h
new file mode 100644
index 0000000000..bea0272496
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/adc-target.h
@@ -0,0 +1,24 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2008 ??
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef _ADC_TARGET_H_
+#define _ADC_TARGET_H_
+
+#endif /* _ADC_TARGET_H_ */
diff --git a/firmware/target/arm/as3525/clip/backlight-target.h b/firmware/target/arm/as3525/clip/backlight-target.h
new file mode 100644
index 0000000000..9533d0a6b5
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/backlight-target.h
@@ -0,0 +1,37 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2008 ??
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef BACKLIGHT_TARGET_H
+#define BACKLIGHT_TARGET_H
+
+static inline bool _backlight_init(void)
+{
+ return true;
+}
+
+static inline void _backlight_on(void)
+{
+}
+
+static inline void _backlight_off(void)
+{
+}
+
+#endif
diff --git a/firmware/target/arm/as3525/clip/button-clip.c b/firmware/target/arm/as3525/clip/button-clip.c
new file mode 100644
index 0000000000..faed075c65
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/button-clip.c
@@ -0,0 +1,92 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2008 François Dinel
+ * Copyright (C) 2008 Rafaël Carré
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "button-target.h"
+#include "as3525.h"
+
+void button_init_device(void)
+{
+ GPIOA_DIR &= ~((1<<7) | (1<<3));
+ GPIOB_DIR &= ~((1<<2) | (1<<1) | (1<<0));
+ GPIOC_PIN(4) = 0x00;
+ GPIOC_PIN(5) = 0x00;
+ GPIOC_PIN(6) = 0x00;
+ GPIOC_DIR |= ((1<<6) | (1<<5) | (1<<4));
+}
+
+int button_read_device(void)
+{
+ int result = 0;
+
+ /* direct GPIO connections */
+
+ if (GPIOA_PIN(7))
+ result |= BUTTON_POWER;
+
+ if (GPIOA_PIN(3))
+ result |= BUTTON_HOLD;
+
+ /* This is a keypad using C4-C6 as columns and B0-B2 as rows */
+ GPIOC_PIN(4) = (1<<4);
+
+ /* C4B0 is unused */
+
+ if (GPIOB_PIN(1))
+ result |= BUTTON_VOLUP;
+
+ if (GPIOB_PIN(2))
+ result |= BUTTON_PLAY;
+
+ GPIOC_PIN(4) = 0x00;
+
+ GPIOC_PIN(5) = (1<<5);
+
+ if (GPIOB_PIN(0))
+ result |= BUTTON_LEFT;
+
+ if (GPIOB_PIN(1))
+ result |= BUTTON_SELECT;
+
+ if (GPIOB_PIN(2))
+ result |= BUTTON_RIGHT;
+
+ GPIOC_PIN(5) = 0x00;
+
+ GPIOC_PIN(6) = (1<<6);
+
+ if (GPIOB_PIN(0))
+ result |= BUTTON_DOWN;
+
+ if (GPIOB_PIN(1))
+ result |= BUTTON_VOLDOWN;
+
+ if (GPIOB_PIN(2))
+ result |= BUTTON_HOME;
+
+ GPIOC_PIN(6) = 0x00;
+
+ return result;
+}
+
+bool button_hold(void)
+{
+ return (GPIOA_PIN(3) != 0);
+}
diff --git a/firmware/target/arm/as3525/clip/button-target.h b/firmware/target/arm/as3525/clip/button-target.h
new file mode 100644
index 0000000000..1fb57ae9e9
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/button-target.h
@@ -0,0 +1,60 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2008 François Dinel
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#ifndef _BUTTON_TARGET_H_
+#define _BUTTON_TARGET_H_
+
+#include <stdbool.h>
+#include "config.h"
+
+#define HAS_BUTTON_HOLD
+
+void button_init_device(void);
+int button_read_device(void);
+bool button_hold(void);
+
+/* Main unit's buttons */
+#define BUTTON_HOME 0x00000001
+
+#define BUTTON_VOLUP 0x00000002
+#define BUTTON_VOLDOWN 0x00000004
+
+#define BUTTON_PLAY 0x00000008
+#define BUTTON_DOWN 0x00000010
+#define BUTTON_LEFT 0x00000020
+#define BUTTON_RIGHT 0x00000040
+
+#define BUTTON_SELECT 0x00000080
+
+#define BUTTON_POWER 0x00000100
+#define BUTTON_HOLD 0x00000200
+
+#define BUTTON_MAIN (BUTTON_HOME|BUTTON_VOLUP|BUTTON_VOLDOWN\
+ |BUTTON_PLAY|BUTTON_DOWN|BUTTON_LEFT|BUTTON_RIGHT\
+ |BUTTON_SELECT|BUTTON_POWER|BUTTON_HOLD)
+
+#define BUTTON_REMOTE 0
+
+/* Software power-off */
+#define POWEROFF_BUTTON BUTTON_POWER
+#define POWEROFF_COUNT 40
+
+#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/arm/as3525/clip/lcd-ssd1303.c b/firmware/target/arm/as3525/clip/lcd-ssd1303.c
new file mode 100644
index 0000000000..4ae13a5fcc
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/lcd-ssd1303.c
@@ -0,0 +1,312 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2002 by Alan Korr
+ * Copyright (C) 2008 François Dinel
+ * Copyright (C) 2008 Rafaël Carré
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#include "config.h"
+
+#include "hwcompat.h"
+#include "kernel.h"
+#include "lcd.h"
+#include "system.h"
+#include "cpu.h"
+#include "string.h"
+
+/*** AS3525 specifics ***/
+#include "as3525.h"
+
+/*** definitions ***/
+
+#define LCD_SET_LOWER_COLUMN_ADDRESS ((char)0x00)
+#define LCD_SET_HIGHER_COLUMN_ADDRESS ((char)0x10)
+#define LCD_SET_DISPLAY_START_LINE ((char)0x40)
+#define LCD_SET_CONTRAST_CONTROL_REGISTER ((char)0x81)
+#define LCD_SET_SEGMENT_REMAP ((char)0xA0)
+#define LCD_SET_SEGMENT_REMAP_INV ((char)0xA1)
+#define LCD_SET_ENTIRE_DISPLAY_OFF ((char)0xA4)
+#define LCD_SET_ENTIRE_DISPLAY_ON ((char)0xA5)
+#define LCD_SET_NORMAL_DISPLAY ((char)0xA6)
+#define LCD_SET_REVERSE_DISPLAY ((char)0xA7)
+#define LCD_SET_MULTIPLEX_RATIO ((char)0xA8)
+#define LCD_SET_DC_DC ((char)0xAD)
+#define LCD_SET_DC_DC_PART2 ((char)0x8A)
+#define LCD_SET_DISPLAY_OFF ((char)0xAE)
+#define LCD_SET_DISPLAY_ON ((char)0xAF)
+#define LCD_SET_PAGE_ADDRESS ((char)0xB0)
+#define LCD_SET_COM_OUTPUT_SCAN_DIRECTION ((char)0xC0)
+#define LCD_SET_COM_OUTPUT_SCAN_DIRECTION_INV ((char)0xC8)
+#define LCD_SET_DISPLAY_CLOCK_AND_OSC_FREQ ((char)0xD5)
+#define LCD_SET_VCOM_DESELECT_LEVEL ((char)0xDB)
+#define LCD_SET_PRECHARGE_PERIOD ((char)0xD9)
+#define LCD_NOP ((char)0xE3)
+
+/* LCD command codes */
+#define LCD_CNTL_CONTRAST 0x81 /* Contrast */
+#define LCD_CNTL_OUTSCAN 0xc8 /* Output scan direction */
+#define LCD_CNTL_SEGREMAP 0xa1 /* Segment remap */
+#define LCD_CNTL_DISPON 0xaf /* Display on */
+
+#define LCD_CNTL_PAGE 0xb0 /* Page address */
+#define LCD_CNTL_HIGHCOL 0x10 /* Upper column address */
+#define LCD_CNTL_LOWCOL 0x00 /* Lower column address */
+
+/* DBOP initialisation, do what OF does */
+static void ams3525_dbop_init(void)
+{
+ int clkdiv = 4 - 1;
+
+ CGU_DBOP |= (1<<3) /* clk enable */ | clkdiv /* clkdiv: 3 bits */ ;
+
+ GPIOB_AFSEL = 0x08; /* DBOP on pin 3 */
+ GPIOC_AFSEL = 0x0f; /* DBOP on pins 3:0 */
+
+ DBOP_CTRL = 0x51008;
+ DBOP_TIMPOL_01 = 0x6E167;
+ DBOP_TIMPOL_23 = 0xA167E06F;
+}
+
+void lcd_write_command(int byte)
+{
+ /* unset D/C# (data or command) */
+ GPIOA_PIN(5) = 0;
+
+ /* Write command */
+ DBOP_DOUT = (byte << 8) | byte;
+
+ /* While push fifo is not empty */
+ while ((DBOP_STAT & (1<<10)) == 0)
+ ;
+}
+
+void lcd_write_data(const fb_data* p_bytes, int count)
+{
+ /* set D/C# (data or command) */
+ GPIOA_PIN(5) = (1<<5);
+
+ while (count--)
+ {
+ /* Write pixels */
+ DBOP_DOUT = (*p_bytes << 8) | *p_bytes;
+
+ p_bytes++; /* next packed pixels */
+
+ /* While push fifo is not empty */
+ while ((DBOP_STAT & (1<<10)) == 0)
+ ;
+ }
+}
+
+
+/** globals **/
+
+static int xoffset; /* needed for flip */
+static bool display_on; /* used by lcd_enable */
+
+/*** hardware configuration ***/
+
+int lcd_default_contrast(void)
+{
+ return 0x1f;
+}
+
+void lcd_set_contrast(int val)
+{
+ lcd_write_command(LCD_CNTL_CONTRAST);
+ lcd_write_command(val);
+}
+
+void lcd_set_invert_display(bool yesno)
+{
+ if (yesno)
+ lcd_write_command(LCD_SET_REVERSE_DISPLAY);
+ else
+ lcd_write_command(LCD_SET_NORMAL_DISPLAY);
+}
+
+/* turn the display upside down (call lcd_update() afterwards) */
+void lcd_set_flip(bool yesno)
+{
+ (void)yesno;
+ /* TODO */
+}
+
+void lcd_enable(bool enable)
+{
+ if( (display_on = enable) ) /* simple '=' is not a typo ! */
+ lcd_write_command(LCD_SET_DISPLAY_ON);
+ else
+ lcd_write_command(LCD_SET_DISPLAY_OFF);
+}
+
+bool lcd_enabled(void)
+{
+ return display_on;
+}
+
+
+/* LCD init, largely based on what OF does */
+void lcd_init_device(void)
+{
+ int i;
+#define LCD_FULLSCREEN (128+4)
+ fb_data p_bytes[LCD_FULLSCREEN]; /* framebuffer used to clear the screen */
+
+ ams3525_dbop_init();
+
+ GPIOA_DIR |= 0x33; /* pins 5:4 and 1:0 out */
+ GPIOB_DIR |= 0x60; /* pin 6:5 out */
+
+ GPIOA_PIN(1) = (1<<1);
+ GPIOA_PIN(0) = (1<<0);
+ GPIOA_PIN(4) = 0;
+ GPIOB_PIN(5) = 0;
+ GPIOB_PIN(6) = (1<<6);
+
+ /* Set display clock (divide ratio = 1) and oscillator frequency (1) */
+ lcd_write_command(LCD_SET_DISPLAY_CLOCK_AND_OSC_FREQ);
+ lcd_write_command(0x10);
+
+ /* Set VCOM deselect level to 0.76V */
+ lcd_write_command(LCD_SET_VCOM_DESELECT_LEVEL);
+ lcd_write_command(0x34);
+
+ /* Set pre-charge period (p1period is 2 dclk and p2period is 5 dclk) */
+ lcd_write_command(LCD_SET_PRECHARGE_PERIOD);
+ lcd_write_command(0x25);
+
+ /* Set contrast register to 12% */
+ lcd_set_contrast(lcd_default_contrast());
+
+ /* Disable DC-DC */
+ lcd_write_command(LCD_SET_DC_DC);
+ lcd_write_command(LCD_SET_DC_DC_PART2/*|0*/);
+
+ /* Set starting line as 0 */
+ lcd_write_command(LCD_SET_DISPLAY_START_LINE /*|(0 & 0x3f)*/);
+
+ /* Column 131 is remapped to SEG0 */
+ lcd_write_command(LCD_SET_SEGMENT_REMAP_INV);
+
+ /* Invert COM scan direction (N-1 to 0) */
+ lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION_INV);
+
+ /* Set normal display mode (not every pixel ON) */
+ lcd_write_command(LCD_SET_ENTIRE_DISPLAY_OFF);
+
+ /* Set normal display mode (not inverted) */
+ lcd_write_command(LCD_SET_NORMAL_DISPLAY);
+
+ /* Clear whole framebuffer, including "overscan"
+ * We don't need to handle that out of screen columns in lcd_clear_display()
+ * since we will never write into it anymore
+ */
+ lcd_write_command (LCD_SET_HIGHER_COLUMN_ADDRESS /*| 0*/);
+ lcd_write_command (LCD_SET_LOWER_COLUMN_ADDRESS /*| 0*/);
+
+ memset(p_bytes, 0, sizeof(p_bytes)); /* fills with 0 : pixel off */
+
+ for(i = 0; i < 8; i++)
+ {
+ lcd_write_command (LCD_SET_PAGE_ADDRESS | (i /*& 0xf*/));
+ lcd_write_data(p_bytes, LCD_FULLSCREEN /* overscan */);
+ }
+
+ lcd_update();
+}
+
+/*** Update functions ***/
+
+/* Performance function that works with an external buffer
+ note that by and bheight are in 8-pixel units! */
+void lcd_blit_mono(const unsigned char *data, int x, int by, int width,
+ int bheight, int stride)
+{
+ /* Copy display bitmap to hardware */
+ while (bheight--)
+ {
+ lcd_write_command (LCD_CNTL_PAGE | (by++ & 0xf));
+ lcd_write_command (LCD_CNTL_HIGHCOL | (((x+2+xoffset)>>4) & 0xf));
+ lcd_write_command (LCD_CNTL_LOWCOL | ((x+2+xoffset) & 0xf));
+
+ lcd_write_data(data, width);
+ data += stride;
+ }
+}
+
+
+/* Performance function that works with an external buffer
+ note that by and bheight are in 8-pixel units! */
+void lcd_blit_grey_phase(unsigned char *values, unsigned char *phases,
+ int x, int by, int width, int bheight, int stride)
+{
+ (void)values;
+ (void)phases;
+ (void)x;
+ (void)by;
+ (void)width;
+ (void)bheight;
+ (void)stride;
+}
+
+/* Update the display.
+ This must be called after all other LCD functions that change the display. */
+void lcd_update(void) ICODE_ATTR;
+void lcd_update(void)
+{
+ int y;
+
+ /* Copy display bitmap to hardware */
+ for (y = 0; y < LCD_FBHEIGHT; y++)
+ {
+ lcd_write_command (LCD_CNTL_PAGE | (y & 0xf));
+ lcd_write_command (LCD_CNTL_HIGHCOL | (((xoffset+2) >> 4) & 0xf));
+ lcd_write_command (LCD_CNTL_LOWCOL | ((xoffset+2) & 0xf));
+
+ lcd_write_data (lcd_framebuffer[y], LCD_WIDTH);
+ }
+}
+
+/* Update a fraction of the display. */
+void lcd_update_rect(int, int, int, int) ICODE_ATTR;
+void lcd_update_rect(int x, int y, int width, int height)
+{
+ int ymax;
+
+ /* The Y coordinates have to work on even 8 pixel rows */
+ ymax = (y + height-1) >> 3;
+ y >>= 3;
+
+ if(x + width > LCD_WIDTH)
+ width = LCD_WIDTH - x;
+ if (width <= 0)
+ return; /* nothing left to do, 0 is harmful to lcd_write_data() */
+ if(ymax >= LCD_FBHEIGHT)
+ ymax = LCD_FBHEIGHT-1;
+
+ /* Copy specified rectange bitmap to hardware */
+ for (; y <= ymax; y++)
+ {
+ lcd_write_command (LCD_CNTL_PAGE | (y & 0xf));
+ lcd_write_command (LCD_CNTL_HIGHCOL | (((x+2+xoffset) >> 4) & 0xf));
+ lcd_write_command (LCD_CNTL_LOWCOL | ((x+2+xoffset) & 0xf));
+
+ lcd_write_data (&lcd_framebuffer[y][x], width);
+ }
+}
diff --git a/firmware/target/arm/as3525/clip/system-target.h b/firmware/target/arm/as3525/clip/system-target.h
new file mode 100644
index 0000000000..b712d1c124
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/system-target.h
@@ -0,0 +1,28 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2008 ??
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef SYSTEM_TARGET_H
+#define SYSTEM_TARGET_H
+
+#include "system-arm.h"
+
+#define CPUFREQ_MAX 250000000
+
+#endif /* SYSTEM_TARGET_H */
diff --git a/firmware/target/arm/as3525/clip/timer-target.h b/firmware/target/arm/as3525/clip/timer-target.h
new file mode 100644
index 0000000000..b81da57885
--- /dev/null
+++ b/firmware/target/arm/as3525/clip/timer-target.h
@@ -0,0 +1,38 @@
+/***************************************************************************
+* __________ __ ___.
+* Open \______ \ ____ ____ | | _\_ |__ _______ ___
+* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+* \/ \/ \/ \/ \/
+* $Id$
+*
+* Copyright (C) 2008 ??
+*
+* This program is free software; you can redistribute it and/or
+* modify it under the terms of the GNU General Public License
+* as published by the Free Software Foundation; either version 2
+* of the License, or (at your option) any later version.
+*
+* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+* KIND, either express or implied.
+*
+****************************************************************************/
+#ifndef TIMER_TARGET_H
+#define TIMER_TARGET_H
+
+bool __timer_set(long cycles, bool set);
+bool __timer_register(void);
+void __timer_unregister(void);
+
+#define __TIMER_SET(cycles, set) \
+ __timer_set(cycles, set)
+
+#define __TIMER_REGISTER(reg_prio, unregister_callback, cycles, \
+ int_prio, timer_callback) \
+ __timer_register()
+
+#define __TIMER_UNREGISTER(...) \
+ __timer_unregister()
+
+#endif /* TIMER_TARGET_H */
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
new file mode 100644
index 0000000000..d65f872384
--- /dev/null
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -0,0 +1,141 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * $Id$
+ *
+ * Copyright (C) 2007 by Rob Purchase
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+
+#include "kernel.h"
+#include "system.h"
+#include "panic.h"
+
+#define default_interrupt(name) \
+ extern __attribute__((weak,alias("UIRQ"))) void name (void)
+
+void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
+void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked));
+
+default_interrupt(INT_WATCHDOG);
+default_interrupt(INT_TIMER1);
+default_interrupt(INT_TIMER2);
+default_interrupt(INT_USB);
+default_interrupt(INT_DMAC);
+default_interrupt(INT_NAND);
+default_interrupt(INT_IDE);
+default_interrupt(INT_MCI0);
+default_interrupt(INT_MCI1);
+default_interrupt(INT_AUDIO);
+default_interrupt(INT_SSP);
+default_interrupt(INT_I2C_MS);
+default_interrupt(INT_I2C_AUDIO);
+default_interrupt(INT_I2SIN);
+default_interrupt(INT_I2SOUT);
+default_interrupt(INT_UART);
+default_interrupt(INT_GPIOD);
+default_interrupt(RESERVED1); /* Interrupt 17 : unused */
+default_interrupt(INT_CGU);
+default_interrupt(INT_MEMORY_STICK);
+default_interrupt(INT_DBOP);
+default_interrupt(RESERVED2); /* Interrupt 21 : unused */
+default_interrupt(RESERVED3); /* Interrupt 22 : unused */
+default_interrupt(RESERVED4); /* Interrupt 23 : unused */
+default_interrupt(RESERVED5); /* Interrupt 24 : unused */
+default_interrupt(RESERVED6); /* Interrupt 25 : unused */
+default_interrupt(RESERVED7); /* Interrupt 26 : unused */
+default_interrupt(RESERVED8); /* Interrupt 27 : unused */
+default_interrupt(RESERVED9); /* Interrupt 28 : unused */
+default_interrupt(INT_GPIOA);
+default_interrupt(INT_GPIOB);
+default_interrupt(INT_GPIOC);
+
+
+
+static void (* const irqvector[])(void) =
+{
+ INT_WATCHDOG, INT_TIMER1, INT_TIMER2, INT_USB, INT_DMAC, INT_NAND, INT_IDE, INT_MCI0,
+ INT_MCI1, INT_AUDIO, INT_SSP, INT_I2C_MS, INT_I2C_AUDIO, INT_I2SIN, INT_I2SOUT,
+ INT_UART, INT_GPIOD, RESERVED1 /* 17 */ ,INT_CGU, INT_MEMORY_STICK, INT_DBOP,
+ RESERVED2 /* 21 */, RESERVED3 /* 22 */, RESERVED4 /* 23 */, RESERVED5 /* 24 */,
+ RESERVED6 /* 25 */, RESERVED7 /* 26 */, RESERVED8 /* 27 */, RESERVED9 /* 28 */,
+ INT_GPIOA, INT_GPIOB, INT_GPIOC
+};
+
+static const char * const irqname[] =
+{
+ "INT_WATCHDOG", "INT_TIMER1", "INT_TIMER2", "INT_USB", "INT_DMAC", "INT_NAND",
+ "INT_IDE", "INT_MCI0", "INT_MCI1", "INT_AUDIO", "INT_SSP", "INT_I2C_MS",
+ "INT_I2C_AUDIO", "INT_I2SIN", "INT_I2SOUT", "INT_UART", "INT_GPIOD", "RESERVED1",
+ "INT_CGU", "INT_MEMORY_STICK", "INT_DBOP", "RESERVED2", "RESERVED3", "RESERVED4",
+ "RESERVED5", "RESERVED6", "RESERVED7", "RESERVED8", "RESERVED9", "INT_GPIOA",
+ "INT_GPIOB", "INT_GPIOC"
+};
+
+static void UIRQ(void)
+{
+/* TODO
+ unsigned int offset = INTOFFSET;
+ panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]);
+*/
+}
+
+void irq_handler(void)
+{
+ /*
+ * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
+ */
+
+ asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */
+ "sub sp, sp, #8 \n"); /* Reserve stack */
+
+ /* TODO */
+#if 0
+ int irq_no = INTOFFSET; /* Read clears the corresponding IRQ status */
+#else
+ int irq_no = 69;
+#endif
+ if ((irq_no & (1<<31)) == 0) /* Ensure invalid flag is not set */
+ {
+ irqvector[irq_no]();
+ }
+
+ asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */
+ "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
+ "subs pc, lr, #4 \n"); /* Return from IRQ */
+}
+
+void fiq_handler(void)
+{
+ asm volatile (
+ "subs pc, lr, #4 \r\n"
+ );
+}
+
+
+void system_init(void)
+{
+/* CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; */
+}
+
+void system_reboot(void)
+{
+}
+
+int system_memory_guard(int newmode)
+{
+ (void)newmode;
+ return 0;
+}
diff --git a/tools/configure b/tools/configure
index 158bef8c15..1b31615d9d 100755
--- a/tools/configure
+++ b/tools/configure
@@ -693,6 +693,7 @@ cat <<EOF
32) 7 52) Sansa c200
33) Cowon D2 53) Sansa m200
34) M3/M3L 54) Sansa c100
+ 55) Sansa Clip
==Tatung== ==Olympus== ==Logik==
60) Elio TPJ-1022 70) M:Robe 500 80) DAX 1GB MP3/DAB
@@ -721,6 +722,7 @@ fi
ipodbitmaptools="$toolset scramble bmp2rb"
gigabeatbitmaptools="$toolset scramble descramble bmp2rb"
tccbitmaptools="$toolset scramble mktccboot bmp2rb"
+ ams3525bitmaptools="$toolset bmp2rb"
# generic is used by IFP, H10, Sansa-e200
genericbitmaptools="$toolset bmp2rb"
@@ -1675,6 +1677,25 @@ fi
t_model="c100"
;;
+ 55|Clip|clip)
+ target_id=50
+ modelname="clip"
+ target="-DSANSA_CLIP"
+ memory=1 # In fact, 0.3125
+ arm9tdmicc
+ bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
+ bmp2rb_native="$bmp2rb_mono"
+ boottool="cp"
+ bootoutput="rockbox.bin"
+ appextra="recorder:gui"
+ plugins=""
+ toolset="$ams3525bitmaptools"
+ t_cpu="arm"
+ t_manufacturer="as3525"
+ t_model="clip"
+ ;;
+
+
60|tpj1022)
target_id=25
modelname="tpj1022"