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-rw-r--r--firmware/export/config/xduoox3.h2
-rw-r--r--firmware/target/mips/ingenic_jz47xx/system-jz4760.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/firmware/export/config/xduoox3.h b/firmware/export/config/xduoox3.h
index 7efeaf3b2f..cb825737ba 100644
--- a/firmware/export/config/xduoox3.h
+++ b/firmware/export/config/xduoox3.h
@@ -148,7 +148,7 @@
#define CONFIG_CPU JZ4760B
/* Define this to the CPU frequency */
-#define CPU_FREQ 492000000 /* CPU clock: 492 MHz */
+#define CPU_FREQ 480000000 /* CPU clock: 480 MHz -- Keep a multiple of 48MHz! */
/* Define this if you want to use the JZ47XX i2c interface */
#define CONFIG_I2C I2C_JZ47XX
diff --git a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
index 7bbf6d36ae..072bdb49b8 100644
--- a/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
+++ b/firmware/target/mips/ingenic_jz47xx/system-jz4760.c
@@ -478,7 +478,7 @@ static void pll0_init(unsigned int freq)
* Init USB Host clock, pllout2 must be n*48MHz
* For JZ4760b UHC - River.
*/
- usbdiv = (cfcr & CPCCR_PCS) ? CPU_FREQ : (CPU_FREQ / 2);
+ usbdiv = (cfcr & CPCCR_PCS) ? freq : (freq / 2);
REG_CPM_UHCCDR = usbdiv / 48000000 - 1;
/* init PLL */