diff options
Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3600/regs-pwm.h')
-rw-r--r-- | firmware/target/arm/imx233/regs/stmp3600/regs-pwm.h | 134 |
1 files changed, 0 insertions, 134 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3600/regs-pwm.h b/firmware/target/arm/imx233/regs/stmp3600/regs-pwm.h deleted file mode 100644 index 748f9159a9..0000000000 --- a/firmware/target/arm/imx233/regs/stmp3600/regs-pwm.h +++ /dev/null @@ -1,134 +0,0 @@ -/*************************************************************************** - * __________ __ ___. - * Open \______ \ ____ ____ | | _\_ |__ _______ ___ - * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / - * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < - * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ - * \/ \/ \/ \/ \/ - * This file was automatically generated by headergen, DO NOT EDIT it. - * headergen version: 2.1.8 - * XML versions: stmp3600:2.3.0 - * - * Copyright (C) 2013 by Amaury Pouly - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY - * KIND, either express or implied. - * - ****************************************************************************/ -#ifndef __HEADERGEN__STMP3600__PWM__H__ -#define __HEADERGEN__STMP3600__PWM__H__ - -#define REGS_PWM_BASE (0x80064000) - -#define REGS_PWM_VERSION "2.3.0" - -/** - * Register: HW_PWM_CTRL - * Address: 0 - * SCT: yes -*/ -#define HW_PWM_CTRL (*(volatile unsigned long *)(REGS_PWM_BASE + 0x0 + 0x0)) -#define HW_PWM_CTRL_SET (*(volatile unsigned long *)(REGS_PWM_BASE + 0x0 + 0x4)) -#define HW_PWM_CTRL_CLR (*(volatile unsigned long *)(REGS_PWM_BASE + 0x0 + 0x8)) -#define HW_PWM_CTRL_TOG (*(volatile unsigned long *)(REGS_PWM_BASE + 0x0 + 0xc)) -#define BP_PWM_CTRL_SFTRST 31 -#define BM_PWM_CTRL_SFTRST 0x80000000 -#define BF_PWM_CTRL_SFTRST(v) (((v) << 31) & 0x80000000) -#define BP_PWM_CTRL_CLKGATE 30 -#define BM_PWM_CTRL_CLKGATE 0x40000000 -#define BF_PWM_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000) -#define BP_PWM_CTRL_PWM4_PRESENT 29 -#define BM_PWM_CTRL_PWM4_PRESENT 0x20000000 -#define BF_PWM_CTRL_PWM4_PRESENT(v) (((v) << 29) & 0x20000000) -#define BP_PWM_CTRL_PWM3_PRESENT 28 -#define BM_PWM_CTRL_PWM3_PRESENT 0x10000000 -#define BF_PWM_CTRL_PWM3_PRESENT(v) (((v) << 28) & 0x10000000) -#define BP_PWM_CTRL_PWM2_PRESENT 27 -#define BM_PWM_CTRL_PWM2_PRESENT 0x8000000 -#define BF_PWM_CTRL_PWM2_PRESENT(v) (((v) << 27) & 0x8000000) -#define BP_PWM_CTRL_PWM1_PRESENT 26 -#define BM_PWM_CTRL_PWM1_PRESENT 0x4000000 -#define BF_PWM_CTRL_PWM1_PRESENT(v) (((v) << 26) & 0x4000000) -#define BP_PWM_CTRL_PWM0_PRESENT 25 -#define BM_PWM_CTRL_PWM0_PRESENT 0x2000000 -#define BF_PWM_CTRL_PWM0_PRESENT(v) (((v) << 25) & 0x2000000) -#define BP_PWM_CTRL_PWM4_ENABLE 4 -#define BM_PWM_CTRL_PWM4_ENABLE 0x10 -#define BF_PWM_CTRL_PWM4_ENABLE(v) (((v) << 4) & 0x10) -#define BP_PWM_CTRL_PWM3_ENABLE 3 -#define BM_PWM_CTRL_PWM3_ENABLE 0x8 -#define BF_PWM_CTRL_PWM3_ENABLE(v) (((v) << 3) & 0x8) -#define BP_PWM_CTRL_PWM2_ENABLE 2 -#define BM_PWM_CTRL_PWM2_ENABLE 0x4 -#define BF_PWM_CTRL_PWM2_ENABLE(v) (((v) << 2) & 0x4) -#define BP_PWM_CTRL_PWM1_ENABLE 1 -#define BM_PWM_CTRL_PWM1_ENABLE 0x2 -#define BF_PWM_CTRL_PWM1_ENABLE(v) (((v) << 1) & 0x2) -#define BP_PWM_CTRL_PWM0_ENABLE 0 -#define BM_PWM_CTRL_PWM0_ENABLE 0x1 -#define BF_PWM_CTRL_PWM0_ENABLE(v) (((v) << 0) & 0x1) - -/** - * Register: HW_PWM_ACTIVEn - * Address: 0x10+n*0x20 - * SCT: yes -*/ -#define HW_PWM_ACTIVEn(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x10+(n)*0x20 + 0x0)) -#define HW_PWM_ACTIVEn_SET(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x10+(n)*0x20 + 0x4)) -#define HW_PWM_ACTIVEn_CLR(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x10+(n)*0x20 + 0x8)) -#define HW_PWM_ACTIVEn_TOG(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x10+(n)*0x20 + 0xc)) -#define BP_PWM_ACTIVEn_INACTIVE 16 -#define BM_PWM_ACTIVEn_INACTIVE 0xffff0000 -#define BF_PWM_ACTIVEn_INACTIVE(v) (((v) << 16) & 0xffff0000) -#define BP_PWM_ACTIVEn_ACTIVE 0 -#define BM_PWM_ACTIVEn_ACTIVE 0xffff -#define BF_PWM_ACTIVEn_ACTIVE(v) (((v) << 0) & 0xffff) - -/** - * Register: HW_PWM_PERIODn - * Address: 0x20+n*0x20 - * SCT: yes -*/ -#define HW_PWM_PERIODn(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x20+(n)*0x20 + 0x0)) -#define HW_PWM_PERIODn_SET(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x20+(n)*0x20 + 0x4)) -#define HW_PWM_PERIODn_CLR(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x20+(n)*0x20 + 0x8)) -#define HW_PWM_PERIODn_TOG(n) (*(volatile unsigned long *)(REGS_PWM_BASE + 0x20+(n)*0x20 + 0xc)) -#define BP_PWM_PERIODn_MATT 23 -#define BM_PWM_PERIODn_MATT 0x800000 -#define BF_PWM_PERIODn_MATT(v) (((v) << 23) & 0x800000) -#define BP_PWM_PERIODn_CDIV 20 -#define BM_PWM_PERIODn_CDIV 0x700000 -#define BV_PWM_PERIODn_CDIV__DIV_1 0x0 -#define BV_PWM_PERIODn_CDIV__DIV_2 0x1 -#define BV_PWM_PERIODn_CDIV__DIV_4 0x2 -#define BV_PWM_PERIODn_CDIV__DIV_8 0x3 -#define BV_PWM_PERIODn_CDIV__DIV_16 0x4 -#define BV_PWM_PERIODn_CDIV__DIV_64 0x5 -#define BV_PWM_PERIODn_CDIV__DIV_256 0x6 -#define BV_PWM_PERIODn_CDIV__DIV_1024 0x7 -#define BF_PWM_PERIODn_CDIV(v) (((v) << 20) & 0x700000) -#define BF_PWM_PERIODn_CDIV_V(v) ((BV_PWM_PERIODn_CDIV__##v << 20) & 0x700000) -#define BP_PWM_PERIODn_INACTIVE_STATE 18 -#define BM_PWM_PERIODn_INACTIVE_STATE 0xc0000 -#define BV_PWM_PERIODn_INACTIVE_STATE__HI_Z 0x0 -#define BV_PWM_PERIODn_INACTIVE_STATE__0 0x2 -#define BV_PWM_PERIODn_INACTIVE_STATE__1 0x3 -#define BF_PWM_PERIODn_INACTIVE_STATE(v) (((v) << 18) & 0xc0000) -#define BF_PWM_PERIODn_INACTIVE_STATE_V(v) ((BV_PWM_PERIODn_INACTIVE_STATE__##v << 18) & 0xc0000) -#define BP_PWM_PERIODn_ACTIVE_STATE 16 -#define BM_PWM_PERIODn_ACTIVE_STATE 0x30000 -#define BV_PWM_PERIODn_ACTIVE_STATE__HI_Z 0x0 -#define BV_PWM_PERIODn_ACTIVE_STATE__0 0x2 -#define BV_PWM_PERIODn_ACTIVE_STATE__1 0x3 -#define BF_PWM_PERIODn_ACTIVE_STATE(v) (((v) << 16) & 0x30000) -#define BF_PWM_PERIODn_ACTIVE_STATE_V(v) ((BV_PWM_PERIODn_ACTIVE_STATE__##v << 16) & 0x30000) -#define BP_PWM_PERIODn_PERIOD 0 -#define BM_PWM_PERIODn_PERIOD 0xffff -#define BF_PWM_PERIODn_PERIOD(v) (((v) << 0) & 0xffff) - -#endif /* __HEADERGEN__STMP3600__PWM__H__ */ |