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Diffstat (limited to 'firmware/target/arm/imx233/regs/stmp3700/pwm.h')
-rw-r--r--firmware/target/arm/imx233/regs/stmp3700/pwm.h248
1 files changed, 248 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/regs/stmp3700/pwm.h b/firmware/target/arm/imx233/regs/stmp3700/pwm.h
new file mode 100644
index 0000000000..45326aaa89
--- /dev/null
+++ b/firmware/target/arm/imx233/regs/stmp3700/pwm.h
@@ -0,0 +1,248 @@
+/***************************************************************************
+ * __________ __ ___.
+ * Open \______ \ ____ ____ | | _\_ |__ _______ ___
+ * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
+ * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
+ * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
+ * \/ \/ \/ \/ \/
+ * This file was automatically generated by headergen, DO NOT EDIT it.
+ * headergen version: 3.0.0
+ * stmp3700 version: 2.4.0
+ * stmp3700 authors: Amaury Pouly
+ *
+ * Copyright (C) 2015 by the authors
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
+ * KIND, either express or implied.
+ *
+ ****************************************************************************/
+#ifndef __HEADERGEN_STMP3700_PWM_H__
+#define __HEADERGEN_STMP3700_PWM_H__
+
+#define HW_PWM_CTRL HW(PWM_CTRL)
+#define HWA_PWM_CTRL (0x80064000 + 0x0)
+#define HWT_PWM_CTRL HWIO_32_RW
+#define HWN_PWM_CTRL PWM_CTRL
+#define HWI_PWM_CTRL
+#define HW_PWM_CTRL_SET HW(PWM_CTRL_SET)
+#define HWA_PWM_CTRL_SET (HWA_PWM_CTRL + 0x4)
+#define HWT_PWM_CTRL_SET HWIO_32_WO
+#define HWN_PWM_CTRL_SET PWM_CTRL
+#define HWI_PWM_CTRL_SET
+#define HW_PWM_CTRL_CLR HW(PWM_CTRL_CLR)
+#define HWA_PWM_CTRL_CLR (HWA_PWM_CTRL + 0x8)
+#define HWT_PWM_CTRL_CLR HWIO_32_WO
+#define HWN_PWM_CTRL_CLR PWM_CTRL
+#define HWI_PWM_CTRL_CLR
+#define HW_PWM_CTRL_TOG HW(PWM_CTRL_TOG)
+#define HWA_PWM_CTRL_TOG (HWA_PWM_CTRL + 0xc)
+#define HWT_PWM_CTRL_TOG HWIO_32_WO
+#define HWN_PWM_CTRL_TOG PWM_CTRL
+#define HWI_PWM_CTRL_TOG
+#define BP_PWM_CTRL_SFTRST 31
+#define BM_PWM_CTRL_SFTRST 0x80000000
+#define BF_PWM_CTRL_SFTRST(v) (((v) & 0x1) << 31)
+#define BFM_PWM_CTRL_SFTRST(v) BM_PWM_CTRL_SFTRST
+#define BF_PWM_CTRL_SFTRST_V(e) BF_PWM_CTRL_SFTRST(BV_PWM_CTRL_SFTRST__##e)
+#define BFM_PWM_CTRL_SFTRST_V(v) BM_PWM_CTRL_SFTRST
+#define BP_PWM_CTRL_CLKGATE 30
+#define BM_PWM_CTRL_CLKGATE 0x40000000
+#define BF_PWM_CTRL_CLKGATE(v) (((v) & 0x1) << 30)
+#define BFM_PWM_CTRL_CLKGATE(v) BM_PWM_CTRL_CLKGATE
+#define BF_PWM_CTRL_CLKGATE_V(e) BF_PWM_CTRL_CLKGATE(BV_PWM_CTRL_CLKGATE__##e)
+#define BFM_PWM_CTRL_CLKGATE_V(v) BM_PWM_CTRL_CLKGATE
+#define BP_PWM_CTRL_PWM4_PRESENT 29
+#define BM_PWM_CTRL_PWM4_PRESENT 0x20000000
+#define BF_PWM_CTRL_PWM4_PRESENT(v) (((v) & 0x1) << 29)
+#define BFM_PWM_CTRL_PWM4_PRESENT(v) BM_PWM_CTRL_PWM4_PRESENT
+#define BF_PWM_CTRL_PWM4_PRESENT_V(e) BF_PWM_CTRL_PWM4_PRESENT(BV_PWM_CTRL_PWM4_PRESENT__##e)
+#define BFM_PWM_CTRL_PWM4_PRESENT_V(v) BM_PWM_CTRL_PWM4_PRESENT
+#define BP_PWM_CTRL_PWM3_PRESENT 28
+#define BM_PWM_CTRL_PWM3_PRESENT 0x10000000
+#define BF_PWM_CTRL_PWM3_PRESENT(v) (((v) & 0x1) << 28)
+#define BFM_PWM_CTRL_PWM3_PRESENT(v) BM_PWM_CTRL_PWM3_PRESENT
+#define BF_PWM_CTRL_PWM3_PRESENT_V(e) BF_PWM_CTRL_PWM3_PRESENT(BV_PWM_CTRL_PWM3_PRESENT__##e)
+#define BFM_PWM_CTRL_PWM3_PRESENT_V(v) BM_PWM_CTRL_PWM3_PRESENT
+#define BP_PWM_CTRL_PWM2_PRESENT 27
+#define BM_PWM_CTRL_PWM2_PRESENT 0x8000000
+#define BF_PWM_CTRL_PWM2_PRESENT(v) (((v) & 0x1) << 27)
+#define BFM_PWM_CTRL_PWM2_PRESENT(v) BM_PWM_CTRL_PWM2_PRESENT
+#define BF_PWM_CTRL_PWM2_PRESENT_V(e) BF_PWM_CTRL_PWM2_PRESENT(BV_PWM_CTRL_PWM2_PRESENT__##e)
+#define BFM_PWM_CTRL_PWM2_PRESENT_V(v) BM_PWM_CTRL_PWM2_PRESENT
+#define BP_PWM_CTRL_PWM1_PRESENT 26
+#define BM_PWM_CTRL_PWM1_PRESENT 0x4000000
+#define BF_PWM_CTRL_PWM1_PRESENT(v) (((v) & 0x1) << 26)
+#define BFM_PWM_CTRL_PWM1_PRESENT(v) BM_PWM_CTRL_PWM1_PRESENT
+#define BF_PWM_CTRL_PWM1_PRESENT_V(e) BF_PWM_CTRL_PWM1_PRESENT(BV_PWM_CTRL_PWM1_PRESENT__##e)
+#define BFM_PWM_CTRL_PWM1_PRESENT_V(v) BM_PWM_CTRL_PWM1_PRESENT
+#define BP_PWM_CTRL_PWM0_PRESENT 25
+#define BM_PWM_CTRL_PWM0_PRESENT 0x2000000
+#define BF_PWM_CTRL_PWM0_PRESENT(v) (((v) & 0x1) << 25)
+#define BFM_PWM_CTRL_PWM0_PRESENT(v) BM_PWM_CTRL_PWM0_PRESENT
+#define BF_PWM_CTRL_PWM0_PRESENT_V(e) BF_PWM_CTRL_PWM0_PRESENT(BV_PWM_CTRL_PWM0_PRESENT__##e)
+#define BFM_PWM_CTRL_PWM0_PRESENT_V(v) BM_PWM_CTRL_PWM0_PRESENT
+#define BP_PWM_CTRL_PWM2_ANA_CTRL_ENABLE 5
+#define BM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE 0x20
+#define BF_PWM_CTRL_PWM2_ANA_CTRL_ENABLE(v) (((v) & 0x1) << 5)
+#define BFM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE(v) BM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE
+#define BF_PWM_CTRL_PWM2_ANA_CTRL_ENABLE_V(e) BF_PWM_CTRL_PWM2_ANA_CTRL_ENABLE(BV_PWM_CTRL_PWM2_ANA_CTRL_ENABLE__##e)
+#define BFM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE_V(v) BM_PWM_CTRL_PWM2_ANA_CTRL_ENABLE
+#define BP_PWM_CTRL_PWM4_ENABLE 4
+#define BM_PWM_CTRL_PWM4_ENABLE 0x10
+#define BF_PWM_CTRL_PWM4_ENABLE(v) (((v) & 0x1) << 4)
+#define BFM_PWM_CTRL_PWM4_ENABLE(v) BM_PWM_CTRL_PWM4_ENABLE
+#define BF_PWM_CTRL_PWM4_ENABLE_V(e) BF_PWM_CTRL_PWM4_ENABLE(BV_PWM_CTRL_PWM4_ENABLE__##e)
+#define BFM_PWM_CTRL_PWM4_ENABLE_V(v) BM_PWM_CTRL_PWM4_ENABLE
+#define BP_PWM_CTRL_PWM3_ENABLE 3
+#define BM_PWM_CTRL_PWM3_ENABLE 0x8
+#define BF_PWM_CTRL_PWM3_ENABLE(v) (((v) & 0x1) << 3)
+#define BFM_PWM_CTRL_PWM3_ENABLE(v) BM_PWM_CTRL_PWM3_ENABLE
+#define BF_PWM_CTRL_PWM3_ENABLE_V(e) BF_PWM_CTRL_PWM3_ENABLE(BV_PWM_CTRL_PWM3_ENABLE__##e)
+#define BFM_PWM_CTRL_PWM3_ENABLE_V(v) BM_PWM_CTRL_PWM3_ENABLE
+#define BP_PWM_CTRL_PWM2_ENABLE 2
+#define BM_PWM_CTRL_PWM2_ENABLE 0x4
+#define BF_PWM_CTRL_PWM2_ENABLE(v) (((v) & 0x1) << 2)
+#define BFM_PWM_CTRL_PWM2_ENABLE(v) BM_PWM_CTRL_PWM2_ENABLE
+#define BF_PWM_CTRL_PWM2_ENABLE_V(e) BF_PWM_CTRL_PWM2_ENABLE(BV_PWM_CTRL_PWM2_ENABLE__##e)
+#define BFM_PWM_CTRL_PWM2_ENABLE_V(v) BM_PWM_CTRL_PWM2_ENABLE
+#define BP_PWM_CTRL_PWM1_ENABLE 1
+#define BM_PWM_CTRL_PWM1_ENABLE 0x2
+#define BF_PWM_CTRL_PWM1_ENABLE(v) (((v) & 0x1) << 1)
+#define BFM_PWM_CTRL_PWM1_ENABLE(v) BM_PWM_CTRL_PWM1_ENABLE
+#define BF_PWM_CTRL_PWM1_ENABLE_V(e) BF_PWM_CTRL_PWM1_ENABLE(BV_PWM_CTRL_PWM1_ENABLE__##e)
+#define BFM_PWM_CTRL_PWM1_ENABLE_V(v) BM_PWM_CTRL_PWM1_ENABLE
+#define BP_PWM_CTRL_PWM0_ENABLE 0
+#define BM_PWM_CTRL_PWM0_ENABLE 0x1
+#define BF_PWM_CTRL_PWM0_ENABLE(v) (((v) & 0x1) << 0)
+#define BFM_PWM_CTRL_PWM0_ENABLE(v) BM_PWM_CTRL_PWM0_ENABLE
+#define BF_PWM_CTRL_PWM0_ENABLE_V(e) BF_PWM_CTRL_PWM0_ENABLE(BV_PWM_CTRL_PWM0_ENABLE__##e)
+#define BFM_PWM_CTRL_PWM0_ENABLE_V(v) BM_PWM_CTRL_PWM0_ENABLE
+
+#define HW_PWM_ACTIVEn(_n1) HW(PWM_ACTIVEn(_n1))
+#define HWA_PWM_ACTIVEn(_n1) (0x80064000 + 0x10 + (_n1) * 0x20)
+#define HWT_PWM_ACTIVEn(_n1) HWIO_32_RW
+#define HWN_PWM_ACTIVEn(_n1) PWM_ACTIVEn
+#define HWI_PWM_ACTIVEn(_n1) (_n1)
+#define HW_PWM_ACTIVEn_SET(_n1) HW(PWM_ACTIVEn_SET(_n1))
+#define HWA_PWM_ACTIVEn_SET(_n1) (HWA_PWM_ACTIVEn(_n1) + 0x4)
+#define HWT_PWM_ACTIVEn_SET(_n1) HWIO_32_WO
+#define HWN_PWM_ACTIVEn_SET(_n1) PWM_ACTIVEn
+#define HWI_PWM_ACTIVEn_SET(_n1) (_n1)
+#define HW_PWM_ACTIVEn_CLR(_n1) HW(PWM_ACTIVEn_CLR(_n1))
+#define HWA_PWM_ACTIVEn_CLR(_n1) (HWA_PWM_ACTIVEn(_n1) + 0x8)
+#define HWT_PWM_ACTIVEn_CLR(_n1) HWIO_32_WO
+#define HWN_PWM_ACTIVEn_CLR(_n1) PWM_ACTIVEn
+#define HWI_PWM_ACTIVEn_CLR(_n1) (_n1)
+#define HW_PWM_ACTIVEn_TOG(_n1) HW(PWM_ACTIVEn_TOG(_n1))
+#define HWA_PWM_ACTIVEn_TOG(_n1) (HWA_PWM_ACTIVEn(_n1) + 0xc)
+#define HWT_PWM_ACTIVEn_TOG(_n1) HWIO_32_WO
+#define HWN_PWM_ACTIVEn_TOG(_n1) PWM_ACTIVEn
+#define HWI_PWM_ACTIVEn_TOG(_n1) (_n1)
+#define BP_PWM_ACTIVEn_INACTIVE 16
+#define BM_PWM_ACTIVEn_INACTIVE 0xffff0000
+#define BF_PWM_ACTIVEn_INACTIVE(v) (((v) & 0xffff) << 16)
+#define BFM_PWM_ACTIVEn_INACTIVE(v) BM_PWM_ACTIVEn_INACTIVE
+#define BF_PWM_ACTIVEn_INACTIVE_V(e) BF_PWM_ACTIVEn_INACTIVE(BV_PWM_ACTIVEn_INACTIVE__##e)
+#define BFM_PWM_ACTIVEn_INACTIVE_V(v) BM_PWM_ACTIVEn_INACTIVE
+#define BP_PWM_ACTIVEn_ACTIVE 0
+#define BM_PWM_ACTIVEn_ACTIVE 0xffff
+#define BF_PWM_ACTIVEn_ACTIVE(v) (((v) & 0xffff) << 0)
+#define BFM_PWM_ACTIVEn_ACTIVE(v) BM_PWM_ACTIVEn_ACTIVE
+#define BF_PWM_ACTIVEn_ACTIVE_V(e) BF_PWM_ACTIVEn_ACTIVE(BV_PWM_ACTIVEn_ACTIVE__##e)
+#define BFM_PWM_ACTIVEn_ACTIVE_V(v) BM_PWM_ACTIVEn_ACTIVE
+
+#define HW_PWM_PERIODn(_n1) HW(PWM_PERIODn(_n1))
+#define HWA_PWM_PERIODn(_n1) (0x80064000 + 0x20 + (_n1) * 0x20)
+#define HWT_PWM_PERIODn(_n1) HWIO_32_RW
+#define HWN_PWM_PERIODn(_n1) PWM_PERIODn
+#define HWI_PWM_PERIODn(_n1) (_n1)
+#define HW_PWM_PERIODn_SET(_n1) HW(PWM_PERIODn_SET(_n1))
+#define HWA_PWM_PERIODn_SET(_n1) (HWA_PWM_PERIODn(_n1) + 0x4)
+#define HWT_PWM_PERIODn_SET(_n1) HWIO_32_WO
+#define HWN_PWM_PERIODn_SET(_n1) PWM_PERIODn
+#define HWI_PWM_PERIODn_SET(_n1) (_n1)
+#define HW_PWM_PERIODn_CLR(_n1) HW(PWM_PERIODn_CLR(_n1))
+#define HWA_PWM_PERIODn_CLR(_n1) (HWA_PWM_PERIODn(_n1) + 0x8)
+#define HWT_PWM_PERIODn_CLR(_n1) HWIO_32_WO
+#define HWN_PWM_PERIODn_CLR(_n1) PWM_PERIODn
+#define HWI_PWM_PERIODn_CLR(_n1) (_n1)
+#define HW_PWM_PERIODn_TOG(_n1) HW(PWM_PERIODn_TOG(_n1))
+#define HWA_PWM_PERIODn_TOG(_n1) (HWA_PWM_PERIODn(_n1) + 0xc)
+#define HWT_PWM_PERIODn_TOG(_n1) HWIO_32_WO
+#define HWN_PWM_PERIODn_TOG(_n1) PWM_PERIODn
+#define HWI_PWM_PERIODn_TOG(_n1) (_n1)
+#define BP_PWM_PERIODn_MATT 23
+#define BM_PWM_PERIODn_MATT 0x800000
+#define BF_PWM_PERIODn_MATT(v) (((v) & 0x1) << 23)
+#define BFM_PWM_PERIODn_MATT(v) BM_PWM_PERIODn_MATT
+#define BF_PWM_PERIODn_MATT_V(e) BF_PWM_PERIODn_MATT(BV_PWM_PERIODn_MATT__##e)
+#define BFM_PWM_PERIODn_MATT_V(v) BM_PWM_PERIODn_MATT
+#define BP_PWM_PERIODn_CDIV 20
+#define BM_PWM_PERIODn_CDIV 0x700000
+#define BV_PWM_PERIODn_CDIV__DIV_1 0x0
+#define BV_PWM_PERIODn_CDIV__DIV_2 0x1
+#define BV_PWM_PERIODn_CDIV__DIV_4 0x2
+#define BV_PWM_PERIODn_CDIV__DIV_8 0x3
+#define BV_PWM_PERIODn_CDIV__DIV_16 0x4
+#define BV_PWM_PERIODn_CDIV__DIV_64 0x5
+#define BV_PWM_PERIODn_CDIV__DIV_256 0x6
+#define BV_PWM_PERIODn_CDIV__DIV_1024 0x7
+#define BF_PWM_PERIODn_CDIV(v) (((v) & 0x7) << 20)
+#define BFM_PWM_PERIODn_CDIV(v) BM_PWM_PERIODn_CDIV
+#define BF_PWM_PERIODn_CDIV_V(e) BF_PWM_PERIODn_CDIV(BV_PWM_PERIODn_CDIV__##e)
+#define BFM_PWM_PERIODn_CDIV_V(v) BM_PWM_PERIODn_CDIV
+#define BP_PWM_PERIODn_INACTIVE_STATE 18
+#define BM_PWM_PERIODn_INACTIVE_STATE 0xc0000
+#define BV_PWM_PERIODn_INACTIVE_STATE__HI_Z 0x0
+#define BV_PWM_PERIODn_INACTIVE_STATE__0 0x2
+#define BV_PWM_PERIODn_INACTIVE_STATE__1 0x3
+#define BF_PWM_PERIODn_INACTIVE_STATE(v) (((v) & 0x3) << 18)
+#define BFM_PWM_PERIODn_INACTIVE_STATE(v) BM_PWM_PERIODn_INACTIVE_STATE
+#define BF_PWM_PERIODn_INACTIVE_STATE_V(e) BF_PWM_PERIODn_INACTIVE_STATE(BV_PWM_PERIODn_INACTIVE_STATE__##e)
+#define BFM_PWM_PERIODn_INACTIVE_STATE_V(v) BM_PWM_PERIODn_INACTIVE_STATE
+#define BP_PWM_PERIODn_ACTIVE_STATE 16
+#define BM_PWM_PERIODn_ACTIVE_STATE 0x30000
+#define BV_PWM_PERIODn_ACTIVE_STATE__HI_Z 0x0
+#define BV_PWM_PERIODn_ACTIVE_STATE__0 0x2
+#define BV_PWM_PERIODn_ACTIVE_STATE__1 0x3
+#define BF_PWM_PERIODn_ACTIVE_STATE(v) (((v) & 0x3) << 16)
+#define BFM_PWM_PERIODn_ACTIVE_STATE(v) BM_PWM_PERIODn_ACTIVE_STATE
+#define BF_PWM_PERIODn_ACTIVE_STATE_V(e) BF_PWM_PERIODn_ACTIVE_STATE(BV_PWM_PERIODn_ACTIVE_STATE__##e)
+#define BFM_PWM_PERIODn_ACTIVE_STATE_V(v) BM_PWM_PERIODn_ACTIVE_STATE
+#define BP_PWM_PERIODn_PERIOD 0
+#define BM_PWM_PERIODn_PERIOD 0xffff
+#define BF_PWM_PERIODn_PERIOD(v) (((v) & 0xffff) << 0)
+#define BFM_PWM_PERIODn_PERIOD(v) BM_PWM_PERIODn_PERIOD
+#define BF_PWM_PERIODn_PERIOD_V(e) BF_PWM_PERIODn_PERIOD(BV_PWM_PERIODn_PERIOD__##e)
+#define BFM_PWM_PERIODn_PERIOD_V(v) BM_PWM_PERIODn_PERIOD
+
+#define HW_PWM_VERSION HW(PWM_VERSION)
+#define HWA_PWM_VERSION (0x80064000 + 0xb0)
+#define HWT_PWM_VERSION HWIO_32_RW
+#define HWN_PWM_VERSION PWM_VERSION
+#define HWI_PWM_VERSION
+#define BP_PWM_VERSION_MAJOR 24
+#define BM_PWM_VERSION_MAJOR 0xff000000
+#define BF_PWM_VERSION_MAJOR(v) (((v) & 0xff) << 24)
+#define BFM_PWM_VERSION_MAJOR(v) BM_PWM_VERSION_MAJOR
+#define BF_PWM_VERSION_MAJOR_V(e) BF_PWM_VERSION_MAJOR(BV_PWM_VERSION_MAJOR__##e)
+#define BFM_PWM_VERSION_MAJOR_V(v) BM_PWM_VERSION_MAJOR
+#define BP_PWM_VERSION_MINOR 16
+#define BM_PWM_VERSION_MINOR 0xff0000
+#define BF_PWM_VERSION_MINOR(v) (((v) & 0xff) << 16)
+#define BFM_PWM_VERSION_MINOR(v) BM_PWM_VERSION_MINOR
+#define BF_PWM_VERSION_MINOR_V(e) BF_PWM_VERSION_MINOR(BV_PWM_VERSION_MINOR__##e)
+#define BFM_PWM_VERSION_MINOR_V(v) BM_PWM_VERSION_MINOR
+#define BP_PWM_VERSION_STEP 0
+#define BM_PWM_VERSION_STEP 0xffff
+#define BF_PWM_VERSION_STEP(v) (((v) & 0xffff) << 0)
+#define BFM_PWM_VERSION_STEP(v) BM_PWM_VERSION_STEP
+#define BF_PWM_VERSION_STEP_V(e) BF_PWM_VERSION_STEP(BV_PWM_VERSION_STEP__##e)
+#define BFM_PWM_VERSION_STEP_V(v) BM_PWM_VERSION_STEP
+
+#endif /* __HEADERGEN_STMP3700_PWM_H__*/