diff options
Diffstat (limited to 'firmware/target/mips/ingenic_x1000/clk-x1000.h')
-rw-r--r-- | firmware/target/mips/ingenic_x1000/clk-x1000.h | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/firmware/target/mips/ingenic_x1000/clk-x1000.h b/firmware/target/mips/ingenic_x1000/clk-x1000.h index 76413b90d2..4b1d4ef838 100644 --- a/firmware/target/mips/ingenic_x1000/clk-x1000.h +++ b/firmware/target/mips/ingenic_x1000/clk-x1000.h @@ -22,8 +22,9 @@ #ifndef __CLK_X1000_H__ #define __CLK_X1000_H__ -#include <stdint.h> +#include "config.h" #include "x1000/cpm.h" +#include <stdint.h> /* Used as arguments to clk_set_ccr_mux() */ #define CLKMUX_SCLK_A(x) jz_orf(CPM_CCR, SEL_SRC_V(x)) @@ -31,6 +32,13 @@ #define CLKMUX_AHB0(x) jz_orf(CPM_CCR, SEL_H0PLL_V(x)) #define CLKMUX_AHB2(x) jz_orf(CPM_CCR, SEL_H2PLL_V(x)) +/* Arguments to clk_set_ccr_div() */ +#define CLKDIV_CPU(x) jz_orf(CPM_CCR, CDIV((x) - 1)) +#define CLKDIV_L2(x) jz_orf(CPM_CCR, L2DIV((x) - 1)) +#define CLKDIV_AHB0(x) jz_orf(CPM_CCR, H0DIV((x) - 1)) +#define CLKDIV_AHB2(x) jz_orf(CPM_CCR, H2DIV((x) - 1)) +#define CLKDIV_PCLK(x) jz_orf(CPM_CCR, PDIV((x) - 1)) + typedef enum x1000_clk_t { X1000_CLK_EXCLK, X1000_CLK_APLL, @@ -45,9 +53,11 @@ typedef enum x1000_clk_t { X1000_CLK_LCD, X1000_CLK_MSC0, X1000_CLK_MSC1, - X1000_CLK_I2S_MCLK, - X1000_CLK_I2S_BCLK, X1000_CLK_SFC, + X1000_CLK_USB, + X1000_NUM_SIMPLE_CLKS, + X1000_CLK_I2S_MCLK = X1000_NUM_SIMPLE_CLKS, + X1000_CLK_I2S_BCLK, X1000_CLK_COUNT, } x1000_clk_t; @@ -57,23 +67,27 @@ extern uint32_t clk_get(x1000_clk_t clk); /* Get the name of a clock for debug purposes */ extern const char* clk_get_name(x1000_clk_t clk); +/* Clock initialization */ +extern void clk_init_early(void) INIT_ATTR; +extern void clk_init(void) INIT_ATTR; + /* Sets system clock multiplexers */ -extern void clk_set_ccr_mux(uint32_t muxbits); +extern void clk_set_ccr_mux(uint32_t muxbits) INIT_ATTR; /* Sets system clock dividers */ -extern void clk_set_ccr_div(int cpu, int l2, int ahb0, int ahb2, int pclk); +extern void clk_set_ccr_div(uint32_t divbits) INIT_ATTR; /* Sets DDR clock source and divider */ -extern void clk_set_ddr(x1000_clk_t src, uint32_t div); +extern void clk_set_ddr(x1000_clk_t src, uint32_t div) INIT_ATTR; /* Returns the smallest n such that infreq/n <= outfreq */ -inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq) +static inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq) { return (infreq + (outfreq - 1)) / outfreq; } /* Returns the smallest n such that (infreq >> n) <= outfreq */ -inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq) +static inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq) { uint32_t div = clk_calc_div(infreq, outfreq); return __builtin_clz(div) ^ 31; |