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Diffstat (limited to 'firmware/target/mips/ingenic_x1000/crt0.S')
-rw-r--r--firmware/target/mips/ingenic_x1000/crt0.S134
1 files changed, 0 insertions, 134 deletions
diff --git a/firmware/target/mips/ingenic_x1000/crt0.S b/firmware/target/mips/ingenic_x1000/crt0.S
index 9d89ac1227..86129a35a1 100644
--- a/firmware/target/mips/ingenic_x1000/crt0.S
+++ b/firmware/target/mips/ingenic_x1000/crt0.S
@@ -134,138 +134,4 @@ _clear:
jr ra
nop
- /* Exception entry points */
- .section .vectors.1, "ax", %progbits
- j tlb_refill_handler
- nop
-
- .section .vectors.2, "ax", %progbits
- j real_exception_handler
- nop
-
- .section .vectors.3, "ax", %progbits
- j real_exception_handler
- nop
-
- .section .vectors.4, "ax", %progbits
- j real_exception_handler
- nop
-
- .section .vectors, "ax", %progbits
-real_exception_handler:
- move k0, sp
- la sp, _irqstackend
- addiu sp, -0x84
- sw k0, 0x80(sp)
- sw ra, 0x00(sp)
- sw fp, 0x04(sp)
- sw gp, 0x08(sp)
- sw t9, 0x0c(sp)
- sw t8, 0x10(sp)
- sw s7, 0x14(sp)
- sw s6, 0x18(sp)
- sw s5, 0x1c(sp)
- sw s4, 0x20(sp)
- sw s3, 0x24(sp)
- sw s2, 0x28(sp)
- sw s1, 0x2c(sp)
- sw s0, 0x30(sp)
- sw t7, 0x34(sp)
- sw t6, 0x38(sp)
- sw t5, 0x3c(sp)
- sw t4, 0x40(sp)
- sw t3, 0x44(sp)
- sw t2, 0x48(sp)
- sw t1, 0x4c(sp)
- sw t0, 0x50(sp)
- sw a3, 0x54(sp)
- sw a2, 0x58(sp)
- sw a1, 0x5c(sp)
- sw a0, 0x60(sp)
- sw v1, 0x64(sp)
- sw v0, 0x68(sp)
- sw $1, 0x6c(sp)
- mflo k0
- nop
- sw k0, 0x70(sp)
- mfhi k0
- nop
- sw k0, 0x74(sp)
- mfc0 k0, C0_STATUS
- nop
- nop
- nop
- sw k0, 0x78(sp)
- mfc0 k0, C0_EPC
- nop
- nop
- nop
- sw k0, 0x7c(sp)
-
- li k1, M_CauseExcCode
- mfc0 a0, C0_CAUSE
- and k0, a0, k1
- bnez k0, _exception
- nop
- jal intr_handler
- nop
- j _exception_return
-
-_exception:
- mfc0 a1, C0_EPC
- nop
- nop
- nop
- jal exception_handler
- move a2, sp
-
-_exception_return:
- lw ra, 0x00(sp)
- lw fp, 0x04(sp)
- lw gp, 0x08(sp)
- lw t9, 0x0c(sp)
- lw t8, 0x10(sp)
- lw s7, 0x14(sp)
- lw s6, 0x18(sp)
- lw s5, 0x1c(sp)
- lw s4, 0x20(sp)
- lw s3, 0x24(sp)
- lw s2, 0x28(sp)
- lw s1, 0x2c(sp)
- lw s0, 0x30(sp)
- lw t7, 0x34(sp)
- lw t6, 0x38(sp)
- lw t5, 0x3c(sp)
- lw t4, 0x40(sp)
- lw t3, 0x44(sp)
- lw t2, 0x48(sp)
- lw t1, 0x4c(sp)
- lw t0, 0x50(sp)
- lw a3, 0x54(sp)
- lw a2, 0x58(sp)
- lw a1, 0x5c(sp)
- lw a0, 0x60(sp)
- lw v1, 0x64(sp)
- lw v0, 0x68(sp)
- lw $1, 0x6c(sp)
- lw k0, 0x70(sp)
- mtlo k0
- nop
- lw k0, 0x74(sp)
- mthi k0
- nop
- lw k0, 0x78(sp)
- mtc0 k0, C0_STATUS
- nop
- nop
- nop
- lw k0, 0x7c(sp)
- mtc0 k0, C0_EPC
- nop
- nop
- nop
- lw sp, 0x80(sp)
- eret
- nop
-
.set pop