diff options
Diffstat (limited to 'firmware/target')
| -rw-r--r-- | firmware/target/arm/ata-target.h | 2 | ||||
| -rw-r--r-- | firmware/target/arm/gigabeat/meg-fx/ata-target.h | 2 | ||||
| -rwxr-xr-x | firmware/target/coldfire/ata-as-coldfire.S | 459 | ||||
| -rwxr-xr-x | firmware/target/coldfire/ata-target.h | 6 | ||||
| -rwxr-xr-x | firmware/target/sh/archos/ata-archos.c | 76 | ||||
| -rwxr-xr-x | firmware/target/sh/archos/ata-as-archos.S | 231 | ||||
| -rwxr-xr-x | firmware/target/sh/archos/ata-target.h | 80 |
7 files changed, 850 insertions, 6 deletions
diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h index 0e4c187e27..0f25f89d6b 100644 --- a/firmware/target/arm/ata-target.h +++ b/firmware/target/arm/ata-target.h @@ -20,8 +20,6 @@ #if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) /* Plain C read & write loops */ -#define PREFER_C_READING -#define PREFER_C_WRITING #if (CONFIG_CPU == PP5002) #define ATA_IOBASE 0xc00031e0 diff --git a/firmware/target/arm/gigabeat/meg-fx/ata-target.h b/firmware/target/arm/gigabeat/meg-fx/ata-target.h index 95b66ab1bd..1d49a1b874 100644 --- a/firmware/target/arm/gigabeat/meg-fx/ata-target.h +++ b/firmware/target/arm/gigabeat/meg-fx/ata-target.h @@ -20,8 +20,6 @@ #define ATA_TARGET_H /* Plain C read & write loops */ -#define PREFER_C_READING -#define PREFER_C_WRITING #define ATA_IOBASE 0x18000000 #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE))) diff --git a/firmware/target/coldfire/ata-as-coldfire.S b/firmware/target/coldfire/ata-as-coldfire.S new file mode 100755 index 0000000000..3b0d67f8e4 --- /dev/null +++ b/firmware/target/coldfire/ata-as-coldfire.S @@ -0,0 +1,459 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2006 by Jens Arnold + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + + .section .icode,"ax",@progbits + + .equ .ata_port, 0x20000020 + + .align 2 + .global copy_read_sectors + .type copy_read_sectors,@function + +/* Read a number of words from the ATA data port + * + * Utilises line bursts, assumes there is at least one full line to copy. + * + * Arguments: + * (4,%sp) - buffer address + * (8,%sp) - word count + * + * Register usage: + * %a0 - current address + * %a1 - end address + * %a2 - ata port + * %d0 - scratch + * %d1 - shift count + * %d2-%d6 - read buffers + */ + +copy_read_sectors: + lea.l (-24, %sp), %sp + movem.l %d2-%d6/%a2, (%sp) + movem.l (28, %sp), %a0-%a1 + add.l %a1, %a1 + add.l %a0, %a1 + lea.l .ata_port, %a2 + + move.l %a0, %d0 + btst.l #0, %d0 /* 16-bit aligned? */ + jeq .r_aligned /* yes, do word copy */ + + /* not 16-bit aligned */ + subq.l #1, %a1 /* last byte is done unconditionally */ + moveq.l #24, %d1 /* preload shift count */ + + move.w (%a2), %d2 /* load initial word */ + move.l %d2, %d3 + lsr.l #8, %d3 + move.b %d3, (%a0)+ /* write high byte of it, aligns dest addr */ + + btst.l #1, %d0 /* longword aligned? */ + beq.b .r_end_u_w1 /* yes, skip leading word handling */ + + swap %d2 /* move initial word up */ + move.w (%a2), %d2 /* combine with second word */ + move.l %d2, %d3 + lsr.l #8, %d3 + move.w %d3, (%a0)+ /* write bytes 2 and 3 as word */ + +.r_end_u_w1: + moveq.l #12, %d0 + add.l %a0, %d0 + and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ + cmp.l %a0, %d0 /* any leading longwords? */ + bls.b .r_end_u_l1 /* no: skip loop */ + +.r_loop_u_l1: + move.w (%a2), %d3 /* load first word */ + swap %d3 /* move to upper 16 bit */ + move.w (%a2), %d3 /* load second word */ + move.l %d3, %d4 + lsl.l %d1, %d2 + lsr.l #8, %d3 + or.l %d3, %d2 /* combine old low byte with new top 3 bytes */ + move.l %d2, (%a0)+ /* store as long */ + move.l %d4, %d2 + cmp.l %a0, %d0 /* run up to first line bound */ + bhi.b .r_loop_u_l1 + +.r_end_u_l1: + lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ + +.r_loop_u_line: + move.w (%a2), %d3 /* load 1st word */ + swap %d3 /* move to upper 16 bit */ + move.w (%a2), %d3 /* load 2nd word */ + move.l %d3, %d0 + lsl.l %d1, %d2 + lsr.l #8, %d0 + or.l %d0, %d2 /* combine old low byte with new top 3 bytes */ + move.w (%a2), %d4 /* load 3rd word */ + swap %d4 /* move to upper 16 bit */ + move.w (%a2), %d4 /* load 4th word */ + move.l %d4, %d0 + lsl.l %d1, %d3 + lsr.l #8, %d0 + or.l %d0, %d3 /* combine old low byte with new top 3 bytes */ + move.w (%a2), %d5 /* load 5th word */ + swap %d5 /* move to upper 16 bit */ + move.w (%a2), %d5 /* load 6th word */ + move.l %d5, %d0 + lsl.l %d1, %d4 + lsr.l #8, %d0 + or.l %d0, %d4 /* combine old low byte with new top 3 bytes */ + move.w (%a2), %d6 /* load 7th word */ + swap %d6 /* move to upper 16 bit */ + move.w (%a2), %d6 /* load 8th word */ + move.l %d6, %d0 + lsl.l %d1, %d5 + lsr.l #8, %d0 + or.l %d0, %d5 /* combine old low byte with new top 3 bytes */ + movem.l %d2-%d5, (%a0) /* store line */ + lea.l (16, %a0), %a0 + move.l %d6, %d2 + cmp.l %a0, %a1 /* run up to last line bound */ + bhi.b .r_loop_u_line + + lea.l (12, %a1), %a1 /* readjust for longword loop */ + cmp.l %a0, %a1 /* any trailing longwords? */ + bls.b .r_end_u_l2 /* no: skip loop */ + +.r_loop_u_l2: + move.w (%a2), %d3 /* load first word */ + swap %d3 /* move to upper 16 bit */ + move.w (%a2), %d3 /* load second word */ + move.l %d3, %d4 + lsl.l %d1, %d2 + lsr.l #8, %d3 + or.l %d3, %d2 /* combine old low byte with new top 3 bytes */ + move.l %d2, (%a0)+ /* store as long */ + move.l %d4, %d2 + cmp.l %a0, %a1 /* run up to last long bound */ + bhi.b .r_loop_u_l2 + +.r_end_u_l2: + addq.l #2, %a1 /* back to final end address */ + cmp.l %a0, %a1 /* one word left? */ + bls.b .r_end_u_w2 + + swap %d2 /* move old word to upper 16 bits */ + move.w (%a2), %d2 /* load final word */ + move.l %d2, %d3 + lsr.l #8, %d3 + move.w %d3, (%a0)+ /* write bytes 2 and 3 as word */ + +.r_end_u_w2: + move.b %d2, (%a0)+ /* store final byte */ + bra.b .r_exit + + /* 16-bit aligned */ +.r_aligned: + btst.l #1, %d0 /* longword aligned? */ + beq.b .r_end_a_w1 /* yes, skip leading word handling */ + + move.w (%a2), (%a0)+ /* copy initial word */ + +.r_end_a_w1: + moveq.l #12, %d0 + add.l %a0, %d0 + and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ + cmp.l %a0, %d0 /* any leading longwords? */ + bls.b .r_end_a_l1 /* no: skip loop */ + +.r_loop_a_l1: + move.w (%a2), %d1 /* load first word */ + swap %d1 /* move it to upper 16 bits */ + move.w (%a2), %d1 /* load second word */ + move.l %d1, (%a0)+ /* store as long */ + cmp.l %a0, %d0 /* run up to first line bound */ + bhi.b .r_loop_a_l1 + +.r_end_a_l1: + lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ + +.r_loop_a_line: + move.w (%a2), %d0 /* load 1st word */ + swap %d0 /* move it to upper 16 bits */ + move.w (%a2), %d0 /* load 2nd word */ + move.w (%a2), %d1 /* load 3rd word */ + swap %d1 /* move it to upper 16 bits */ + move.w (%a2), %d1 /* load 4th word */ + move.w (%a2), %d2 /* load 5th word */ + swap %d2 /* move it to upper 16 bits */ + move.w (%a2), %d2 /* load 6th word */ + move.w (%a2), %d3 /* load 7th word */ + swap %d3 /* move it to upper 16 bits */ + move.w (%a2), %d3 /* load 8th word */ + movem.l %d0-%d3, (%a0) /* store line */ + lea.l (16, %a0), %a0 + cmp.l %a0, %a1 /* run up to last line bound */ + bhi.b .r_loop_a_line + + lea.l (12, %a1), %a1 /* readjust for longword loop */ + cmp.l %a0, %a1 /* any trailing longwords? */ + bls.b .r_end_a_l2 /* no: skip loop */ + +.r_loop_a_l2: + move.w (%a2), %d1 /* read first word */ + swap %d1 /* move it to upper 16 bits */ + move.w (%a2), %d1 /* read second word */ + move.l %d1, (%a0)+ /* store as long */ + cmp.l %a0, %a1 /* run up to last long bound */ + bhi.b .r_loop_a_l2 + +.r_end_a_l2: + addq.l #2, %a1 /* back to final end address */ + cmp.l %a0, %a1 /* one word left? */ + bls.b .r_end_a_w2 + + move.w (%a2), (%a0)+ /* copy final word */ + +.r_end_a_w2: + +.r_exit: + movem.l (%sp), %d2-%d6/%a2 + lea.l (24, %sp), %sp + rts + +.r_end: + .size copy_read_sectors,.r_end-copy_read_sectors + + .align 2 + .global copy_write_sectors + .type copy_write_sectors,@function + +/* Write a number of words to the ATA data port + * + * Utilises line bursts, assumes there is at least one full line to copy. + * + * Arguments: + * (4,%sp) - buffer address + * (8,%sp) - word count + * + * Register usage: + * %a0 - current address + * %a1 - end address + * %a2 - ata port + * %d0 - scratch + * %d1 - shift count + * %d2-%d6 - read buffers + */ + +copy_write_sectors: + lea.l (-24, %sp), %sp + movem.l %d2-%d6/%a2, (%sp) + movem.l (28, %sp), %a0-%a1 + add.l %a1, %a1 + add.l %a0, %a1 + lea.l .ata_port, %a2 + + move.l %a0, %d0 + btst.l #0, %d0 /* 16-bit aligned? */ + jeq .w_aligned /* yes, do word copy */ + + /* not 16-bit aligned */ + subq.l #1, %a1 /* last byte is done unconditionally */ + moveq.l #24, %d1 /* preload shift count */ + + move.b (%a0)+, %d2 + + btst.l #1, %d0 /* longword aligned? */ + beq.b .w_end_u_w1 /* yes, skip leading word handling */ + + swap %d2 + move.w (%a0)+, %d2 + move.l %d2, %d3 + lsr.l #8, %d3 + move.w %d3, (%a2) + +.w_end_u_w1: + moveq.l #12, %d0 + add.l %a0, %d0 + and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ + cmp.l %a0, %d0 /* any leading longwords? */ + bls.b .w_end_u_l1 /* no: skip loop */ + +.w_loop_u_l1: + move.l (%a0)+, %d3 + move.l %d3, %d4 + lsl.l %d1, %d2 + lsr.l #8, %d3 + or.l %d3, %d2 + swap %d2 + move.w %d2, (%a2) + swap %d2 + move.w %d2, (%a2) + move.l %d4, %d2 + cmp.l %a0, %d0 /* run up to first line bound */ + bhi.b .w_loop_u_l1 + +.w_end_u_l1: + lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ + +.w_loop_u_line: + movem.l (%a0), %d3-%d6 + lea.l (16, %a0), %a0 + move.l %d3, %d0 + lsl.l %d1, %d2 + lsr.l #8, %d0 + or.l %d0, %d2 + swap %d2 + move.w %d2, (%a2) + swap %d2 + move.w %d2, (%a2) + move.l %d4, %d0 + lsl.l %d1, %d3 + lsr.l #8, %d0 + or.l %d0, %d3 + swap %d3 + move.w %d3, (%a2) + swap %d3 + move.w %d3, (%a2) + move.l %d5, %d0 + lsl.l %d1, %d4 + lsr.l #8, %d0 + or.l %d0, %d4 + swap %d4 + move.w %d4, (%a2) + swap %d4 + move.w %d4, (%a2) + move.l %d6, %d0 + lsl.l %d1, %d5 + lsr.l #8, %d0 + or.l %d0, %d5 + swap %d5 + move.w %d5, (%a2) + swap %d5 + move.w %d5, (%a2) + move.l %d6, %d2 + cmp.l %a0, %a1 /* run up to last line bound */ + bhi.b .w_loop_u_line + + lea.l (12, %a1), %a1 /* readjust for longword loop */ + cmp.l %a0, %a1 /* any trailing longwords? */ + bls.b .w_end_u_l2 /* no: skip loop */ + +.w_loop_u_l2: + move.l (%a0)+, %d3 + move.l %d3, %d4 + lsl.l %d1, %d2 + lsr.l #8, %d3 + or.l %d3, %d2 + swap %d2 + move.w %d2, (%a2) + swap %d2 + move.w %d2, (%a2) + move.l %d4, %d2 + cmp.l %a0, %a1 /* run up to first line bound */ + bhi.b .w_loop_u_l2 + +.w_end_u_l2: + addq.l #2, %a1 /* back to final end address */ + cmp.l %a0, %a1 /* one word left? */ + bls.b .w_end_u_w2 + + swap %d2 + move.w (%a0)+, %d2 + move.l %d2, %d3 + lsr.l #8, %d3 + move.w %d3, (%a2) + +.w_end_u_w2: + lsl.l #8, %d2 + move.b (%a0)+, %d2 + move.w %d2, (%a2) + bra.b .w_exit + + /* 16-bit aligned */ +.w_aligned: + btst.l #1, %d0 + beq.b .w_end_a_w1 + + move.w (%a0)+, (%a2) /* copy initial word */ + +.w_end_a_w1: + moveq.l #12, %d0 + add.l %a0, %d0 + and.l #0xFFFFFFF0,%d0 /* d0 == first line bound */ + cmp.l %a0, %d0 /* any leading longwords? */ + bls.b .w_end_a_l1 /* no: skip loop */ + +.w_loop_a_l1: + move.l (%a0)+, %d1 + swap %d1 + move.w %d1, (%a2) + swap %d1 + move.w %d1, (%a2) + cmp.l %a0, %d0 /* run up to first line bound */ + bhi.b .w_loop_a_l1 + +.w_end_a_l1: + lea.l (-14, %a1), %a1 /* adjust end addr. to 16 bytes/pass */ + +.w_loop_a_line: + movem.l (%a0), %d0-%d3 + lea.l (16, %a0), %a0 + swap %d0 + move.w %d0, (%a2) + swap %d0 + move.w %d0, (%a2) + swap %d1 + move.w %d1, (%a2) + swap %d1 + move.w %d1, (%a2) + swap %d2 + move.w %d2, (%a2) + swap %d2 + move.w %d2, (%a2) + swap %d3 + move.w %d3, (%a2) + swap %d3 + move.w %d3, (%a2) + cmp.l %a0, %a1 /* run up to last line bound */ + bhi.b .w_loop_a_line + + lea.l (12, %a1), %a1 /* readjust for longword loop */ + cmp.l %a0, %a1 /* any trailing longwords? */ + bls.b .w_end_a_l2 /* no: skip loop */ + +.w_loop_a_l2: + move.l (%a0)+, %d1 + swap %d1 + move.w %d1, (%a2) + swap %d1 + move.w %d1, (%a2) + cmp.l %a0, %a1 /* run up to first line bound */ + bhi.b .w_loop_a_l2 + +.w_end_a_l2: + addq.l #2, %a1 /* back to final end address */ + cmp.l %a0, %a1 /* one word left? */ + bls.b .w_end_a_w2 + + move.w (%a0)+, (%a2) /* copy final word */ + +.w_end_a_w2: + +.w_exit: + movem.l (%sp), %d2-%d6/%a2 + lea.l (24, %sp), %sp + rts + +.w_end: + .size copy_write_sectors,.w_end-copy_write_sectors diff --git a/firmware/target/coldfire/ata-target.h b/firmware/target/coldfire/ata-target.h index 4a28c3ae3f..e246dc7af1 100755 --- a/firmware/target/coldfire/ata-target.h +++ b/firmware/target/coldfire/ata-target.h @@ -20,8 +20,8 @@ #define ATA_TARGET_H /* asm optimised read & write loops */ - -#define NOINLINE_ATTR __attribute__((noinline)) /* don't inline the loops */ +#define ATA_OPTIMIZED_READING +#define ATA_OPTIMIZED_WRITING #define ATA_IOBASE 0x20000000 #define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE + 0x20))) @@ -65,4 +65,6 @@ void ata_reset(void); void ata_device_init(void); bool ata_is_coldstart(void); +void copy_read_sectors(unsigned char* buf, int wordcount); +void copy_write_sectors(const unsigned char* buf, int wordcount); #endif diff --git a/firmware/target/sh/archos/ata-archos.c b/firmware/target/sh/archos/ata-archos.c new file mode 100755 index 0000000000..73e56b8d84 --- /dev/null +++ b/firmware/target/sh/archos/ata-archos.c @@ -0,0 +1,76 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2006 by Jens Arnold + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +#include "config.h" +#include "cpu.h" +#include <stdbool.h> +#include "kernel.h" +#include "system.h" +#include "ata-target.h" +#include "hwcompat.h" + +volatile unsigned char* ata_control; +int ata_io_address; /* 0x300 or 0x200 */ + +void ata_reset(void) +{ + /* state HRR0 */ + and_b(~0x02, &PADRH); /* assert _RESET */ + sleep(1); /* > 25us */ + + /* state HRR1 */ + or_b(0x02, &PADRH); /* negate _RESET */ + sleep(1); /* > 2ms */ +} + +void ata_address_detect(void) +{ + if (read_hw_mask() & ATA_ADDRESS_200) + { + ata_io_address = 0x200; /* For debug purposes only */ + ata_control = ATA_CONTROL1; + } + else + { + ata_io_address = 0x300; /* For debug purposes only */ + ata_control = ATA_CONTROL2; + } +} + +void ata_enable(bool on) +{ + if(on) + and_b(~0x80, &PADRL); /* enable ATA */ + else + or_b(0x80, &PADRL); /* disable ATA */ + + or_b(0x80, &PAIORL); +} + +void ata_device_init(void) +{ + or_b(0x02, &PAIORH); /* output for ATA reset */ + or_b(0x02, &PADRH); /* release ATA reset */ + PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */ +} + +bool ata_is_coldstart(void) +{ + return (PACR2 & 0x4000) != 0; +} diff --git a/firmware/target/sh/archos/ata-as-archos.S b/firmware/target/sh/archos/ata-as-archos.S new file mode 100755 index 0000000000..4a4e7e4b94 --- /dev/null +++ b/firmware/target/sh/archos/ata-as-archos.S @@ -0,0 +1,231 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2004-2006 by Jens Arnold + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + + .section .icode,"ax",@progbits + + .align 2 + .global _copy_read_sectors + .type _copy_read_sectors,@function + +/* Read a number of words from the ATA data port + * + * Assumes wordcount to be a multiple of 4 + * + * Arguments: + * r4 - buffer address + * r5 - word count + * + * Register usage: + * r0 - scratch + * r1/r2 - read buffers + * r3 - mask (if unaligned) + * r4 - current address + * r5 - end address + * r6 - ata port + */ + +_copy_read_sectors: + add r5, r5 /* words -> bytes */ + add r4, r5 /* bytes -> end address */ + add #-12, r5 /* adjust for offsets */ + mov.l .ata_data, r6 + + mov r4, r0 + tst #1, r0 /* 16-bit aligned ? */ + bt .r_aligned /* yes, do word copy */ + + /* not 16-bit aligned */ + mov #-1, r3 /* prepare a bit mask for high byte */ + shll8 r3 /* r3 = 0xFFFFFF00 */ + + mov.w @r6, r2 /* read first word (1st round) */ + mov.b r2, @r4 /* store low byte of first word */ + bra .r_start_b /* jump into loop after next instr. */ + add #-5, r4 /* adjust for dest. offsets; now even */ + + .align 2 +.r_loop_b: /* main loop: copy 4 words in a row */ + mov.w @r6, r2 /* read first word (2+ round) */ + and r3, r1 /* get high byte of fourth word (2+ round) */ + extu.b r2, r0 /* get low byte of first word (2+ round) */ + or r1, r0 /* combine with high byte of fourth word */ + mov.w r0, @(4, r4) /* store at buf[4] */ + nop /* maintain alignment */ +.r_start_b: + mov.w @r6, r1 /* read second word */ + and r3, r2 /* get high byte of first word */ + extu.b r1, r0 /* get low byte of second word */ + or r2, r0 /* combine with high byte of first word */ + mov.w r0, @(6, r4) /* store at buf[6] */ + add #8, r4 /* buf += 8 */ + mov.w @r6, r2 /* read third word */ + and r3, r1 /* get high byte of second word */ + extu.b r2, r0 /* get low byte of third word */ + or r1, r0 /* combine with high byte of second word */ + mov.w r0, @r4 /* store at buf[0] */ + cmp/hi r4, r5 /* check for end */ + mov.w @r6, r1 /* read fourth word */ + and r3, r2 /* get high byte of third word */ + extu.b r1, r0 /* get low byte of fourth word */ + or r2, r0 /* combine with high byte of third word */ + mov.w r0, @(2, r4) /* store at buf[2] */ + bt .r_loop_b + /* 24 instructions for 4 copies, takes 30 clock cycles (4 wait) */ + /* avg. 7.5 cycles per word */ + + swap.b r1, r0 /* get high byte of last word */ + rts + mov.b r0, @(4, r4) /* and store it */ + + /* 16-bit aligned, loop(read and store word) */ +.r_aligned: + mov.w @r6, r2 /* read first word (1st round) */ + bra .r_start_w /* jump into loop after next instr. */ + add #-6, r4 /* adjust for destination offsets */ + + .align 2 +.r_loop_w: /* main loop: copy 4 words in a row */ + mov.w @r6, r2 /* read first word (2+ round) */ + swap.b r1, r0 /* swap fourth word (2+ round) */ + mov.w r0, @(4, r4) /* store fourth word (2+ round) */ + nop /* maintain alignment */ +.r_start_w: + mov.w @r6, r1 /* read second word */ + swap.b r2, r0 /* swap first word */ + mov.w r0, @(6, r4) /* store first word in buf[6] */ + add #8, r4 /* buf += 8 */ + mov.w @r6, r2 /* read third word */ + swap.b r1, r0 /* swap second word */ + mov.w r0, @r4 /* store second word in buf[0] */ + cmp/hi r4, r5 /* check for end */ + mov.w @r6, r1 /* read fourth word */ + swap.b r2, r0 /* swap third word */ + mov.w r0, @(2, r4) /* store third word */ + bt .r_loop_w + /* 16 instructions for 4 copies, takes 22 clock cycles (4 wait) */ + /* avg. 5.5 cycles per word */ + + swap.b r1, r0 /* swap fourth word (last round) */ + rts + mov.w r0, @(4, r4) /* and store it */ + +.r_end: + .size _copy_read_sectors,.r_end-_copy_read_sectors + + .align 2 + .global _copy_write_sectors + .type _copy_write_sectors,@function + +/* Write a number of words to the ATA data port + * + * Assumes wordcount to be a multiple of 2. + * Writing is not unrolled as much as reading, for several reasons: + * + * - a similar instruction sequence is faster for writing than for reading + * because the auto-incrementing load inctructions can be used + * - writing profits from warp mode + * + * Both of these add up to have writing faster than the more unrolled reading. + * + * Arguments: + * r4 - buffer address + * r5 - word count + * + * Register usage: + * r0/r1 - scratch + * r2/r3 - write buffers + * r4 - current address + * r5 - end address + * r6 - mask (if unaligned) + * r7 - ata port + */ + +_copy_write_sectors: + add r5, r5 /* words -> bytes */ + add r4, r5 /* bytes -> end address */ + add #-4, r5 /* adjust for offsets */ + mov.l .ata_data, r7 + + mov r4, r0 + tst #1, r0 /* 16-bit aligned ? */ + bt .w_aligned /* yes, do word copy */ + + /* not 16-bit aligned */ + mov #-1, r6 /* prepare a bit mask for high byte */ + shll8 r6 /* r6 = 0xFFFFFF00 */ + + mov.b @r4+, r2 /* load (initial old second) first byte */ + mov.w @r4+, r3 /* load (initial) first word */ + bra .w_start_b + extu.b r2, r0 /* extend unsigned */ + + .align 2 +.w_loop_b: /* main loop: copy 2 words in a row */ + mov.w @r4+, r3 /* load first word (2+ round) */ + extu.b r2, r0 /* put away low byte of second word (2+ round) */ + and r6, r2 /* get high byte of second word (2+ round) */ + or r1, r2 /* combine with low byte of old first word */ + mov.w r2, @r7 /* write that */ +.w_start_b: + cmp/hi r4, r5 /* check for end */ + mov.w @r4+, r2 /* load second word */ + extu.b r3, r1 /* put away low byte of first word */ + and r6, r3 /* get high byte of first word */ + or r0, r3 /* combine with high byte of old second word */ + mov.w r3, @r7 /* write that */ + bt .w_loop_b + /* 12 instructions for 2 copies, takes 14 clock cycles */ + /* avg. 7 cycles per word */ + + /* the loop "overreads" 1 byte past the buffer end, however, the last */ + /* byte is not written to disk */ + and r6, r2 /* get high byte of last word */ + or r1, r2 /* combine with low byte of old first word */ + rts + mov.w r2, @r7 /* write last word */ + + /* 16-bit aligned, loop(load and write word) */ +.w_aligned: + bra .w_start_w /* jump into loop after next instr. */ + mov.w @r4+, r2 /* load first word (1st round) */ + + .align 2 +.w_loop_w: /* main loop: copy 2 words in a row */ + mov.w @r4+, r2 /* load first word (2+ round) */ + swap.b r1, r0 /* swap second word (2+ round) */ + mov.w r0, @r7 /* write second word (2+ round) */ +.w_start_w: + cmp/hi r4, r5 /* check for end */ + mov.w @r4+, r1 /* load second word */ + swap.b r2, r0 /* swap first word */ + mov.w r0, @r7 /* write first word */ + bt .w_loop_w + /* 8 instructions for 2 copies, takes 10 clock cycles */ + /* avg. 5 cycles per word */ + + swap.b r1, r0 /* swap second word (last round) */ + rts + mov.w r0, @r7 /* and write it */ + +.w_end: + .size _copy_write_sectors,.w_end-_copy_write_sectors + + .align 2 +.ata_data: + .long 0x06104100 /* ATA data port */ diff --git a/firmware/target/sh/archos/ata-target.h b/firmware/target/sh/archos/ata-target.h new file mode 100755 index 0000000000..ddffb34f5a --- /dev/null +++ b/firmware/target/sh/archos/ata-target.h @@ -0,0 +1,80 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id$ + * + * Copyright (C) 2006 by Jens Arnold + * + * All files in this archive are subject to the GNU General Public License. + * See the file COPYING in the source tree root for full license agreement. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef ATA_TARGET_H +#define ATA_TARGET_H + +/* asm optimised read & write loops */ +#define ATA_OPTIMIZED_READING +#define ATA_OPTIMIZED_WRITING +#define ATA_ADDRESS_DETECT /* need address detection */ + +#define SWAP_WORDS + +#define ATA_IOBASE 0x06100100 +#define ATA_DATA (*((volatile unsigned short*)0x06104100)) +#define ATA_CONTROL1 ((volatile unsigned char*)0x06200206) +#define ATA_CONTROL2 ((volatile unsigned char*)0x06200306) +#define ATA_CONTROL (*ata_control) + +#define ATA_ERROR (*((volatile unsigned char*)ATA_IOBASE + 1)) +#define ATA_NSECTOR (*((volatile unsigned char*)ATA_IOBASE + 2)) +#define ATA_SECTOR (*((volatile unsigned char*)ATA_IOBASE + 3)) +#define ATA_LCYL (*((volatile unsigned char*)ATA_IOBASE + 4)) +#define ATA_HCYL (*((volatile unsigned char*)ATA_IOBASE + 5)) +#define ATA_SELECT (*((volatile unsigned char*)ATA_IOBASE + 6)) +#define ATA_COMMAND (*((volatile unsigned char*)ATA_IOBASE + 7)) + +#define STATUS_BSY 0x80 +#define STATUS_RDY 0x40 +#define STATUS_DF 0x20 +#define STATUS_DRQ 0x08 +#define STATUS_ERR 0x01 + +#define ERROR_ABRT 0x04 + +#define WRITE_PATTERN1 0xa5 +#define WRITE_PATTERN2 0x5a +#define WRITE_PATTERN3 0xaa +#define WRITE_PATTERN4 0x55 + +#define READ_PATTERN1 0xa5 +#define READ_PATTERN2 0x5a +#define READ_PATTERN3 0xaa +#define READ_PATTERN4 0x55 + +#define READ_PATTERN1_MASK 0xff +#define READ_PATTERN2_MASK 0xff +#define READ_PATTERN3_MASK 0xff +#define READ_PATTERN4_MASK 0xff + +#define SET_REG(reg,val) reg = (val) +#define SET_16BITREG(reg,val) reg = (val) + +extern volatile unsigned char* ata_control; +extern int ata_io_address; + +void ata_reset(void); +void ata_address_detect(void); +void ata_enable(bool on); +void ata_device_init(void); +bool ata_is_coldstart(void); + +void copy_read_sectors(unsigned char* buf, int wordcount); +void copy_write_sectors(const unsigned char* buf, int wordcount); +#endif |