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-rw-r--r--firmware/target/arm/as3525/ascodec-as3525.c31
-rw-r--r--firmware/target/arm/as3525/clock-target.h28
-rw-r--r--firmware/target/arm/as3525/sansa-clipplus/lcd-clip-plus.c23
-rw-r--r--firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c24
-rw-r--r--firmware/target/arm/as3525/sd-as3525.c138
-rw-r--r--firmware/target/arm/as3525/sd-as3525v2.c26
-rw-r--r--firmware/target/arm/as3525/system-as3525.c70
-rw-r--r--firmware/target/arm/as3525/system-target.h20
8 files changed, 51 insertions, 309 deletions
diff --git a/firmware/target/arm/as3525/ascodec-as3525.c b/firmware/target/arm/as3525/ascodec-as3525.c
index d23859e420..14c3ee7a36 100644
--- a/firmware/target/arm/as3525/ascodec-as3525.c
+++ b/firmware/target/arm/as3525/ascodec-as3525.c
@@ -623,25 +623,11 @@ void i2c_init(void)
/* required function but called too late for our needs */
}
-static void i2c_set_prescaler(unsigned int prescaler)
-{
- int oldlevel = disable_interrupt_save(IRQ_FIQ_STATUS);
- /* must be on to write regs */
- bool i2c_enabled = bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE) &
- CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE;
-
- I2C2_CPSR0 = prescaler & 0xFF; /* 8 lsb */
- I2C2_CPSR1 = (prescaler >> 8) & 0x3; /* 2 msb */
-
- if (!i2c_enabled) /* put it back how we found it */
- bitclr32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
-
- restore_irq(oldlevel);
-}
-
/* initialises the internal i2c bus and prepares for transfers to the codec */
void ascodec_init(void)
{
+ int prescaler;
+
ll_init(&req_list);
mutex_init(&as_mtx);
ascodec_async_init(&as_audio_req, ascodec_int_audio_cb, 0);
@@ -651,7 +637,9 @@ void ascodec_init(void)
bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
/* prescaler for i2c clock */
- i2c_set_prescaler(AS3525_I2C_PRESCALER);
+ prescaler = AS3525_I2C_PRESCALER;
+ I2C2_CPSR0 = prescaler & 0xFF; /* 8 lsb */
+ I2C2_CPSR1 = (prescaler >> 8) & 0x3; /* 2 msb */
/* set i2c slave address of codec part */
I2C2_SLAD0 = AS3514_I2C_ADDR << 1;
@@ -702,12 +690,3 @@ void ams_i2c_get_debug_cpsr(unsigned int *i2c_cpsr)
restore_irq(oldlevel);
}
-
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_I2C)
-/* declared in system-as3525.c */
-void ams_i2c_set_low_speed(bool slow)
-{
- i2c_set_prescaler(slow ? AS3525_I2C_PRESCALER_MAX : AS3525_I2C_PRESCALER);
-}
-#endif
-
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h
index c45529dfda..7f6b17eff4 100644
--- a/firmware/target/arm/as3525/clock-target.h
+++ b/firmware/target/arm/as3525/clock-target.h
@@ -158,32 +158,22 @@
#endif /* CONFIG_CPU */
/* PCLK as Source */
- #define AS3525_DBOP_DIV (CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ) - 1) /*div=1/(n+1)*/
- #define AS3525_I2C_PRESCALER CLK_DIV(AS3525_PCLK_FREQ, AS3525_I2C_FREQ)
- #define AS3525_I2C_PRESCALER_MAX 0xFF | 0x300 /* Max value for prescaler */
- #define AS3525_I2C_FREQ 400000
- #define AS3525_SD_IDENT_DIV ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SD_IDENT_FREQ) / 2) - 1)
- #define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */
- #define AS3525_SSP_PRESCALER ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SSP_FREQ) + 1) & ~1) /* must be an even number */
-#if LCD_DEPTH > 1
- #define AS3525_SSP_PRESCALER_MAX ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SSP_FREQ_MIN) + 1) & ~1)/* must be an even number */
- #define AS3525_SSP_FREQ_MIN 2000000 /* 2 MHz gives a decent refresh rate on clipzip*/
-#else
- #define AS3525_SSP_PRESCALER_MAX 0xFE & ~1 /*Max value for divider - must be an even number */
- #define AS3525_SSP_FREQ_MIN AS3525_SSP_FREQ /* No set minimum we just use max divider */
-#endif
- #define AS3525_SSP_FREQ 12000000
+ #define AS3525_DBOP_DIV (CLK_DIV(AS3525_PCLK_FREQ, AS3525_DBOP_FREQ) - 1) /*div=1/(n+1)*/
+ #define AS3525_I2C_PRESCALER CLK_DIV(AS3525_PCLK_FREQ, AS3525_I2C_FREQ)
+ #define AS3525_I2C_FREQ 400000
+ #define AS3525_SD_IDENT_DIV ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SD_IDENT_FREQ) / 2) - 1)
+ #define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */
+ #define AS3525_SSP_PRESCALER ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SSP_FREQ) + 1) & ~1) /* must be an even number */
+ #define AS3525_SSP_FREQ 12000000
#define AS3525_IDE_SEL AS3525_CLK_PLLA /* Input Source */
#define AS3525_IDE_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_IDE_FREQ) - 1)/*div=1/(n+1)*/
-#define AS3525_IDE_DIV_MAX 0xF /* Max value for divider */
#if CONFIG_CPU == AS3525v2
#define AS3525_MS_FREQ 120000000
#define AS3525_MS_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_MS_FREQ) -1)
#define AS3525_SDSLOT_FREQ 24000000
#define AS3525_SDSLOT_DIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_SDSLOT_FREQ) -1)
-#define AS3525_SDSLOT_DIV_MAX 0xF /* Max value for divider */
#define AS3525_IDE_FREQ 80000000
#else
#define AS3525_IDE_FREQ 50000000 /* The OF uses 66MHz maximal freq */
@@ -221,10 +211,6 @@
#error SSP frequency is too low : clock divider will not fit !
#endif
-#if (((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SSP_FREQ_MIN)) + 1 ) & ~1) >= (1<<8) /* 8 bits */
-#error SSP_MIN frequency is too low : clock divider will not fit !
-#endif
-
/* AS3525_SD_IDENT_FREQ */
#if ((CLK_DIV(AS3525_PCLK_FREQ, AS3525_SD_IDENT_FREQ) / 2) - 1) >= (1<<8) /* 8 bits */
#error SD IDENTIFICATION frequency is too low : clock divider will not fit !
diff --git a/firmware/target/arm/as3525/sansa-clipplus/lcd-clip-plus.c b/firmware/target/arm/as3525/sansa-clipplus/lcd-clip-plus.c
index 7c0cfb5345..a50a9e5c80 100644
--- a/firmware/target/arm/as3525/sansa-clipplus/lcd-clip-plus.c
+++ b/firmware/target/arm/as3525/sansa-clipplus/lcd-clip-plus.c
@@ -26,25 +26,11 @@
#include "system.h"
#include "cpu.h"
-static void ssp_set_prescaler(unsigned int prescaler)
-{
- int oldlevel = disable_interrupt_save(IRQ_FIQ_STATUS);
- /* must be on to write regs */
- bool ssp_enabled = bitset32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE) &
- CGU_SSP_CLOCK_ENABLE;
- SSP_CPSR = prescaler;
-
- if (!ssp_enabled) /* put it back how we found it */
- bitclr32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE);
-
- restore_irq(oldlevel);
-}
-
int lcd_hw_init(void)
{
bitset32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE);
- ssp_set_prescaler(AS3525_SSP_PRESCALER); /* OF = 0x10 */
+ SSP_CPSR = AS3525_SSP_PRESCALER; /* OF = 0x10 */
SSP_CR0 = (1<<7) | (1<<6) | 7; /* Motorola SPI frame format, 8 bits */
SSP_CR1 = (1<<3) | (1<<1); /* SSP Operation enabled */
SSP_IMSC = 0; /* No interrupts */
@@ -129,10 +115,3 @@ void lcd_enable_power(bool onoff)
#endif
}
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_DISP)
-/* declared in system-as3525.c */
-void ams_ssp_set_low_speed(bool slow)
-{
- ssp_set_prescaler(slow ? AS3525_SSP_PRESCALER_MAX : AS3525_SSP_PRESCALER);
-}
-#endif
diff --git a/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c b/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c
index 8a3df517fb..e17bfc421b 100644
--- a/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c
+++ b/firmware/target/arm/as3525/sansa-clipzip/lcd-clipzip.c
@@ -35,26 +35,12 @@ static int lcd_type;
static bool lcd_enabled;
#endif
-static void ssp_set_prescaler(unsigned int prescaler)
-{
- int oldlevel = disable_interrupt_save(IRQ_FIQ_STATUS);
- /* must be on to write regs */
- bool ssp_enabled = bitset32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE) &
- CGU_SSP_CLOCK_ENABLE;
- SSP_CPSR = prescaler;
-
- if (!ssp_enabled) /* put it back how we found it */
- bitclr32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE);
-
- restore_irq(oldlevel);
-}
-
/* initialises the host lcd hardware, returns the lcd type */
static int lcd_hw_init(void)
{
/* configure SSP */
bitset32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE);
- ssp_set_prescaler(AS3525_SSP_PRESCALER); /* OF = 0x8 */
+ SSP_CPSR = 4; /* TODO: use AS3525_SSP_PRESCALER, OF uses 8 */
SSP_CR0 = (0 << 8) | /* SCR, serial clock rate divider = 1 */
(1 << 7) | /* SPH, phase = 1 */
(1 << 6) | /* SPO, polarity = 1 */
@@ -451,11 +437,3 @@ void lcd_update(void)
{
lcd_update_rect(0, 0, LCD_WIDTH, LCD_HEIGHT);
}
-
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_DISP)
-/* declared in system-as3525.c */
-void ams_ssp_set_low_speed(bool slow)
-{
- ssp_set_prescaler(slow ? AS3525_SSP_PRESCALER_MAX : AS3525_SSP_PRESCALER);
-}
-#endif
diff --git a/firmware/target/arm/as3525/sd-as3525.c b/firmware/target/arm/as3525/sd-as3525.c
index 9e4a86acbe..494a76a782 100644
--- a/firmware/target/arm/as3525/sd-as3525.c
+++ b/firmware/target/arm/as3525/sd-as3525.c
@@ -89,8 +89,6 @@
| MCI_CMD_CRC_FAIL)
#define MCI_FIFO(i) ((unsigned long *) (pl180_base[i]+0x80))
-
-#define IDE_INTERFACE_CLK (1<<6) /* non AHB interface */
/* volumes */
#define INTERNAL_AS3525 0 /* embedded SD card */
#define SD_SLOT_AS3525 1 /* SD slot if present */
@@ -111,8 +109,7 @@ static void init_pl180_controller(const int drive);
static tCardInfo card_info[NUM_DRIVES];
-/* maximum timeouts recommended in the SD Specification v2.00 */
-/* MCI_DATA_TIMER register data timeout in card bus clock periods */
+/* maximum timeouts recommanded in the SD Specification v2.00 */
#define SD_MAX_READ_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 100) /* 100 ms */
#define SD_MAX_WRITE_TIMEOUT ((AS3525_PCLK_FREQ) / 1000 * 250) /* 250 ms */
@@ -146,17 +143,7 @@ static unsigned char *uncached_buffer = AS3525_UNCACHED_ADDR(&aligned_buffer[0])
static inline void mci_delay(void) { udelay(1000) ; }
-static inline bool card_detect_target(void)
-{
-#if defined(HAVE_MULTIDRIVE)
- return !(GPIOA_PIN(2));
-#else
- return false;
-#endif
-}
-
-#if defined(HAVE_MULTIDRIVE) || defined(HAVE_HOTSWAP)
-static void enable_controller_mci(bool on)
+static void enable_controller(bool on)
{
#if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
@@ -210,33 +197,17 @@ static void enable_controller_mci(bool on)
#endif
}
}
-#endif /* defined(HAVE_MULTIDRIVE) || defined(HAVE_HOTSWAP) */
-/* AMS v1 have two different drive interfaces MCI_SD(XPD) and GGU_IDE */
-static void enable_controller(bool on, const int drive)
+static inline bool card_detect_target(void)
{
-
- if (drive == INTERNAL_AS3525)
- {
-#ifndef BOOTLOADER
- if (on)
- {
- bitset32(&CGU_PERI, CGU_NAF_CLOCK_ENABLE);
- CGU_IDE |= IDE_INTERFACE_CLK; /* interface enable */
- }
- else
- {
- CGU_IDE &= ~(IDE_INTERFACE_CLK); /* interface disable */
- bitclr32(&CGU_PERI, CGU_NAF_CLOCK_ENABLE);
- }
-#endif
- }
-#if defined(HAVE_MULTIDRIVE) || defined(HAVE_HOTSWAP)
- else
- enable_controller_mci(on);
+#if defined(HAVE_MULTIDRIVE)
+ return !(GPIOA_PIN(2));
+#else
+ return false;
#endif
}
+
#ifdef HAVE_HOTSWAP
static int sd1_oneshot_callback(struct timeout *tmo)
{
@@ -355,7 +326,6 @@ static bool send_cmd(const int drive, const int cmd, const int arg,
return false;
}
-/* MCI_CLOCK = MCLK / 2x(ClkDiv[bits 7:0]+1) */
#define MCI_FULLSPEED (MCI_CLOCK_ENABLE | MCI_CLOCK_BYPASS) /* MCLK */
#define MCI_HALFSPEED (MCI_CLOCK_ENABLE) /* MCLK/2 */
#define MCI_QUARTERSPEED (MCI_CLOCK_ENABLE | 1) /* MCLK/4 */
@@ -375,7 +345,7 @@ static int sd_init_card(const int drive)
/* 100 - 400kHz clock required for Identification Mode */
/* Start of Card Identification Mode ************************************/
- /* CMD0 Go Idle -- all card functions switch back to default */
+ /* CMD0 Go Idle */
if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_RESP, NULL))
return -1;
mci_delay();
@@ -423,10 +393,10 @@ static int sd_init_card(const int drive)
if(sd_wait_for_tran_state(drive))
return -6;
- /* CMD6 0xf indicates no influence, [3:0],0x1 - HS Access*/
+ /* CMD6 */
if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_NO_RESP, NULL))
return -7;
- sleep(HZ/10);/* need to wait at least 8 clock periods */
+ sleep(HZ/10);
/* go back to STBY state so we can read csd */
/* CMD7 w/rca=0: Deselect card to put it in STBY state */
@@ -547,7 +517,7 @@ static void init_pl180_controller(const int drive)
int sd_init(void)
{
int ret;
- CGU_IDE = IDE_INTERFACE_CLK /* enable interface */
+ CGU_IDE = (1<<6) /* enable non AHB interface*/
| (AS3525_IDE_DIV << 2)
| AS3525_CLK_PLLA; /* clock source = PLLA */
@@ -570,9 +540,7 @@ int sd_init(void)
/* init mutex */
mutex_init(&sd_mtx);
- for (int i = 0; i < NUM_DRIVES ; i++)
- enable_controller(false, i);
-
+ enable_controller(false);
return 0;
}
@@ -688,7 +656,7 @@ static int sd_transfer_sectors(IF_MD(int drive,) unsigned long start,
unsigned long response;
bool aligned = !((uintptr_t)buf & (CACHEALIGN_SIZE - 1));
- enable_controller(true, drive);
+ enable_controller(true);
led(true);
if (card_info[drive].initialized <= 0)
@@ -724,21 +692,27 @@ static int sd_transfer_sectors(IF_MD(int drive,) unsigned long start,
else
discard_dcache_range(buf, count * SECTOR_SIZE);
}
- const int cmd = write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
- while(count > 0)
+
+ while(count)
{
/* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
* register, so we have to transfer maximum 127 sectors at a time. */
unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
void *dma_buf;
-
+ const int cmd =
+ write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
unsigned long bank_start = start;
+ unsigned long status;
/* Only switch banks for internal storage */
if(drive == INTERNAL_AS3525)
{
- unsigned int bank = bank_start / BLOCKS_PER_BANK;
- bank_start -= bank * BLOCKS_PER_BANK;
+ unsigned int bank = 0;
+ while(bank_start >= BLOCKS_PER_BANK)
+ {
+ bank_start -= BLOCKS_PER_BANK;
+ bank++;
+ }
/* Switch bank if needed */
if(card_info[INTERNAL_AS3525].current_bank != bank)
@@ -796,7 +770,10 @@ static int sd_transfer_sectors(IF_MD(int drive,) unsigned long start,
/*Small delay for writes prevents data crc failures at lower freqs*/
#ifdef HAVE_MULTIDRIVE
if((drive == SD_SLOT_AS3525) && !hs_card)
- udelay(4);
+ {
+ int write_delay = 125;
+ while(write_delay--);
+ }
#endif
}
else
@@ -827,7 +804,7 @@ static int sd_transfer_sectors(IF_MD(int drive,) unsigned long start,
last_disk_activity = current_tick;
- if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_RESP, &response))
+ if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_RESP, &status))
{
ret = -4*20;
goto sd_transfer_error;
@@ -854,7 +831,7 @@ sd_transfer_error:
sd_transfer_error_nodma:
led(false);
- enable_controller(false, drive);
+ enable_controller(false);
if (ret) /* error */
card_info[drive].initialized = 0;
@@ -945,18 +922,12 @@ void ams_sd_get_debug_info(struct ams_sd_debug_info *info)
#define MCI_SD *((volatile unsigned long *)(SD_MCI_BASE + 0x04))
mutex_lock(&sd_mtx);
-
- for (int i = 0; i < NUM_DRIVES ; i++)
- enable_controller(true, i); /* must be on to read regs */
-
+ enable_controller(true); /* must be on to read regs */
info->mci_nand = MCI_NAND;
#ifdef HAVE_MULTIDRIVE
info->mci_sd = MCI_SD;
#endif
-
- for (int i = 0; i < NUM_DRIVES ; i++)
- enable_controller(false, i);
-
+ enable_controller(false);
mutex_unlock(&sd_mtx);
}
@@ -977,10 +948,10 @@ int sd_event(long id, intptr_t data)
if (id == SYS_HOTSWAP_INSERTED)
{
- enable_controller(true, data);
+ enable_controller(true);
init_pl180_controller(data);
rc = sd_init_card(data);
- enable_controller(false, data);
+ enable_controller(false);
}
mutex_unlock(&sd_mtx);
@@ -997,42 +968,3 @@ int sd_event(long id, intptr_t data)
return rc;
}
-
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_DISK)
-/* declared in system-as3525.c */
-void ams_sd_set_low_speed(bool slow)
-{
- /* block access while speed is changed */
- mutex_lock(&sd_mtx);
- enable_controller(true, INTERNAL_AS3525);
-
- /* After a data write, data cannot be written to MCI_CLOCK
- for 3 MCLK periods + 2 PCLK periods. ~10us worst case
- */
- udelay(100);
- if (slow)
- {
- /* only affects internal drive clock speed*/
- CGU_IDE = (CGU_IDE & ~(0xF << 2)) | (AS3525_IDE_DIV_MAX << 2);
- /* power save is enabled for the sd card(s) */
- for (int i = 0; i < NUM_DRIVES ; i++)
- {
- if (i != INTERNAL_AS3525 && (MCI_CLOCK(i) & MCI_CLOCK_POWERSAVE) == 0)
- MCI_CLOCK(i) |= MCI_CLOCK_POWERSAVE;
- }
- }
- else
- {
- /* Full Speed */
- CGU_IDE = (CGU_IDE & ~(0xF << 2)) | (AS3525_IDE_DIV << 2);
- for (int i = 0; i < NUM_DRIVES ; i++)
- {
- if (i != INTERNAL_AS3525 && (MCI_CLOCK(i) & MCI_CLOCK_POWERSAVE) != 0)
- MCI_CLOCK(i) = (MCI_CLOCK(i) & ~MCI_CLOCK_POWERSAVE);
- }
- }
- enable_controller(false, INTERNAL_AS3525);
- mutex_unlock(&sd_mtx);
-}
-#endif
-
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c
index d27df5289c..b512cc2ea4 100644
--- a/firmware/target/arm/as3525/sd-as3525v2.c
+++ b/firmware/target/arm/as3525/sd-as3525v2.c
@@ -488,7 +488,7 @@ static int sd_init_card(const int drive)
card_info[drive].initialized = 0;
card_info[drive].rca = 0;
- /* assume 24 MHz clock / (2x)60 = 200 kHz */
+ /* assume 24 MHz clock / 60 = 400 kHz */
MCI_CLKDIV = (MCI_CLKDIV & ~(0xFF)) | 0x3C; /* CLK_DIV_0 : bits 7:0 */
/* 100 - 400kHz clock required for Identification Mode */
@@ -957,27 +957,3 @@ int sd_event(long id, intptr_t data)
return rc;
}
-
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_DISK)
-/* declared in system-as3525.c */
-void ams_sd_set_low_speed(bool slow)
-{
- /* block access while speed is changed */
- mutex_lock(&sd_mtx);
- enable_controller(true);
- if (slow)
- {
- CGU_SDSLOT = (CGU_SDSLOT & ~(0xF << 2)) | (AS3525_SDSLOT_DIV_MAX << 2);
- /* power save is enabled for the sd card(s) ASSUMES CRD0 is int drive! */
- MCI_CLKENA |= (CCLK_LP_CRD1 | CCLK_LP_CRD2 | CCLK_LP_CRD3);
- }
- else
- {
- /* Full Speed */
- CGU_SDSLOT = (CGU_SDSLOT & ~(0xF << 2)) | (AS3525_SDSLOT_DIV << 2);
- MCI_CLKENA = (MCI_CLKENA & ~(CCLK_LP_CRD1 | CCLK_LP_CRD2 | CCLK_LP_CRD3));
- }
- enable_controller(false);
- mutex_unlock(&sd_mtx);
-}
-#endif
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 2cd9145567..83ccb55f79 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -52,29 +52,6 @@ struct mutex cpufreq_mtx;
#define default_interrupt(name) \
extern __attribute__((weak,alias("UIRQ"))) void name (void)
-#ifdef CONFIG_POWER_SAVING
-/* Powersave functions either manipulate the system directly
- or pass enabled flag on to these specific functions
- dis/enabling powersaving for the selected subsystem
-*/
-#if (CONFIG_POWER_SAVING & POWERSV_CPU)
-/*cpu_set_powersave*/
-#include "settings.h"
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_DISP)
-/*disp_set_powersave*/
-void ams_ssp_set_low_speed(bool slow); /*lcd-clip-plus.c & lcd-clipzip.c*/
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_DISK)
-/*disk_set_powersave*/
-void ams_sd_set_low_speed(bool slow); /* sd-as3525.c & sd-as3525v2.c */
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_I2C)
-/*i2c_set_powersave*/
-void ams_i2c_set_low_speed(bool slow); /* ascodec-as3525.c*/
-#endif
-#endif /*CONFIG_POWER_SAVING*/
-
#if CONFIG_USBOTG != USBOTG_DESIGNWARE
static void UIRQ (void) __attribute__((interrupt ("IRQ")));
#endif
@@ -445,39 +422,6 @@ void udelay(unsigned usecs)
);
}
-#ifdef CONFIG_POWER_SAVING
-#if (CONFIG_POWER_SAVING & POWERSV_CPU)
-void cpu_set_powersave(bool enabled)
-{
- /*global_settings.cpu_powersave*/
- /*handled in: set_cpu_frequency()*/
- (void) enabled;
-}
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_DISK)
-void disk_set_powersave(bool enabled)
-{
- /*global_settings.disk_powersave*/
- ams_sd_set_low_speed(enabled);
-}
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_DISP)
-void disp_set_powersave(bool enabled)
-{
- /*global_settings.disp_powersave*/
- ams_ssp_set_low_speed(enabled);
-}
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_I2C)
-void i2c_set_powersave(bool enabled)
-{
- /*global_settings.i2c_powersave*/
- ams_i2c_set_low_speed(enabled);
-}
-#endif
-#endif /*defined(CONFIG_POWER_SAVING)*/
-
-
#ifndef BOOTLOADER
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
bool set_cpu_frequency__lock(void)
@@ -537,12 +481,7 @@ void set_cpu_frequency(long frequency)
CGU_PROC = ((0xf << 4) | (0x3 << 2) | AS3525_CLK_MAIN);
#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE
- /* Decreasing frequency so reduce voltage after change */
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_CPU)
- if (!global_settings.cpu_powersave)
- ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_15));
- else
-#endif
+ /* Decreasing frequency so reduce voltage after change */
ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10));
#endif /* HAVE_ADJUSTABLE_CPU_VOLTAGE */
@@ -580,13 +519,6 @@ void set_cpu_frequency(long frequency)
/* Set CVDD1 power supply */
#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE
-#if defined(CONFIG_POWER_SAVING) && (CONFIG_POWER_SAVING & POWERSV_CPU)
- if (!global_settings.cpu_powersave)
- {
- ascodec_write_pmu(0x17, 1, 0x80 | 26);
- return;
- }
-#endif
#if defined(SANSA_CLIPZIP)
ascodec_write_pmu(0x17, 1, 0x80 | 20);
#elif defined(SANSA_CLIPPLUS)
diff --git a/firmware/target/arm/as3525/system-target.h b/firmware/target/arm/as3525/system-target.h
index 9c5b5a9cd6..5cdc573a1b 100644
--- a/firmware/target/arm/as3525/system-target.h
+++ b/firmware/target/arm/as3525/system-target.h
@@ -73,26 +73,6 @@ static inline void mdelay(unsigned msecs)
void usb_insert_int(void);
void usb_remove_int(void);
-
-#ifdef CONFIG_POWER_SAVING
-/* Powersave functions either manipulate the system directly
- or pass enabled flag on to the devices specific function
- dis/enabling powersaving for the selected subsystem
-*/
-#if (CONFIG_POWER_SAVING & POWERSV_CPU)
-void cpu_set_powersave(bool enabled);
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_DISP)
-void disp_set_powersave(bool enabled);
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_DISK)
-void disk_set_powersave(bool enabled);
-#endif
-#if (CONFIG_POWER_SAVING & POWERSV_I2C)
-void i2c_set_powersave(bool enabled);
-#endif
-#endif /*CONFIG_POWER_SAVING*/
-
#ifdef HAVE_ADJUSTABLE_CPU_FREQ
#define CPU_BOOST_LOCK_DEFINED