diff options
Diffstat (limited to 'utils/imxtools/regtools/desc/regs-stmp3700.xml')
| -rw-r--r-- | utils/imxtools/regtools/desc/regs-stmp3700.xml | 9472 |
1 files changed, 9472 insertions, 0 deletions
diff --git a/utils/imxtools/regtools/desc/regs-stmp3700.xml b/utils/imxtools/regtools/desc/regs-stmp3700.xml new file mode 100644 index 0000000000..0bd55ffb95 --- /dev/null +++ b/utils/imxtools/regtools/desc/regs-stmp3700.xml @@ -0,0 +1,9472 @@ +<?xml version="1.0"?> +<!-- + __________ __ ___. + Open \______ \ ____ ____ | | _\_ |__ _______ ___ + Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + \/ \/ \/ \/ \/ +Copyright (C) 2012 by Amaury Pouly + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; either version 2 +of the License, or (at your option) any later version. + +This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +KIND, either express or implied. +--> +<soc name="stmp3700" desc="STMP3700"> +<dev name="APBH" addr="0x80004000" long_name="APHB DMA" desc="AHB-to-APBH Bridge with DMA"> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="RESET_CHANNEL" bitrange="23:16"> +<value name="SSP1" value="0x1"> +</value> +<value name="SSP2" value="0x2"> +</value> +<value name="LCDIF" value="0x4"> +</value> +<value name="ATA" value="0x10"> +</value> +<value name="NAND0" value="0x10"> +</value> +<value name="NAND1" value="0x20"> +</value> +<value name="NAND2" value="0x40"> +</value> +<value name="NAND3" value="0x80"> +</value> +</field> +<field name="CLKGATE_CHANNEL" bitrange="15:8"> +<value name="SSP1" value="0x1"> +</value> +<value name="SSP2" value="0x2"> +</value> +<value name="LCDIF" value="0x4"> +</value> +<value name="ATA" value="0x10"> +</value> +<value name="NAND0" value="0x10"> +</value> +<value name="NAND1" value="0x20"> +</value> +<value name="NAND2" value="0x40"> +</value> +<value name="NAND3" value="0x80"> +</value> +</field> +<field name="FREEZE_CHANNEL" bitrange="7:0"> +<value name="SSP1" value="0x1"> +</value> +<value name="SSP2" value="0x2"> +</value> +<value name="LCDIF" value="0x4"> +</value> +<value name="ATA" value="0x10"> +</value> +<value name="NAND0" value="0x10"> +</value> +<value name="NAND1" value="0x20"> +</value> +<value name="NAND2" value="0x30"> +</value> +<value name="NAND3" value="0x40"> +</value> +</field> +</reg> +<reg name="CTRL1" addr="0x10" sct="yes"> +<field name="CH7_AHB_ERROR_IRQ" bitrange="23:23"> +</field> +<field name="CH6_AHB_ERROR_IRQ" bitrange="22:22"> +</field> +<field name="CH5_AHB_ERROR_IRQ" bitrange="21:21"> +</field> +<field name="CH4_AHB_ERROR_IRQ" bitrange="20:20"> +</field> +<field name="CH3_AHB_ERROR_IRQ" bitrange="19:19"> +</field> +<field name="CH2_AHB_ERROR_IRQ" bitrange="18:18"> +</field> +<field name="CH1_AHB_ERROR_IRQ" bitrange="17:17"> +</field> +<field name="CH0_AHB_ERROR_IRQ" bitrange="16:16"> +</field> +<field name="CH7_CMDCMPLT_IRQ_EN" bitrange="15:15"> +</field> +<field name="CH6_CMDCMPLT_IRQ_EN" bitrange="14:14"> +</field> +<field name="CH5_CMDCMPLT_IRQ_EN" bitrange="13:13"> +</field> +<field name="CH4_CMDCMPLT_IRQ_EN" bitrange="12:12"> +</field> +<field name="CH3_CMDCMPLT_IRQ_EN" bitrange="11:11"> +</field> +<field name="CH2_CMDCMPLT_IRQ_EN" bitrange="10:10"> +</field> +<field name="CH1_CMDCMPLT_IRQ_EN" bitrange="9:9"> +</field> +<field name="CH0_CMDCMPLT_IRQ_EN" bitrange="8:8"> +</field> +<field name="CH7_CMDCMPLT_IRQ" bitrange="7:7"> +</field> +<field name="CH6_CMDCMPLT_IRQ" bitrange="6:6"> +</field> +<field name="CH5_CMDCMPLT_IRQ" bitrange="5:5"> +</field> +<field name="CH4_CMDCMPLT_IRQ" bitrange="4:4"> +</field> +<field name="CH3_CMDCMPLT_IRQ" bitrange="3:3"> +</field> +<field name="CH2_CMDCMPLT_IRQ" bitrange="2:2"> +</field> +<field name="CH1_CMDCMPLT_IRQ" bitrange="1:1"> +</field> +<field name="CH0_CMDCMPLT_IRQ" bitrange="0:0"> +</field> +</reg> +<reg name="DEVSEL" addr="0x20" sct="no"> +<field name="CH7" bitrange="31:28"> +</field> +<field name="CH6" bitrange="27:24"> +</field> +<field name="CH5" bitrange="23:20"> +</field> +<field name="CH4" bitrange="19:16"> +</field> +<field name="CH3" bitrange="15:12"> +</field> +<field name="CH2" bitrange="11:8"> +</field> +<field name="CH1" bitrange="7:4"> +</field> +<field name="CH0" bitrange="3:0"> +</field> +</reg> +<multireg name="CHn_CURCMDAR" base="0x40" count="7" offset="0x70" sct=""> +<reg name="CH0_CURCMDAR" addr="0x40" index="0"> +</reg> +<reg name="CH1_CURCMDAR" addr="0xb0" index="1"> +</reg> +<reg name="CH2_CURCMDAR" addr="0x120" index="2"> +</reg> +<reg name="CH3_CURCMDAR" addr="0x190" index="3"> +</reg> +<reg name="CH4_CURCMDAR" addr="0x200" index="4"> +</reg> +<reg name="CH5_CURCMDAR" addr="0x270" index="5"> +</reg> +<reg name="CH6_CURCMDAR" addr="0x2e0" index="6"> +</reg> +<reg name="CH7_CURCMDAR" addr="0x350" index="7"> +</reg> +<field name="CMD_ADDR" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHn_NXTCMDAR" base="0x50" count="7" offset="0x70" sct=""> +<reg name="CH0_NXTCMDAR" addr="0x50" index="0"> +</reg> +<reg name="CH1_NXTCMDAR" addr="0xc0" index="1"> +</reg> +<reg name="CH2_NXTCMDAR" addr="0x130" index="2"> +</reg> +<reg name="CH3_NXTCMDAR" addr="0x1a0" index="3"> +</reg> +<reg name="CH4_NXTCMDAR" addr="0x210" index="4"> +</reg> +<reg name="CH5_NXTCMDAR" addr="0x280" index="5"> +</reg> +<reg name="CH6_NXTCMDAR" addr="0x2f0" index="6"> +</reg> +<reg name="CH7_NXTCMDAR" addr="0x360" index="7"> +</reg> +<field name="CMD_ADDR" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHn_CMD" base="0x60" count="7" offset="0x70" sct=""> +<reg name="CH0_CMD" addr="0x60" index="0"> +</reg> +<reg name="CH1_CMD" addr="0xd0" index="1"> +</reg> +<reg name="CH2_CMD" addr="0x140" index="2"> +</reg> +<reg name="CH3_CMD" addr="0x1b0" index="3"> +</reg> +<reg name="CH4_CMD" addr="0x220" index="4"> +</reg> +<reg name="CH5_CMD" addr="0x290" index="5"> +</reg> +<reg name="CH6_CMD" addr="0x300" index="6"> +</reg> +<reg name="CH7_CMD" addr="0x370" index="7"> +</reg> +<field name="XFER_COUNT" bitrange="31:16"> +</field> +<field name="CMDWORDS" bitrange="15:12"> +</field> +<field name="HALTONTERMINATE" bitrange="8:8"> +</field> +<field name="WAIT4ENDCMD" bitrange="7:7"> +</field> +<field name="SEMAPHORE" bitrange="6:6"> +</field> +<field name="NANDWAIT4READY" bitrange="5:5"> +</field> +<field name="NANDLOCK" bitrange="4:4"> +</field> +<field name="IRQONCMPLT" bitrange="3:3"> +</field> +<field name="CHAIN" bitrange="2:2"> +</field> +<field name="COMMAND" bitrange="1:0"> +<value name="NO_DMA_XFER" value="0x0"> +</value> +<value name="DMA_WRITE" value="0x1"> +</value> +<value name="DMA_READ" value="0x2"> +</value> +<value name="DMA_SENSE" value="0x3"> +</value> +</field> +</multireg> +<multireg name="CHn_BAR" base="0x70" count="7" offset="0x70" sct=""> +<reg name="CH0_BAR" addr="0x70" index="0"> +</reg> +<reg name="CH1_BAR" addr="0xe0" index="1"> +</reg> +<reg name="CH2_BAR" addr="0x150" index="2"> +</reg> +<reg name="CH3_BAR" addr="0x1c0" index="3"> +</reg> +<reg name="CH4_BAR" addr="0x230" index="4"> +</reg> +<reg name="CH5_BAR" addr="0x2a0" index="5"> +</reg> +<reg name="CH6_BAR" addr="0x310" index="6"> +</reg> +<reg name="CH7_BAR" addr="0x380" index="7"> +</reg> +<field name="ADDRESS" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHn_SEMA" base="0x80" count="7" offset="0x70" sct=""> +<reg name="CH0_SEMA" addr="0x80" index="0"> +</reg> +<reg name="CH1_SEMA" addr="0xf0" index="1"> +</reg> +<reg name="CH2_SEMA" addr="0x160" index="2"> +</reg> +<reg name="CH3_SEMA" addr="0x1d0" index="3"> +</reg> +<reg name="CH4_SEMA" addr="0x240" index="4"> +</reg> +<reg name="CH5_SEMA" addr="0x2b0" index="5"> +</reg> +<reg name="CH6_SEMA" addr="0x320" index="6"> +</reg> +<reg name="CH7_SEMA" addr="0x390" index="7"> +</reg> +<field name="PHORE" bitrange="23:16"> +</field> +<field name="INCREMENT_SEMA" bitrange="7:0"> +</field> +</multireg> +<multireg name="CHn_DEBUG1" base="0x90" count="7" offset="0x70" sct=""> +<reg name="CH0_DEBUG1" addr="0x90" index="0"> +</reg> +<reg name="CH1_DEBUG1" addr="0x100" index="1"> +</reg> +<reg name="CH2_DEBUG1" addr="0x170" index="2"> +</reg> +<reg name="CH3_DEBUG1" addr="0x1e0" index="3"> +</reg> +<reg name="CH4_DEBUG1" addr="0x250" index="4"> +</reg> +<reg name="CH5_DEBUG1" addr="0x2c0" index="5"> +</reg> +<reg name="CH6_DEBUG1" addr="0x330" index="6"> +</reg> +<reg name="CH7_DEBUG1" addr="0x3a0" index="7"> +</reg> +<field name="REQ" bitrange="31:31"> +</field> +<field name="BURST" bitrange="30:30"> +</field> +<field name="KICK" bitrange="29:29"> +</field> +<field name="END" bitrange="28:28"> +</field> +<field name="NEXTCMDADDRVALID" bitrange="24:24"> +</field> +<field name="RD_FIFO_EMPTY" bitrange="23:23"> +</field> +<field name="RD_FIFO_FULL" bitrange="22:22"> +</field> +<field name="WR_FIFO_EMPTY" bitrange="21:21"> +</field> +<field name="WR_FIFO_FULL" bitrange="20:20"> +</field> +<field name="STATEMACHINE" bitrange="4:0"> +<value name="IDLE" value="0x0"> +</value> +<value name="REQ_CMD1" value="0x1"> +</value> +<value name="REQ_CMD3" value="0x2"> +</value> +<value name="REQ_CMD2" value="0x3"> +</value> +<value name="XFER_DECODE" value="0x4"> +</value> +<value name="REQ_WAIT" value="0x5"> +</value> +<value name="REQ_CMD4" value="0x6"> +</value> +<value name="PIO_REQ" value="0x7"> +</value> +<value name="READ_FLUSH" value="0x8"> +</value> +<value name="READ_WAIT" value="0x9"> +</value> +<value name="WRITE" value="0xc"> +</value> +<value name="READ_REQ" value="0xd"> +</value> +<value name="CHECK_CHAIN" value="0xe"> +</value> +<value name="XFER_COMPLETE" value="0xf"> +</value> +<value name="WAIT_END" value="0x15"> +</value> +<value name="WRITE_WAIT" value="0x1c"> +</value> +<value name="CHECK_WAIT" value="0x1e"> +</value> +</field> +</multireg> +<multireg name="CHn_DEBUG2" base="0xa0" count="7" offset="0x70" sct=""> +<reg name="CH0_DEBUG2" addr="0xa0" index="0"> +</reg> +<reg name="CH1_DEBUG2" addr="0x110" index="1"> +</reg> +<reg name="CH2_DEBUG2" addr="0x180" index="2"> +</reg> +<reg name="CH3_DEBUG2" addr="0x1f0" index="3"> +</reg> +<reg name="CH4_DEBUG2" addr="0x260" index="4"> +</reg> +<reg name="CH5_DEBUG2" addr="0x2d0" index="5"> +</reg> +<reg name="CH6_DEBUG2" addr="0x340" index="6"> +</reg> +<reg name="CH7_DEBUG2" addr="0x3b0" index="7"> +</reg> +<field name="APB_BYTES" bitrange="31:16"> +</field> +<field name="AHB_BYTES" bitrange="15:0"> +</field> +</multireg> +<reg name="VERSION" addr="0x3f0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="APBX" addr="0x80024000" long_name="APHX DMA" desc="AHB-to-APBX Bridge with DMA"> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="RESET_CHANNEL" bitrange="23:16"> +<value name="AUDIOIN" value="0x1"> +</value> +<value name="AUDIOOUT" value="0x2"> +</value> +<value name="SPDIF_TX" value="0x4"> +</value> +<value name="SAIF2" value="0x4"> +</value> +<value name="I2C" value="0x8"> +</value> +<value name="SAIF1" value="0x10"> +</value> +<value name="DRI" value="0x20"> +</value> +<value name="UART_RX" value="0x40"> +</value> +<value name="IRDA_RX" value="0x40"> +</value> +<value name="UART_TX" value="0x80"> +</value> +<value name="IRDA_TX" value="0x80"> +</value> +</field> +<field name="FREEZE_CHANNEL" bitrange="7:0"> +<value name="AUDIOIN" value="0x1"> +</value> +<value name="AUDIOOUT" value="0x2"> +</value> +<value name="SPDIF_TX" value="0x4"> +</value> +<value name="SAIF2" value="0x4"> +</value> +<value name="I2C" value="0x8"> +</value> +<value name="SAIF1" value="0x10"> +</value> +<value name="DRI" value="0x20"> +</value> +<value name="UART_RX" value="0x40"> +</value> +<value name="IRDA_RX" value="0x40"> +</value> +<value name="UART_TX" value="0x80"> +</value> +<value name="IRDA_TX" value="0x80"> +</value> +</field> +</reg> +<reg name="CTRL1" addr="0x10" sct="yes"> +<field name="CH7_AHB_ERROR_IRQ" bitrange="23:23"> +</field> +<field name="CH6_AHB_ERROR_IRQ" bitrange="22:22"> +</field> +<field name="CH5_AHB_ERROR_IRQ" bitrange="21:21"> +</field> +<field name="CH4_AHB_ERROR_IRQ" bitrange="20:20"> +</field> +<field name="CH3_AHB_ERROR_IRQ" bitrange="19:19"> +</field> +<field name="CH2_AHB_ERROR_IRQ" bitrange="18:18"> +</field> +<field name="CH1_AHB_ERROR_IRQ" bitrange="17:17"> +</field> +<field name="CH0_AHB_ERROR_IRQ" bitrange="16:16"> +</field> +<field name="CH7_CMDCMPLT_IRQ_EN" bitrange="15:15"> +</field> +<field name="CH6_CMDCMPLT_IRQ_EN" bitrange="14:14"> +</field> +<field name="CH5_CMDCMPLT_IRQ_EN" bitrange="13:13"> +</field> +<field name="CH4_CMDCMPLT_IRQ_EN" bitrange="12:12"> +</field> +<field name="CH3_CMDCMPLT_IRQ_EN" bitrange="11:11"> +</field> +<field name="CH2_CMDCMPLT_IRQ_EN" bitrange="10:10"> +</field> +<field name="CH1_CMDCMPLT_IRQ_EN" bitrange="9:9"> +</field> +<field name="CH0_CMDCMPLT_IRQ_EN" bitrange="8:8"> +</field> +<field name="CH7_CMDCMPLT_IRQ" bitrange="7:7"> +</field> +<field name="CH6_CMDCMPLT_IRQ" bitrange="6:6"> +</field> +<field name="CH5_CMDCMPLT_IRQ" bitrange="5:5"> +</field> +<field name="CH4_CMDCMPLT_IRQ" bitrange="4:4"> +</field> +<field name="CH3_CMDCMPLT_IRQ" bitrange="3:3"> +</field> +<field name="CH2_CMDCMPLT_IRQ" bitrange="2:2"> +</field> +<field name="CH1_CMDCMPLT_IRQ" bitrange="1:1"> +</field> +<field name="CH0_CMDCMPLT_IRQ" bitrange="0:0"> +</field> +</reg> +<reg name="DEVSEL" addr="0x20" sct="no"> +<field name="CH7" bitrange="31:28"> +<value name="USE_UART" value="0x0"> +</value> +<value name="USE_IRDA" value="0x1"> +</value> +</field> +<field name="CH6" bitrange="27:24"> +<value name="USE_UART" value="0x0"> +</value> +<value name="USE_IRDA" value="0x1"> +</value> +</field> +<field name="CH5" bitrange="23:20"> +</field> +<field name="CH4" bitrange="19:16"> +</field> +<field name="CH3" bitrange="15:12"> +</field> +<field name="CH2" bitrange="11:8"> +<value name="USE_SPDIF" value="0x0"> +</value> +<value name="USE_SAIF2" value="0x1"> +</value> +</field> +<field name="CH1" bitrange="7:4"> +</field> +<field name="CH0" bitrange="3:0"> +</field> +</reg> +<multireg name="CHn_CURCMDAR" base="0x40" count="7" offset="0x70" sct=""> +<reg name="CH0_CURCMDAR" addr="0x40" index="0"> +</reg> +<reg name="CH1_CURCMDAR" addr="0xb0" index="1"> +</reg> +<reg name="CH2_CURCMDAR" addr="0x120" index="2"> +</reg> +<reg name="CH3_CURCMDAR" addr="0x190" index="3"> +</reg> +<reg name="CH4_CURCMDAR" addr="0x200" index="4"> +</reg> +<reg name="CH5_CURCMDAR" addr="0x270" index="5"> +</reg> +<reg name="CH6_CURCMDAR" addr="0x2e0" index="6"> +</reg> +<reg name="CH7_CURCMDAR" addr="0x350" index="7"> +</reg> +<field name="CMD_ADDR" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHn_NXTCMDAR" base="0x50" count="7" offset="0x70" sct=""> +<reg name="CH0_NXTCMDAR" addr="0x50" index="0"> +</reg> +<reg name="CH1_NXTCMDAR" addr="0xc0" index="1"> +</reg> +<reg name="CH2_NXTCMDAR" addr="0x130" index="2"> +</reg> +<reg name="CH3_NXTCMDAR" addr="0x1a0" index="3"> +</reg> +<reg name="CH4_NXTCMDAR" addr="0x210" index="4"> +</reg> +<reg name="CH5_NXTCMDAR" addr="0x280" index="5"> +</reg> +<reg name="CH6_NXTCMDAR" addr="0x2f0" index="6"> +</reg> +<reg name="CH7_NXTCMDAR" addr="0x360" index="7"> +</reg> +<field name="CMD_ADDR" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHn_CMD" base="0x60" count="7" offset="0x70" sct=""> +<reg name="CH0_CMD" addr="0x60" index="0"> +</reg> +<reg name="CH1_CMD" addr="0xd0" index="1"> +</reg> +<reg name="CH2_CMD" addr="0x140" index="2"> +</reg> +<reg name="CH3_CMD" addr="0x1b0" index="3"> +</reg> +<reg name="CH4_CMD" addr="0x220" index="4"> +</reg> +<reg name="CH5_CMD" addr="0x290" index="5"> +</reg> +<reg name="CH6_CMD" addr="0x300" index="6"> +</reg> +<reg name="CH7_CMD" addr="0x370" index="7"> +</reg> +<field name="XFER_COUNT" bitrange="31:16"> +</field> +<field name="CMDWORDS" bitrange="15:12"> +</field> +<field name="WAIT4ENDCMD" bitrange="7:7"> +</field> +<field name="SEMAPHORE" bitrange="6:6"> +</field> +<field name="IRQONCMPLT" bitrange="3:3"> +</field> +<field name="CHAIN" bitrange="2:2"> +</field> +<field name="COMMAND" bitrange="1:0"> +<value name="NO_DMA_XFER" value="0x0"> +</value> +<value name="DMA_WRITE" value="0x1"> +</value> +<value name="DMA_READ" value="0x2"> +</value> +</field> +</multireg> +<multireg name="CHn_BAR" base="0x70" count="7" offset="0x70" sct=""> +<reg name="CH0_BAR" addr="0x70" index="0"> +</reg> +<reg name="CH1_BAR" addr="0xe0" index="1"> +</reg> +<reg name="CH2_BAR" addr="0x150" index="2"> +</reg> +<reg name="CH3_BAR" addr="0x1c0" index="3"> +</reg> +<reg name="CH4_BAR" addr="0x230" index="4"> +</reg> +<reg name="CH5_BAR" addr="0x2a0" index="5"> +</reg> +<reg name="CH6_BAR" addr="0x310" index="6"> +</reg> +<reg name="CH7_BAR" addr="0x380" index="7"> +</reg> +<field name="ADDRESS" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHn_SEMA" base="0x80" count="7" offset="0x70" sct=""> +<reg name="CH0_SEMA" addr="0x80" index="0"> +</reg> +<reg name="CH1_SEMA" addr="0xf0" index="1"> +</reg> +<reg name="CH2_SEMA" addr="0x160" index="2"> +</reg> +<reg name="CH3_SEMA" addr="0x1d0" index="3"> +</reg> +<reg name="CH4_SEMA" addr="0x240" index="4"> +</reg> +<reg name="CH5_SEMA" addr="0x2b0" index="5"> +</reg> +<reg name="CH6_SEMA" addr="0x320" index="6"> +</reg> +<reg name="CH7_SEMA" addr="0x390" index="7"> +</reg> +<field name="PHORE" bitrange="23:16"> +</field> +<field name="INCREMENT_SEMA" bitrange="7:0"> +</field> +</multireg> +<multireg name="CHn_DEBUG1" base="0x90" count="7" offset="0x70" sct=""> +<reg name="CH0_DEBUG1" addr="0x90" index="0"> +</reg> +<reg name="CH1_DEBUG1" addr="0x100" index="1"> +</reg> +<reg name="CH2_DEBUG1" addr="0x170" index="2"> +</reg> +<reg name="CH3_DEBUG1" addr="0x1e0" index="3"> +</reg> +<reg name="CH4_DEBUG1" addr="0x250" index="4"> +</reg> +<reg name="CH5_DEBUG1" addr="0x2c0" index="5"> +</reg> +<reg name="CH6_DEBUG1" addr="0x330" index="6"> +</reg> +<reg name="CH7_DEBUG1" addr="0x3a0" index="7"> +</reg> +<field name="REQ" bitrange="31:31"> +</field> +<field name="BURST" bitrange="30:30"> +</field> +<field name="KICK" bitrange="29:29"> +</field> +<field name="END" bitrange="28:28"> +</field> +<field name="NEXTCMDADDRVALID" bitrange="24:24"> +</field> +<field name="RD_FIFO_EMPTY" bitrange="23:23"> +</field> +<field name="RD_FIFO_FULL" bitrange="22:22"> +</field> +<field name="WR_FIFO_EMPTY" bitrange="21:21"> +</field> +<field name="WR_FIFO_FULL" bitrange="20:20"> +</field> +<field name="STATEMACHINE" bitrange="4:0"> +<value name="IDLE" value="0x0"> +</value> +<value name="REQ_CMD1" value="0x1"> +</value> +<value name="REQ_CMD3" value="0x2"> +</value> +<value name="REQ_CMD2" value="0x3"> +</value> +<value name="XFER_DECODE" value="0x4"> +</value> +<value name="REQ_WAIT" value="0x5"> +</value> +<value name="REQ_CMD4" value="0x6"> +</value> +<value name="PIO_REQ" value="0x7"> +</value> +<value name="READ_FLUSH" value="0x8"> +</value> +<value name="READ_WAIT" value="0x9"> +</value> +<value name="WRITE" value="0xc"> +</value> +<value name="READ_REQ" value="0xd"> +</value> +<value name="CHECK_CHAIN" value="0xe"> +</value> +<value name="XFER_COMPLETE" value="0xf"> +</value> +<value name="WAIT_END" value="0x15"> +</value> +<value name="WRITE_WAIT" value="0x1c"> +</value> +<value name="CHECK_WAIT" value="0x1e"> +</value> +</field> +</multireg> +<multireg name="CHn_DEBUG2" base="0xa0" count="7" offset="0x70" sct=""> +<reg name="CH0_DEBUG2" addr="0xa0" index="0"> +</reg> +<reg name="CH1_DEBUG2" addr="0x110" index="1"> +</reg> +<reg name="CH2_DEBUG2" addr="0x180" index="2"> +</reg> +<reg name="CH3_DEBUG2" addr="0x1f0" index="3"> +</reg> +<reg name="CH4_DEBUG2" addr="0x260" index="4"> +</reg> +<reg name="CH5_DEBUG2" addr="0x2d0" index="5"> +</reg> +<reg name="CH6_DEBUG2" addr="0x340" index="6"> +</reg> +<reg name="CH7_DEBUG2" addr="0x3b0" index="7"> +</reg> +<field name="APB_BYTES" bitrange="31:16"> +</field> +<field name="AHB_BYTES" bitrange="15:0"> +</field> +</multireg> +<reg name="VERSION" addr="0x3f0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="AUDIOIN" addr="0x8004c000" long_name="AUDIOIN/ADC" desc="Digital Audio Filter Input"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="DMAWAIT_COUNT" bitrange="20:16"> +</field> +<field name="LR_SWAP" bitrange="10:10"> +</field> +<field name="EDGE_SYNC" bitrange="9:9"> +</field> +<field name="INVERT_1BIT" bitrange="8:8"> +</field> +<field name="OFFSET_ENABLE" bitrange="7:7"> +</field> +<field name="HPF_ENABLE" bitrange="6:6"> +</field> +<field name="WORD_LENGTH" bitrange="5:5"> +</field> +<field name="LOOPBACK" bitrange="4:4"> +</field> +<field name="FIFO_UNDERFLOW_IRQ" bitrange="3:3"> +</field> +<field name="FIFO_OVERFLOW_IRQ" bitrange="2:2"> +</field> +<field name="FIFO_ERROR_IRQ_EN" bitrange="1:1"> +</field> +<field name="RUN" bitrange="0:0"> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="no"> +<field name="ADC_PRESENT" bitrange="31:31"> +</field> +</reg> +<reg name="ADCSRR" addr="0x20" sct="yes"> +<field name="OSR" bitrange="31:31"> +<value name="OSR6" value="0x0"> +</value> +<value name="OSR12" value="0x1"> +</value> +</field> +<field name="BASEMULT" bitrange="30:28"> +<value name="SINGLE_RATE" value="0x1"> +</value> +<value name="DOUBLE_RATE" value="0x2"> +</value> +<value name="QUAD_RATE" value="0x4"> +</value> +</field> +<field name="SRC_HOLD" bitrange="26:24"> +</field> +<field name="SRC_INT" bitrange="20:16"> +</field> +<field name="SRC_FRAC" bitrange="12:0"> +</field> +</reg> +<reg name="ADCVOLUME" addr="0x30" sct="yes"> +<field name="VOLUME_UPDATE_LEFT" bitrange="28:28"> +</field> +<field name="EN_ZCD" bitrange="25:25"> +</field> +<field name="VOLUME_LEFT" bitrange="23:16"> +</field> +<field name="VOLUME_UPDATE_RIGHT" bitrange="12:12"> +</field> +<field name="VOLUME_RIGHT" bitrange="7:0"> +</field> +</reg> +<reg name="ADCDEBUG" addr="0x40" sct="yes"> +<field name="ENABLE_ADCDMA" bitrange="31:31"> +</field> +<field name="ADC_DMA_REQ_HAND_SHAKE_CLK_CROSS" bitrange="3:3"> +</field> +<field name="SET_INTERRUPT3_HAND_SHAKE" bitrange="2:2"> +</field> +<field name="DMA_PREQ" bitrange="1:1"> +</field> +<field name="FIFO_STATUS" bitrange="0:0"> +</field> +</reg> +<reg name="ADCVOL" addr="0x50" sct="yes"> +<field name="VOLUME_UPDATE_PENDING" bitrange="28:28"> +</field> +<field name="EN_ADC_ZCD" bitrange="25:25"> +</field> +<field name="MUTE" bitrange="24:24"> +</field> +<field name="SELECT_LEFT" bitrange="13:12"> +</field> +<field name="GAIN_LEFT" bitrange="11:8"> +</field> +<field name="SELECT_RIGHT" bitrange="5:4"> +</field> +<field name="GAIN_RIGHT" bitrange="3:0"> +</field> +</reg> +<reg name="MICLINE" addr="0x60" sct="yes"> +<field name="DIVIDE_LINE1" bitrange="29:29"> +</field> +<field name="DIVIDE_LINE2" bitrange="28:28"> +</field> +<field name="MIC_SELECT" bitrange="24:24"> +</field> +<field name="MIC_RESISTOR" bitrange="21:20"> +</field> +<field name="MIC_BIAS" bitrange="18:16"> +</field> +<field name="MIC_CHOPCLK" bitrange="5:4"> +</field> +<field name="MIC_GAIN" bitrange="1:0"> +</field> +</reg> +<reg name="ANACLKCTRL" addr="0x70" sct="yes"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="DITHER_OFF" bitrange="6:6"> +</field> +<field name="SLOW_DITHER" bitrange="5:5"> +</field> +<field name="INVERT_ADCCLK" bitrange="4:4"> +</field> +<field name="ADCDIV" bitrange="2:0"> +</field> +</reg> +<reg name="DATA" addr="0x80" sct="no"> +<field name="HIGH" bitrange="31:16"> +</field> +<field name="LOW" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="AUDIOOUT" addr="0x80048000" long_name="AUDIOOUT/DAC" desc="Digital Audio Filter Output"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="DMAWAIT_COUNT" bitrange="20:16"> +</field> +<field name="LR_SWAP" bitrange="14:14"> +</field> +<field name="EDGE_SYNC" bitrange="13:13"> +</field> +<field name="INVERT_1BIT" bitrange="12:12"> +</field> +<field name="SS3D_EFFECT" bitrange="9:8"> +</field> +<field name="WORD_LENGTH" bitrange="6:6"> +</field> +<field name="DAC_ZERO_ENABLE" bitrange="5:5"> +</field> +<field name="LOOPBACK" bitrange="4:4"> +</field> +<field name="FIFO_UNDERFLOW_IRQ" bitrange="3:3"> +</field> +<field name="FIFO_OVERFLOW_IRQ" bitrange="2:2"> +</field> +<field name="FIFO_ERROR_IRQ_EN" bitrange="1:1"> +</field> +<field name="RUN" bitrange="0:0"> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="no"> +<field name="DAC_PRESENT" bitrange="31:31"> +</field> +</reg> +<reg name="DACSRR" addr="0x20" sct="yes"> +<field name="OSR" bitrange="31:31"> +<value name="OSR6" value="0x0"> +</value> +<value name="OSR12" value="0x1"> +</value> +</field> +<field name="BASEMULT" bitrange="30:28"> +<value name="SINGLE_RATE" value="0x1"> +</value> +<value name="DOUBLE_RATE" value="0x2"> +</value> +<value name="QUAD_RATE" value="0x4"> +</value> +</field> +<field name="SRC_HOLD" bitrange="26:24"> +</field> +<field name="SRC_INT" bitrange="20:16"> +</field> +<field name="SRC_FRAC" bitrange="12:0"> +</field> +</reg> +<reg name="DACVOLUME" addr="0x30" sct="yes"> +<field name="VOLUME_UPDATE_LEFT" bitrange="28:28"> +</field> +<field name="EN_ZCD" bitrange="25:25"> +</field> +<field name="MUTE_LEFT" bitrange="24:24"> +</field> +<field name="VOLUME_LEFT" bitrange="23:16"> +</field> +<field name="VOLUME_UPDATE_RIGHT" bitrange="12:12"> +</field> +<field name="MUTE_RIGHT" bitrange="8:8"> +</field> +<field name="VOLUME_RIGHT" bitrange="7:0"> +</field> +</reg> +<reg name="DACDEBUG" addr="0x40" sct="yes"> +<field name="ENABLE_DACDMA" bitrange="31:31"> +</field> +<field name="RAM_SS" bitrange="11:8"> +</field> +<field name="SET_INTERRUPT1_CLK_CROSS" bitrange="5:5"> +</field> +<field name="SET_INTERRUPT0_CLK_CROSS" bitrange="4:4"> +</field> +<field name="SET_INTERRUPT1_HAND_SHAKE" bitrange="3:3"> +</field> +<field name="SET_INTERRUPT0_HAND_SHAKE" bitrange="2:2"> +</field> +<field name="DMA_PREQ" bitrange="1:1"> +</field> +<field name="FIFO_STATUS" bitrange="0:0"> +</field> +</reg> +<reg name="HPVOL" addr="0x50" sct="yes"> +<field name="VOLUME_UPDATE_PENDING" bitrange="28:28"> +</field> +<field name="EN_MSTR_ZCD" bitrange="25:25"> +</field> +<field name="MUTE" bitrange="24:24"> +</field> +<field name="SELECT" bitrange="16:16"> +</field> +<field name="VOL_LEFT" bitrange="14:8"> +</field> +<field name="VOL_RIGHT" bitrange="6:0"> +</field> +</reg> +<reg name="RESERVED" addr="0x60" sct="no"> +</reg> +<reg name="PWRDN" addr="0x70" sct="yes"> +<field name="LINEOUT" bitrange="24:24"> +</field> +<field name="SELFBIAS" bitrange="20:20"> +</field> +<field name="RIGHT_ADC" bitrange="16:16"> +</field> +<field name="DAC" bitrange="12:12"> +</field> +<field name="ADC" bitrange="8:8"> +</field> +<field name="CAPLESS" bitrange="4:4"> +</field> +<field name="HEADPHONE" bitrange="0:0"> +</field> +</reg> +<reg name="REFCTRL" addr="0x80" sct="yes"> +<field name="FASTSETTLING" bitrange="26:26"> +</field> +<field name="RAISE_REF" bitrange="25:25"> +</field> +<field name="XTAL_BGR_BIAS" bitrange="24:24"> +</field> +<field name="VBG_ADJ" bitrange="22:20"> +</field> +<field name="LOW_PWR" bitrange="19:19"> +</field> +<field name="LW_REF" bitrange="18:18"> +</field> +<field name="BIAS_CTRL" bitrange="17:16"> +</field> +<field name="VDDXTAL_TO_VDDD" bitrange="14:14"> +</field> +<field name="ADJ_ADC" bitrange="13:13"> +</field> +<field name="ADJ_VAG" bitrange="12:12"> +</field> +<field name="ADC_REFVAL" bitrange="11:8"> +</field> +<field name="VAG_VAL" bitrange="7:4"> +</field> +<field name="DAC_ADJ" bitrange="2:0"> +</field> +</reg> +<reg name="ANACTRL" addr="0x90" sct="yes"> +<field name="SHORT_CM_STS" bitrange="28:28"> +</field> +<field name="SHORT_LR_STS" bitrange="24:24"> +</field> +<field name="SHORTMODE_CM" bitrange="21:20"> +</field> +<field name="SHORTMODE_LR" bitrange="18:17"> +</field> +<field name="SHORT_LVLADJL" bitrange="14:12"> +</field> +<field name="SHORT_LVLADJR" bitrange="10:8"> +</field> +<field name="HP_HOLD_GND" bitrange="5:5"> +</field> +<field name="HP_CLASSAB" bitrange="4:4"> +</field> +</reg> +<reg name="TEST" addr="0xa0" sct="yes"> +<field name="HP_ANTIPOP" bitrange="30:28"> +</field> +<field name="TM_ADCIN_TOHP" bitrange="26:26"> +</field> +<field name="TM_LINEOUT" bitrange="25:25"> +</field> +<field name="TM_HPCOMMON" bitrange="24:24"> +</field> +<field name="HP_I1_ADJ" bitrange="23:22"> +</field> +<field name="HP_IALL_ADJ" bitrange="21:20"> +</field> +<field name="VAG_CLASSA" bitrange="13:13"> +</field> +<field name="VAG_DOUBLE_I" bitrange="12:12"> +</field> +<field name="DAC_CLASSA" bitrange="2:2"> +</field> +<field name="DAC_DOUBLE_I" bitrange="1:1"> +</field> +<field name="DAC_DIS_RTZ" bitrange="0:0"> +</field> +</reg> +<reg name="BISTCTRL" addr="0xb0" sct="yes"> +<field name="FAIL" bitrange="3:3"> +</field> +<field name="PASS" bitrange="2:2"> +</field> +<field name="DONE" bitrange="1:1"> +</field> +<field name="START" bitrange="0:0"> +</field> +</reg> +<reg name="BISTSTAT0" addr="0xc0" sct="no"> +<field name="DATA" bitrange="23:0"> +</field> +</reg> +<reg name="BISTSTAT1" addr="0xd0" sct="no"> +<field name="STATE" bitrange="28:24"> +</field> +<field name="ADDR" bitrange="7:0"> +</field> +</reg> +<reg name="ANACLKCTRL" addr="0xe0" sct="yes"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="INVERT_DACCLK" bitrange="4:4"> +</field> +<field name="DACDIV" bitrange="2:0"> +</field> +</reg> +<reg name="DATA" addr="0xf0" sct="yes"> +<field name="HIGH" bitrange="31:16"> +</field> +<field name="LOW" bitrange="15:0"> +</field> +</reg> +<reg name="LINEOUTCTRL" addr="0x100" sct="yes"> +<field name="VOLUME_UPDATE_PENDING" bitrange="28:28"> +</field> +<field name="EN_LINEOUT_ZCD" bitrange="25:25"> +</field> +<field name="MUTE" bitrange="24:24"> +</field> +<field name="VAG_CTRL" bitrange="23:20"> +</field> +<field name="OUT_CURRENT" bitrange="19:16"> +</field> +<field name="CHARGE_CAP" bitrange="15:13"> +</field> +<field name="VOLUME_LEFT" bitrange="12:8"> +</field> +<field name="VOLUME_RIGHT" bitrange="4:0"> +</field> +</reg> +<reg name="VERSION" addr="0x200" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="CLKCTRL" addr="0x80040000" long_name="Clock Controller" desc="Clock Generation and Control"> +<reg name="PLLCTRL0" addr="0x0" sct="yes"> +<field name="LFR_SEL" bitrange="29:28"> +<value name="DEFAULT" value="0x0"> +</value> +<value name="TIMES_2" value="0x1"> +</value> +<value name="TIMES_05" value="0x2"> +</value> +<value name="UNDEFINED" value="0x3"> +</value> +</field> +<field name="CP_SEL" bitrange="25:24"> +<value name="DEFAULT" value="0x0"> +</value> +<value name="TIMES_2" value="0x1"> +</value> +<value name="TIMES_05" value="0x2"> +</value> +<value name="UNDEFINED" value="0x3"> +</value> +</field> +<field name="DIV_SEL" bitrange="21:20"> +<value name="DEFAULT" value="0x0"> +</value> +<value name="LOWER" value="0x1"> +</value> +<value name="LOWEST" value="0x2"> +</value> +<value name="UNDEFINED" value="0x3"> +</value> +</field> +<field name="EN_USB_CLKS" bitrange="18:18"> +</field> +<field name="POWER" bitrange="16:16"> +</field> +</reg> +<reg name="PLLCTRL1" addr="0x10" sct="no"> +<field name="LOCK" bitrange="31:31"> +</field> +<field name="FORCE_LOCK" bitrange="30:30"> +</field> +<field name="LOCK_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="CPU" addr="0x20" sct="yes"> +<field name="BUSY_REF_XTAL" bitrange="29:29"> +</field> +<field name="BUSY_REF_CPU" bitrange="28:28"> +</field> +<field name="DIV_XTAL_FRAC_EN" bitrange="26:26"> +</field> +<field name="DIV_XTAL" bitrange="25:16"> +</field> +<field name="INTERRUPT_WAIT" bitrange="12:12"> +</field> +<field name="DIV_CPU_FRAC_EN" bitrange="10:10"> +</field> +<field name="DIV_CPU" bitrange="9:0"> +</field> +</reg> +<reg name="HBUS" addr="0x30" sct="yes"> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="APBHDMA_AS_ENABLE" bitrange="26:26"> +</field> +<field name="APBXDMA_AS_ENABLE" bitrange="25:25"> +</field> +<field name="TRAFFIC_JAM_AS_ENABLE" bitrange="24:24"> +</field> +<field name="TRAFFIC_AS_ENABLE" bitrange="23:23"> +</field> +<field name="CPU_DATA_AS_ENABLE" bitrange="22:22"> +</field> +<field name="CPU_INSTR_AS_ENABLE" bitrange="21:21"> +</field> +<field name="AUTO_SLOW_MODE" bitrange="20:20"> +</field> +<field name="SLOW_DIV" bitrange="18:16"> +<value name="BY1" value="0x0"> +</value> +<value name="BY2" value="0x1"> +</value> +<value name="BY4" value="0x2"> +</value> +<value name="BY8" value="0x3"> +</value> +<value name="BY16" value="0x4"> +</value> +<value name="BY32" value="0x5"> +</value> +</field> +<field name="DIV_FRAC_EN" bitrange="5:5"> +</field> +<field name="DIV" bitrange="4:0"> +</field> +</reg> +<reg name="XBUS" addr="0x40" sct="no"> +<field name="BUSY" bitrange="31:31"> +</field> +<field name="DIV_FRAC_EN" bitrange="10:10"> +</field> +<field name="DIV" bitrange="9:0"> +</field> +</reg> +<reg name="XTAL" addr="0x50" sct="yes"> +<field name="UART_CLK_GATE" bitrange="31:31"> +</field> +<field name="FILT_CLK24M_GATE" bitrange="30:30"> +</field> +<field name="PWM_CLK24M_GATE" bitrange="29:29"> +</field> +<field name="DRI_CLK24M_GATE" bitrange="28:28"> +</field> +<field name="DIGCTRL_CLK1M_GATE" bitrange="27:27"> +</field> +<field name="TIMROT_CLK32K_GATE" bitrange="26:26"> +</field> +<field name="DIV_UART" bitrange="1:0"> +</field> +</reg> +<reg name="PIX" addr="0x60" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="DIV_FRAC_EN" bitrange="15:15"> +</field> +<field name="DIV" bitrange="14:0"> +</field> +</reg> +<reg name="SSP" addr="0x70" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="DIV_FRAC_EN" bitrange="9:9"> +</field> +<field name="DIV" bitrange="8:0"> +</field> +</reg> +<reg name="GPMI" addr="0x80" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="DIV_FRAC_EN" bitrange="10:10"> +</field> +<field name="DIV" bitrange="9:0"> +</field> +</reg> +<reg name="SPDIF" addr="0x90" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +</reg> +<reg name="EMI" addr="0xa0" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="BUSY_REF_XTAL" bitrange="29:29"> +</field> +<field name="BUSY_REF_EMI" bitrange="28:28"> +</field> +<field name="BUSY_DCC_RESYNC" bitrange="17:17"> +</field> +<field name="DCC_RESYNC_ENABLE" bitrange="16:16"> +</field> +<field name="DIV_XTAL" bitrange="11:8"> +</field> +<field name="DIV_EMI" bitrange="5:0"> +</field> +</reg> +<reg name="IR" addr="0xb0" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="AUTO_DIV" bitrange="29:29"> +</field> +<field name="IR_BUSY" bitrange="28:28"> +</field> +<field name="IROV_BUSY" bitrange="27:27"> +</field> +<field name="IROV_DIV" bitrange="24:16"> +</field> +<field name="IR_DIV" bitrange="9:0"> +</field> +</reg> +<reg name="SAIF" addr="0xc0" sct="no"> +<field name="CLKGATE" bitrange="31:31"> +</field> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="DIV_FRAC_EN" bitrange="16:16"> +</field> +<field name="DIV" bitrange="15:0"> +</field> +</reg> +<reg name="FRAC" addr="0xd0" sct="yes"> +<field name="CLKGATEIO" bitrange="31:31"> +</field> +<field name="IO_STABLE" bitrange="30:30"> +</field> +<field name="IOFRAC" bitrange="29:24"> +</field> +<field name="CLKGATEPIX" bitrange="23:23"> +</field> +<field name="PIX_STABLE" bitrange="22:22"> +</field> +<field name="PIXFRAC" bitrange="21:16"> +</field> +<field name="CLKGATEEMI" bitrange="15:15"> +</field> +<field name="EMI_STABLE" bitrange="14:14"> +</field> +<field name="EMIFRAC" bitrange="13:8"> +</field> +<field name="CLKGATECPU" bitrange="7:7"> +</field> +<field name="CPU_STABLE" bitrange="6:6"> +</field> +<field name="CPUFRAC" bitrange="5:0"> +</field> +</reg> +<reg name="CLKSEQ" addr="0xe0" sct="yes"> +<field name="BYPASS_CPU" bitrange="7:7"> +</field> +<field name="BYPASS_EMI" bitrange="6:6"> +</field> +<field name="BYPASS_SSP" bitrange="5:5"> +</field> +<field name="BYPASS_GPMI" bitrange="4:4"> +</field> +<field name="BYPASS_IR" bitrange="3:3"> +</field> +<field name="BYPASS_PIX" bitrange="1:1"> +</field> +<field name="BYPASS_SAIF" bitrange="0:0"> +</field> +</reg> +<reg name="RESET" addr="0xf0" sct="no"> +<field name="CHIP" bitrange="1:1"> +</field> +<field name="DIG" bitrange="0:0"> +</field> +</reg> +<reg name="VERSION" addr="0x100" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="DCP" addr="0x80028000" long_name="Data CoProcessor" desc="Data Co-Processor (DCP)"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="PRESENT_CRYPTO" bitrange="29:29"> +<value name="Present" value="0x1"> +</value> +<value name="Absent" value="0x0"> +</value> +</field> +<field name="PRESENT_CSC" bitrange="28:28"> +<value name="Present" value="0x1"> +</value> +<value name="Absent" value="0x0"> +</value> +</field> +<field name="GATHER_RESIDUAL_WRITES" bitrange="23:23"> +</field> +<field name="ENABLE_CONTEXT_CACHING" bitrange="22:22"> +</field> +<field name="ENABLE_CONTEXT_SWITCHING" bitrange="21:21"> +</field> +<field name="CSC_INTERRUPT_ENABLE" bitrange="8:8"> +</field> +<field name="CHANNEL_INTERRUPT_ENABLE" bitrange="7:0"> +<value name="CH0" value="0x1"> +</value> +<value name="CH1" value="0x2"> +</value> +<value name="CH2" value="0x4"> +</value> +<value name="CH3" value="0x8"> +</value> +<value name="Other" value="Reserved"> +</value> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="yes"> +<field name="OTP_KEY_READY" bitrange="28:28"> +</field> +<field name="CUR_CHANNEL" bitrange="27:24"> +<value name="None" value="0x0"> +</value> +<value name="CH0" value="0x1"> +</value> +<value name="CH1" value="0x2"> +</value> +<value name="CH2" value="0x3"> +</value> +<value name="CH3" value="0x4"> +</value> +<value name="CSC" value="0x8"> +</value> +<value name="Other" value="Reserved"> +</value> +</field> +<field name="READY_CHANNELS" bitrange="23:16"> +<value name="CH0" value="0x1"> +</value> +<value name="CH1" value="0x2"> +</value> +<value name="CH2" value="0x4"> +</value> +<value name="CH3" value="0x8"> +</value> +<value name="Other" value="Reserved"> +</value> +</field> +<field name="CSCIRQ" bitrange="8:8"> +</field> +<field name="IRQ" bitrange="3:0"> +</field> +</reg> +<reg name="CHANNELCTRL" addr="0x20" sct="yes"> +<field name="CSC_PRIORITY" bitrange="18:17"> +<value name="HIGH" value="0x3"> +</value> +<value name="MED" value="0x2"> +</value> +<value name="LOW" value="0x1"> +</value> +<value name="BACKGROUND" value="0x0"> +</value> +</field> +<field name="CH0_IRQ_MERGED" bitrange="16:16"> +</field> +<field name="HIGH_PRIORITY_CHANNEL" bitrange="15:8"> +<value name="CH0" value="0x1"> +</value> +<value name="CH1" value="0x2"> +</value> +<value name="CH2" value="0x4"> +</value> +<value name="CH3" value="0x8"> +</value> +<value name="Other" value="Reserved"> +</value> +</field> +<field name="ENABLE_CHANNEL" bitrange="7:0"> +<value name="CH0" value="0x1"> +</value> +<value name="CH1" value="0x2"> +</value> +<value name="CH2" value="0x4"> +</value> +<value name="CH3" value="0x8"> +</value> +<value name="Other" value="Reserved"> +</value> +</field> +</reg> +<reg name="CAPABILITY0" addr="0x30" sct="no"> +<field name="NUM_CHANNELS" bitrange="11:8"> +</field> +<field name="NUM_KEYS" bitrange="7:0"> +</field> +</reg> +<reg name="CAPABILITY1" addr="0x40" sct="no"> +<field name="HASH_ALGORITHMS" bitrange="31:16"> +<value name="SHA1" value="0x1"> +</value> +<value name="CRC32" value="0x2"> +</value> +</field> +<field name="CIPHER_ALGORITHMS" bitrange="15:0"> +<value name="AES128" value="0x1"> +</value> +</field> +</reg> +<reg name="CONTEXT" addr="0x50" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="KEY" addr="0x60" sct="no"> +<field name="INDEX" bitrange="5:4"> +</field> +<field name="SUBWORD" bitrange="1:0"> +</field> +</reg> +<reg name="KEYDATA" addr="0x70" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="PACKET0" addr="0x80" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="PACKET1" addr="0x90" sct="no"> +<field name="TAG" bitrange="31:24"> +</field> +<field name="OUTPUT_WORDSWAP" bitrange="23:23"> +</field> +<field name="OUTPUT_BYTESWAP" bitrange="22:22"> +</field> +<field name="INPUT_WORDSWAP" bitrange="21:21"> +</field> +<field name="INPUT_BYTESWAP" bitrange="20:20"> +</field> +<field name="KEY_WORDSWAP" bitrange="19:19"> +</field> +<field name="KEY_BYTESWAP" bitrange="18:18"> +</field> +<field name="TEST_SEMA_IRQ" bitrange="17:17"> +</field> +<field name="CONSTANT_FILL" bitrange="16:16"> +</field> +<field name="HASH_OUTPUT" bitrange="15:15"> +<value name="INPUT" value="0x0"> +</value> +<value name="OUTPUT" value="0x1"> +</value> +</field> +<field name="CHECK_HASH" bitrange="14:14"> +</field> +<field name="HASH_TERM" bitrange="13:13"> +</field> +<field name="HASH_INIT" bitrange="12:12"> +</field> +<field name="PAYLOAD_KEY" bitrange="11:11"> +</field> +<field name="OTP_KEY" bitrange="10:10"> +</field> +<field name="CIPHER_INIT" bitrange="9:9"> +</field> +<field name="CIPHER_ENCRYPT" bitrange="8:8"> +<value name="ENCRYPT" value="0x1"> +</value> +<value name="DECRYPT" value="0x0"> +</value> +</field> +<field name="ENABLE_BLIT" bitrange="7:7"> +</field> +<field name="ENABLE_HASH" bitrange="6:6"> +</field> +<field name="ENABLE_CIPHER" bitrange="5:5"> +</field> +<field name="ENABLE_MEMCOPY" bitrange="4:4"> +</field> +<field name="CHAIN_CONTIGUOUS" bitrange="3:3"> +</field> +<field name="CHAIN" bitrange="2:2"> +</field> +<field name="DECR_SEMAPHORE" bitrange="1:1"> +</field> +<field name="INTERRUPT" bitrange="0:0"> +</field> +</reg> +<reg name="PACKET2" addr="0xa0" sct="no"> +<field name="CIPHER_CFG" bitrange="31:24"> +</field> +<field name="HASH_SELECT" bitrange="19:16"> +<value name="SHA1" value="0x0"> +</value> +<value name="CRC32" value="0x1"> +</value> +</field> +<field name="KEY_SELECT" bitrange="15:8"> +</field> +<field name="CIPHER_MODE" bitrange="7:4"> +<value name="ECB" value="0x0"> +</value> +<value name="CCB" value="0x1"> +</value> +</field> +<field name="CIPHER_SELECT" bitrange="3:0"> +<value name="AES128" value="0x0"> +</value> +</field> +</reg> +<reg name="PACKET3" addr="0xb0" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="PACKET4" addr="0xc0" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="PACKET5" addr="0xd0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="PACKET6" addr="0xe0" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<multireg name="CHnCMDPTR" base="0x100" count="3" offset="0x40" sct=""> +<reg name="CH0CMDPTR" addr="0x100" index="0"> +</reg> +<reg name="CH1CMDPTR" addr="0x140" index="1"> +</reg> +<reg name="CH2CMDPTR" addr="0x180" index="2"> +</reg> +<reg name="CH3CMDPTR" addr="0x1c0" index="3"> +</reg> +<field name="ADDR" bitrange="31:0"> +</field> +</multireg> +<multireg name="CHnSEMA" base="0x110" count="3" offset="0x40" sct=""> +<reg name="CH0SEMA" addr="0x110" index="0"> +</reg> +<reg name="CH1SEMA" addr="0x150" index="1"> +</reg> +<reg name="CH2SEMA" addr="0x190" index="2"> +</reg> +<reg name="CH3SEMA" addr="0x1d0" index="3"> +</reg> +<field name="VALUE" bitrange="23:16"> +</field> +<field name="INCREMENT" bitrange="7:0"> +</field> +</multireg> +<multireg name="CHnSTAT" base="0x120" count="3" offset="0x40" sct="SCT"> +<reg name="CH0STAT" addr="0x120" index="0"> +</reg> +<reg name="CH1STAT" addr="0x160" index="1"> +</reg> +<reg name="CH2STAT" addr="0x1a0" index="2"> +</reg> +<reg name="CH3STAT" addr="0x1e0" index="3"> +</reg> +<field name="TAG" bitrange="31:24"> +</field> +<field name="ERROR_CODE" bitrange="23:16"> +<value name="NEXT_CHAIN_IS_0" value="0x1"> +</value> +<value name="NO_CHAIN" value="0x2"> +</value> +<value name="CONTEXT_ERROR" value="0x3"> +</value> +<value name="PAYLOAD_ERROR" value="0x4"> +</value> +<value name="INVALID_MODE" value="0x5"> +</value> +</field> +<field name="ERROR_DST" bitrange="5:5"> +</field> +<field name="ERROR_SRC" bitrange="4:4"> +</field> +<field name="ERROR_PACKET" bitrange="3:3"> +</field> +<field name="ERROR_SETUP" bitrange="2:2"> +</field> +<field name="HASH_MISMATCH" bitrange="1:1"> +</field> +</multireg> +<multireg name="CHnOPTS" base="0x130" count="3" offset="0x40" sct="SCT"> +<reg name="CH0OPTS" addr="0x130" index="0"> +</reg> +<reg name="CH1OPTS" addr="0x170" index="1"> +</reg> +<reg name="CH2OPTS" addr="0x1b0" index="2"> +</reg> +<reg name="CH3OPTS" addr="0x1f0" index="3"> +</reg> +<field name="RECOVERY_TIMER" bitrange="15:0"> +</field> +</multireg> +<reg name="CSCCTRL0" addr="0x300" sct="yes"> +<field name="UPSAMPLE" bitrange="14:14"> +</field> +<field name="SCALE" bitrange="13:13"> +</field> +<field name="ROTATE" bitrange="12:12"> +</field> +<field name="SUBSAMPLE" bitrange="11:11"> +</field> +<field name="DELTA" bitrange="10:10"> +</field> +<field name="RGB_FORMAT" bitrange="9:8"> +<value name="RGB16_565" value="0x0"> +</value> +<value name="RGB24" value="0x2"> +</value> +<value name="YUV422I" value="0x3"> +</value> +</field> +<field name="YUV_FORMAT" bitrange="7:4"> +<value name="YUV420" value="0x0"> +</value> +<value name="YUV422" value="0x2"> +</value> +</field> +<field name="ENABLE" bitrange="0:0"> +</field> +</reg> +<reg name="CSCSTAT" addr="0x310" sct="yes"> +<field name="ERROR_CODE" bitrange="23:16"> +<value name="LUMA0_FETCH_ERROR_Y0" value="0x1"> +</value> +<value name="LUMA1_FETCH_ERROR_Y1" value="0x2"> +</value> +<value name="CHROMA_FETCH_ERROR_U" value="0x3"> +</value> +<value name="CHROMA_FETCH_ERROR_V" value="0x4"> +</value> +</field> +<field name="ERROR_DST" bitrange="5:5"> +</field> +<field name="ERROR_SRC" bitrange="4:4"> +</field> +<field name="ERROR_SETUP" bitrange="2:2"> +</field> +<field name="COMPLETE" bitrange="0:0"> +</field> +</reg> +<reg name="CSCOUTBUFPARAM" addr="0x320" sct="no"> +<field name="FIELD_SIZE" bitrange="23:12"> +</field> +<field name="LINE_SIZE" bitrange="11:0"> +</field> +</reg> +<reg name="CSCINBUFPARAM" addr="0x330" sct="no"> +<field name="LINE_SIZE" bitrange="11:0"> +</field> +</reg> +<reg name="CSCRGB" addr="0x340" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="CSCLUMA" addr="0x350" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="CSCCHROMAU" addr="0x360" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="CSCCHROMAV" addr="0x370" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="CSCCOEFF0" addr="0x380" sct="no"> +<field name="C0" bitrange="25:16"> +</field> +<field name="UV_OFFSET" bitrange="15:8"> +</field> +<field name="Y_OFFSET" bitrange="7:0"> +</field> +</reg> +<reg name="CSCCOEFF1" addr="0x390" sct="no"> +<field name="C1" bitrange="25:16"> +</field> +<field name="C4" bitrange="9:0"> +</field> +</reg> +<reg name="CSCCOEFF2" addr="0x3a0" sct="no"> +<field name="C2" bitrange="25:16"> +</field> +<field name="C3" bitrange="9:0"> +</field> +</reg> +<reg name="CSCXSCALE" addr="0x3e0" sct="no"> +<field name="INT" bitrange="25:24"> +</field> +<field name="FRAC" bitrange="23:12"> +</field> +<field name="WIDTH" bitrange="11:0"> +</field> +</reg> +<reg name="CSCYSCALE" addr="0x3f0" sct="no"> +<field name="INT" bitrange="25:24"> +</field> +<field name="FRAC" bitrange="23:12"> +</field> +<field name="HEIGHT" bitrange="11:0"> +</field> +</reg> +<reg name="DBGSELECT" addr="0x400" sct="no"> +<field name="INDEX" bitrange="7:0"> +<value name="CONTROL" value="0x1"> +</value> +<value name="OTPKEY0" value="0x10"> +</value> +<value name="OTPKEY1" value="0x11"> +</value> +<value name="OTPKEY2" value="0x12"> +</value> +<value name="OTPKEY3" value="0x13"> +</value> +<value name="Other" value="Reserved"> +</value> +</field> +</reg> +<reg name="DBGDATA" addr="0x410" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="VERSION" addr="0x420" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="DIGCTL" addr="0x8001c000" long_name="Digital Control" desc="Digital Control and On-Chip RAM"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="TRAP_IRQ" bitrange="29:29"> +</field> +<field name="DCP_BIST_CLKEN" bitrange="23:23"> +</field> +<field name="DCP_BIST_START" bitrange="22:22"> +</field> +<field name="ARM_BIST_CLKEN" bitrange="21:21"> +</field> +<field name="USB_TESTMODE" bitrange="20:20"> +</field> +<field name="ANALOG_TESTMODE" bitrange="19:19"> +</field> +<field name="DIGITAL_TESTMODE" bitrange="18:18"> +</field> +<field name="ARM_BIST_START" bitrange="17:17"> +</field> +<field name="UART_LOOPBACK" bitrange="16:16"> +<value name="NORMAL" value="0x0"> +</value> +<value name="LOOPIT" value="0x1"> +</value> +</field> +<field name="SAIF_LOOPBACK" bitrange="15:15"> +<value name="NORMAL" value="0x0"> +</value> +<value name="LOOPIT" value="0x1"> +</value> +</field> +<field name="SAIF_CLKMUX_SEL" bitrange="14:13"> +<value name="MBL_CLK_OUT" value="0x0"> +</value> +<value name="BL_CLK_OUT" value="0x1"> +</value> +<value name="M_CLK_OUT_BL_CLK_IN" value="0x2"> +</value> +<value name="BL_CLK_IN" value="0x3"> +</value> +</field> +<field name="SAIF_CLKMST_SEL" bitrange="12:12"> +<value name="SAIF1_MST" value="0x0"> +</value> +<value name="SAIF2_MST" value="0x1"> +</value> +</field> +<field name="SAIF_ALT_BITCLK_SEL" bitrange="11:11"> +</field> +<field name="USE_SERIAL_JTAG" bitrange="6:6"> +<value name="OLD_JTAG" value="0x0"> +</value> +<value name="SERIAL_JTAG" value="0x1"> +</value> +</field> +<field name="TRAP_IN_RANGE" bitrange="5:5"> +</field> +<field name="TRAP_ENABLE" bitrange="4:4"> +</field> +<field name="DEBUG_DISABLE" bitrange="3:3"> +</field> +<field name="USB_CLKGATE" bitrange="2:2"> +<value name="RUN" value="0x0"> +</value> +<value name="NO_CLKS" value="0x1"> +</value> +</field> +<field name="JTAG_SHIELD" bitrange="1:1"> +<value name="NORMAL" value="0x0"> +</value> +<value name="SHIELDS_UP" value="0x1"> +</value> +</field> +<field name="LATCH_ENTROPY" bitrange="0:0"> +</field> +</reg> +<reg name="STATUS" addr="0x10" sct="no"> +<field name="USB_HS_PRESENT" bitrange="31:31"> +</field> +<field name="USB_OTG_PRESENT" bitrange="30:30"> +</field> +<field name="USB_HOST_PRESENT" bitrange="29:29"> +</field> +<field name="USB_DEVICE_PRESENT" bitrange="28:28"> +</field> +<field name="DCP_BIST_FAIL" bitrange="10:10"> +</field> +<field name="DCP_BIST_PASS" bitrange="9:9"> +</field> +<field name="DCP_BIST_DONE" bitrange="8:8"> +</field> +<field name="JTAG_IN_USE" bitrange="4:4"> +</field> +<field name="PACKAGE_TYPE" bitrange="3:1"> +</field> +<field name="WRITTEN" bitrange="0:0"> +</field> +</reg> +<reg name="HCLKCOUNT" addr="0x20" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="RAMCTRL" addr="0x30" sct="yes"> +<field name="SPEED_SELECT" bitrange="11:8"> +</field> +<field name="RAM_REPAIR_EN" bitrange="0:0"> +</field> +</reg> +<reg name="RAMREPAIR" addr="0x40" sct="yes"> +<field name="ADDR" bitrange="15:0"> +</field> +</reg> +<reg name="ROMCTRL" addr="0x50" sct="yes"> +<field name="RD_MARGIN" bitrange="3:0"> +</field> +</reg> +<reg name="WRITEONCE" addr="0x60" sct="no"> +<field name="BITS" bitrange="31:0"> +</field> +</reg> +<reg name="ENTROPY" addr="0x90" sct="no"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="ENTROPY_LATCHED" addr="0xa0" sct="no"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="SJTAGDBG" addr="0xb0" sct="yes"> +<field name="SJTAG_STATE" bitrange="26:16"> +</field> +<field name="SJTAG_TDO" bitrange="10:10"> +</field> +<field name="SJTAG_TDI" bitrange="9:9"> +</field> +<field name="SJTAG_MODE" bitrange="8:8"> +</field> +<field name="DELAYED_ACTIVE" bitrange="7:4"> +</field> +<field name="ACTIVE" bitrange="3:3"> +</field> +<field name="SJTAG_PIN_STATE" bitrange="2:2"> +</field> +<field name="SJTAG_DEBUG_DATA" bitrange="1:1"> +</field> +<field name="SJTAG_DEBUG_OE" bitrange="0:0"> +</field> +</reg> +<reg name="MICROSECONDS" addr="0xc0" sct="yes"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="DBGRD" addr="0xd0" sct="no"> +<field name="COMPLEMENT" bitrange="31:0"> +</field> +</reg> +<reg name="DBG" addr="0xe0" sct="no"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_BIST_CSR" addr="0xf0" sct="yes"> +<field name="BIST_DATA_CHANGE" bitrange="9:9"> +</field> +<field name="BIST_CLKEN" bitrange="8:8"> +</field> +<field name="FAIL" bitrange="3:3"> +</field> +<field name="PASS" bitrange="2:2"> +</field> +<field name="DONE" bitrange="1:1"> +</field> +<field name="START" bitrange="0:0"> +</field> +</reg> +<reg name="OCRAM_STATUS0" addr="0x110" sct="no"> +<field name="FAILDATA00" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS1" addr="0x120" sct="no"> +<field name="FAILDATA01" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS2" addr="0x130" sct="no"> +<field name="FAILDATA10" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS3" addr="0x140" sct="no"> +<field name="FAILDATA11" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS4" addr="0x150" sct="no"> +<field name="FAILDATA20" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS5" addr="0x160" sct="no"> +<field name="FAILDATA21" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS6" addr="0x170" sct="no"> +<field name="FAILDATA30" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS7" addr="0x180" sct="no"> +<field name="FAILDATA31" bitrange="31:0"> +</field> +</reg> +<reg name="OCRAM_STATUS8" addr="0x190" sct="no"> +<field name="FAILADDR01" bitrange="31:16"> +</field> +<field name="FAILADDR00" bitrange="15:0"> +</field> +</reg> +<reg name="OCRAM_STATUS9" addr="0x1a0" sct="no"> +<field name="FAILADDR11" bitrange="31:16"> +</field> +<field name="FAILADDR10" bitrange="15:0"> +</field> +</reg> +<reg name="OCRAM_STATUS10" addr="0x1b0" sct="no"> +<field name="FAILADDR21" bitrange="31:16"> +</field> +<field name="FAILADDR20" bitrange="15:0"> +</field> +</reg> +<reg name="OCRAM_STATUS11" addr="0x1c0" sct="no"> +<field name="FAILADDR31" bitrange="31:16"> +</field> +<field name="FAILADDR30" bitrange="15:0"> +</field> +</reg> +<reg name="OCRAM_STATUS12" addr="0x1d0" sct="no"> +<field name="FAILSTATE11" bitrange="28:24"> +</field> +<field name="FAILSTATE10" bitrange="20:16"> +</field> +<field name="FAILSTATE01" bitrange="12:8"> +</field> +<field name="FAILSTATE00" bitrange="4:0"> +</field> +</reg> +<reg name="OCRAM_STATUS13" addr="0x1e0" sct="no"> +<field name="FAILSTATE31" bitrange="28:24"> +</field> +<field name="FAILSTATE30" bitrange="20:16"> +</field> +<field name="FAILSTATE21" bitrange="12:8"> +</field> +<field name="FAILSTATE20" bitrange="4:0"> +</field> +</reg> +<reg name="SCRATCH0" addr="0x290" sct="no"> +<field name="PTR" bitrange="31:0"> +</field> +</reg> +<reg name="SCRATCH1" addr="0x2a0" sct="no"> +<field name="PTR" bitrange="31:0"> +</field> +</reg> +<reg name="ARMCACHE" addr="0x2b0" sct="no"> +<field name="CACHE_SS" bitrange="9:8"> +</field> +<field name="DTAG_SS" bitrange="5:4"> +</field> +<field name="ITAG_SS" bitrange="1:0"> +</field> +</reg> +<reg name="DEBUG_TRAP_ADDR_LOW" addr="0x2c0" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="DEBUG_TRAP_ADDR_HIGH" addr="0x2d0" sct="no"> +<field name="ADDR" bitrange="31:0"> +</field> +</reg> +<reg name="SGTL" addr="0x300" sct="no"> +<field name="COPYRIGHT" bitrange="31:0"> +</field> +</reg> +<reg name="CHIPID" addr="0x310" sct="no"> +<field name="PRODUCT_CODE" bitrange="31:16"> +</field> +<field name="REVISION" bitrange="7:0"> +</field> +</reg> +<reg name="AHB_STATS_SELECT" addr="0x330" sct="no"> +<field name="L3_MASTER_SELECT" bitrange="27:24"> +<value name="APBH" value="0x1"> +</value> +<value name="APBX" value="0x2"> +</value> +<value name="USB" value="0x4"> +</value> +</field> +<field name="L2_MASTER_SELECT" bitrange="19:16"> +<value name="ARM_D" value="0x1"> +</value> +</field> +<field name="L1_MASTER_SELECT" bitrange="11:8"> +<value name="ARM_I" value="0x1"> +</value> +</field> +<field name="L0_MASTER_SELECT" bitrange="3:0"> +<value name="ECC8" value="0x1"> +</value> +<value name="CRYPTO" value="0x2"> +</value> +</field> +</reg> +<reg name="L0_AHB_ACTIVE_CYCLES" addr="0x340" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L0_AHB_DATA_STALLED" addr="0x350" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L0_AHB_DATA_CYCLES" addr="0x360" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L1_AHB_ACTIVE_CYCLES" addr="0x370" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L1_AHB_DATA_STALLED" addr="0x380" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L1_AHB_DATA_CYCLES" addr="0x390" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L2_AHB_ACTIVE_CYCLES" addr="0x3a0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L2_AHB_DATA_STALLED" addr="0x3b0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L2_AHB_DATA_CYCLES" addr="0x3c0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L3_AHB_ACTIVE_CYCLES" addr="0x3d0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L3_AHB_DATA_STALLED" addr="0x3e0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="L3_AHB_DATA_CYCLES" addr="0x3f0" sct="no"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<multireg name="MPTEn_LOC" base="0x400" count="15" offset="0x10" sct=""> +<reg name="MPTE0_LOC" addr="0x400" index="0"> +</reg> +<reg name="MPTE1_LOC" addr="0x410" index="1"> +</reg> +<reg name="MPTE2_LOC" addr="0x420" index="2"> +</reg> +<reg name="MPTE3_LOC" addr="0x430" index="3"> +</reg> +<reg name="MPTE4_LOC" addr="0x440" index="4"> +</reg> +<reg name="MPTE5_LOC" addr="0x450" index="5"> +</reg> +<reg name="MPTE6_LOC" addr="0x460" index="6"> +</reg> +<reg name="MPTE7_LOC" addr="0x470" index="7"> +</reg> +<reg name="MPTE8_LOC" addr="0x480" index="8"> +</reg> +<reg name="MPTE9_LOC" addr="0x490" index="9"> +</reg> +<reg name="MPTE10_LOC" addr="0x4a0" index="10"> +</reg> +<reg name="MPTE11_LOC" addr="0x4b0" index="11"> +</reg> +<reg name="MPTE12_LOC" addr="0x4c0" index="12"> +</reg> +<reg name="MPTE13_LOC" addr="0x4d0" index="13"> +</reg> +<reg name="MPTE14_LOC" addr="0x4e0" index="14"> +</reg> +<reg name="MPTE15_LOC" addr="0x4f0" index="15"> +</reg> +<field name="LOC" bitrange="11:0"> +</field> +</multireg> +<reg name="EMICLK_DELAY" addr="0x480" sct="no"> +<field name="NUM_TAPS" bitrange="4:0"> +</field> +</reg> +</dev> +<dev name="DRAM" addr="0x800e0000" long_name="DRAM Registers" desc="DRAM Registers"> +<reg name="CTL00" addr="0x0" sct="no"> +<field name="AHB0_W_PRIORITY" bitrange="24:24"> +</field> +<field name="AHB0_R_PRIORITY" bitrange="16:16"> +</field> +<field name="AHB0_FIFO_TYPE_REG" bitrange="8:8"> +</field> +<field name="ADDR_CMP_EN" bitrange="0:0"> +</field> +</reg> +<reg name="CTL01" addr="0x4" sct="no"> +<field name="AHB2_FIFO_TYPE_REG" bitrange="24:24"> +</field> +<field name="AHB1_W_PRIORITY" bitrange="16:16"> +</field> +<field name="AHB1_R_PRIORITY" bitrange="8:8"> +</field> +<field name="AHB1_FIFO_TYPE_REG" bitrange="0:0"> +</field> +</reg> +<reg name="CTL02" addr="0x8" sct="no"> +<field name="AHB3_R_PRIORITY" bitrange="24:24"> +</field> +<field name="AHB3_FIFO_TYPE_REG" bitrange="16:16"> +</field> +<field name="AHB2_W_PRIORITY" bitrange="8:8"> +</field> +<field name="AHB2_R_PRIORITY" bitrange="0:0"> +</field> +</reg> +<reg name="CTL03" addr="0xc" sct="no"> +<field name="AUTO_REFRESH_MODE" bitrange="24:24"> +</field> +<field name="AREFRESH" bitrange="16:16"> +</field> +<field name="AP" bitrange="8:8"> +</field> +<field name="AHB3_W_PRIORITY" bitrange="0:0"> +</field> +</reg> +<reg name="CTL04" addr="0x10" sct="no"> +<field name="DLL_BYPASS_MODE" bitrange="24:24"> +</field> +<field name="DLLLOCKREG" bitrange="16:16"> +</field> +<field name="CONCURRENTAP" bitrange="8:8"> +</field> +<field name="BANK_SPLIT_EN" bitrange="0:0"> +</field> +</reg> +<reg name="CTL05" addr="0x14" sct="no"> +<field name="INTRPTREADA" bitrange="24:24"> +</field> +<field name="INTRPTAPBURST" bitrange="16:16"> +</field> +<field name="FAST_WRITE" bitrange="8:8"> +</field> +<field name="EN_LOWPOWER_MODE" bitrange="0:0"> +</field> +</reg> +<reg name="CTL06" addr="0x18" sct="no"> +<field name="POWER_DOWN" bitrange="24:24"> +</field> +<field name="PLACEMENT_EN" bitrange="16:16"> +</field> +<field name="NO_CMD_INIT" bitrange="8:8"> +</field> +<field name="INTRPTWRITEA" bitrange="0:0"> +</field> +</reg> +<reg name="CTL07" addr="0x1c" sct="no"> +<field name="RW_SAME_EN" bitrange="24:24"> +</field> +<field name="REG_DIMM_ENABLE" bitrange="16:16"> +</field> +<field name="RD2RD_TURN" bitrange="8:8"> +</field> +<field name="PRIORITY_EN" bitrange="0:0"> +</field> +</reg> +<reg name="CTL08" addr="0x20" sct="no"> +<field name="TRAS_LOCKOUT" bitrange="24:24"> +</field> +<field name="START" bitrange="16:16"> +</field> +<field name="SREFRESH" bitrange="8:8"> +</field> +<field name="SDR_MODE" bitrange="0:0"> +</field> +</reg> +<reg name="CTL09" addr="0x24" sct="no"> +<field name="OUT_OF_RANGE_TYPE" bitrange="25:24"> +</field> +<field name="OUT_OF_RANGE_SOURCE_ID" bitrange="17:16"> +</field> +<field name="WRITE_MODEREG" bitrange="8:8"> +</field> +<field name="WRITEINTERP" bitrange="0:0"> +</field> +</reg> +<reg name="CTL10" addr="0x28" sct="no"> +<field name="AGE_COUNT" bitrange="26:24"> +</field> +<field name="ADDR_PINS" bitrange="18:16"> +</field> +<field name="TEMRS" bitrange="9:8"> +</field> +<field name="Q_FULLNESS" bitrange="1:0"> +</field> +</reg> +<reg name="CTL11" addr="0x2c" sct="no"> +<field name="MAX_CS_REG" bitrange="26:24"> +</field> +<field name="COMMAND_AGE_COUNT" bitrange="18:16"> +</field> +<field name="COLUMN_SIZE" bitrange="10:8"> +</field> +<field name="CASLAT" bitrange="2:0"> +</field> +</reg> +<reg name="CTL12" addr="0x30" sct="no"> +<field name="TWR_INT" bitrange="26:24"> +</field> +<field name="TRRD" bitrange="18:16"> +</field> +<field name="TCKE" bitrange="2:0"> +</field> +</reg> +<reg name="CTL13" addr="0x34" sct="no"> +<field name="CASLAT_LIN_GATE" bitrange="27:24"> +</field> +<field name="CASLAT_LIN" bitrange="19:16"> +</field> +<field name="APREBIT" bitrange="11:8"> +</field> +<field name="TWTR" bitrange="2:0"> +</field> +</reg> +<reg name="CTL14" addr="0x38" sct="no"> +<field name="MAX_COL_REG" bitrange="27:24"> +</field> +<field name="LOWPOWER_REFRESH_ENABLE" bitrange="19:16"> +</field> +<field name="INITAREF" bitrange="11:8"> +</field> +<field name="CS_MAP" bitrange="3:0"> +</field> +</reg> +<reg name="CTL15" addr="0x3c" sct="no"> +<field name="TRP" bitrange="27:24"> +</field> +<field name="TDAL" bitrange="19:16"> +</field> +<field name="PORT_BUSY" bitrange="11:8"> +</field> +<field name="MAX_ROW_REG" bitrange="3:0"> +</field> +</reg> +<reg name="CTL16" addr="0x40" sct="no"> +<field name="TMRD" bitrange="28:24"> +</field> +<field name="LOWPOWER_CONTROL" bitrange="20:16"> +</field> +<field name="LOWPOWER_AUTO_ENABLE" bitrange="12:8"> +</field> +<field name="INT_ACK" bitrange="3:0"> +</field> +</reg> +<reg name="CTL17" addr="0x44" sct="no"> +<field name="DLL_START_POINT" bitrange="31:24"> +</field> +<field name="DLL_LOCK" bitrange="23:16"> +</field> +<field name="DLL_INCREMENT" bitrange="15:8"> +</field> +<field name="TRC" bitrange="4:0"> +</field> +</reg> +<reg name="CTL18" addr="0x48" sct="no"> +<field name="DLL_DQS_DELAY_1" bitrange="30:24"> +</field> +<field name="DLL_DQS_DELAY_0" bitrange="22:16"> +</field> +<field name="INT_STATUS" bitrange="12:8"> +</field> +<field name="INT_MASK" bitrange="4:0"> +</field> +</reg> +<reg name="CTL19" addr="0x4c" sct="no"> +<field name="DQS_OUT_SHIFT_BYPASS" bitrange="31:24"> +</field> +<field name="DQS_OUT_SHIFT" bitrange="22:16"> +</field> +<field name="DLL_DQS_DELAY_BYPASS_1" bitrange="15:8"> +</field> +<field name="DLL_DQS_DELAY_BYPASS_0" bitrange="7:0"> +</field> +</reg> +<reg name="CTL20" addr="0x50" sct="no"> +<field name="TRCD_INT" bitrange="31:24"> +</field> +<field name="TRAS_MIN" bitrange="23:16"> +</field> +<field name="WR_DQS_SHIFT_BYPASS" bitrange="15:8"> +</field> +<field name="WR_DQS_SHIFT" bitrange="6:0"> +</field> +</reg> +<reg name="CTL21" addr="0x54" sct="no"> +<field name="OUT_OF_RANGE_LENGTH" bitrange="17:8"> +</field> +<field name="TRFC" bitrange="7:0"> +</field> +</reg> +<reg name="CTL22" addr="0x58" sct="no"> +<field name="AHB0_WRCNT" bitrange="26:16"> +</field> +<field name="AHB0_RDCNT" bitrange="10:0"> +</field> +</reg> +<reg name="CTL23" addr="0x5c" sct="no"> +<field name="AHB1_WRCNT" bitrange="26:16"> +</field> +<field name="AHB1_RDCNT" bitrange="10:0"> +</field> +</reg> +<reg name="CTL24" addr="0x60" sct="no"> +<field name="AHB2_WRCNT" bitrange="26:16"> +</field> +<field name="AHB2_RDCNT" bitrange="10:0"> +</field> +</reg> +<reg name="CTL25" addr="0x64" sct="no"> +<field name="AHB3_WRCNT" bitrange="26:16"> +</field> +<field name="AHB3_RDCNT" bitrange="10:0"> +</field> +</reg> +<reg name="CTL26" addr="0x68" sct="no"> +<field name="TREF" bitrange="11:0"> +</field> +</reg> +<reg name="CTL27" addr="0x6c" sct="no"> +</reg> +<reg name="CTL28" addr="0x70" sct="no"> +</reg> +<reg name="CTL29" addr="0x74" sct="no"> +<field name="LOWPOWER_INTERNAL_CNT" bitrange="31:16"> +</field> +<field name="LOWPOWER_EXTERNAL_CNT" bitrange="15:0"> +</field> +</reg> +<reg name="CTL30" addr="0x78" sct="no"> +<field name="LOWPOWER_REFRESH_HOLD" bitrange="31:16"> +</field> +<field name="LOWPOWER_POWER_DOWN_CNT" bitrange="15:0"> +</field> +</reg> +<reg name="CTL31" addr="0x7c" sct="no"> +<field name="TDLL" bitrange="31:16"> +</field> +<field name="LOWPOWER_SELF_REFRESH_CNT" bitrange="15:0"> +</field> +</reg> +<reg name="CTL32" addr="0x80" sct="no"> +<field name="TXSNR" bitrange="31:16"> +</field> +<field name="TRAS_MAX" bitrange="15:0"> +</field> +</reg> +<reg name="CTL33" addr="0x84" sct="no"> +<field name="VERSION" bitrange="31:16"> +</field> +<field name="TXSR" bitrange="15:0"> +</field> +</reg> +<reg name="CTL34" addr="0x88" sct="no"> +<field name="TINIT" bitrange="23:0"> +</field> +</reg> +<reg name="CTL35" addr="0x8c" sct="no"> +<field name="OUT_OF_RANGE_ADDR" bitrange="30:0"> +</field> +</reg> +<reg name="CTL36" addr="0x90" sct="no"> +<field name="PWRUP_SREFRESH_EXIT" bitrange="24:24"> +</field> +<field name="ENABLE_QUICK_SREFRESH" bitrange="16:16"> +</field> +<field name="BUS_SHARE_ENABLE" bitrange="8:8"> +</field> +<field name="ACTIVE_AGING" bitrange="0:0"> +</field> +</reg> +<reg name="CTL37" addr="0x94" sct="no"> +<field name="BUS_SHARE_TIMEOUT" bitrange="17:8"> +</field> +<field name="TREF_ENABLE" bitrange="0:0"> +</field> +</reg> +<reg name="CTL38" addr="0x98" sct="no"> +<field name="EMRS2_DATA_0" bitrange="28:16"> +</field> +<field name="EMRS1_DATA" bitrange="12:0"> +</field> +</reg> +<reg name="CTL39" addr="0x9c" sct="no"> +<field name="EMRS2_DATA_2" bitrange="28:16"> +</field> +<field name="EMRS2_DATA_1" bitrange="12:0"> +</field> +</reg> +<reg name="CTL40" addr="0xa0" sct="no"> +<field name="TPDEX" bitrange="31:16"> +</field> +<field name="EMRS2_DATA_3" bitrange="12:0"> +</field> +</reg> +</dev> +<dev name="DRI" addr="0x80074000" long_name="Digital Radio Interface" desc="Digital Radio Interface (DRI)"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +<value name="RUN" value="0x0"> +</value> +<value name="RESET" value="0x1"> +</value> +</field> +<field name="CLKGATE" bitrange="30:30"> +<value name="RUN" value="0x0"> +</value> +<value name="NO_CLKS" value="0x1"> +</value> +</field> +<field name="ENABLE_INPUTS" bitrange="29:29"> +<value name="ANALOG_LINE_IN" value="0x0"> +</value> +<value name="DRI_DIGITAL_IN" value="0x1"> +</value> +</field> +<field name="STOP_ON_OFLOW_ERROR" bitrange="26:26"> +<value name="IGNORE" value="0x0"> +</value> +<value name="STOP" value="0x1"> +</value> +</field> +<field name="STOP_ON_PILOT_ERROR" bitrange="25:25"> +<value name="IGNORE" value="0x0"> +</value> +<value name="STOP" value="0x1"> +</value> +</field> +<field name="DMA_DELAY_COUNT" bitrange="20:16"> +</field> +<field name="REACQUIRE_PHASE" bitrange="15:15"> +<value name="NORMAL" value="0x0"> +</value> +<value name="NEW_PHASE" value="0x1"> +</value> +</field> +<field name="OVERFLOW_IRQ_EN" bitrange="11:11"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="PILOT_SYNC_LOSS_IRQ_EN" bitrange="10:10"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="ATTENTION_IRQ_EN" bitrange="9:9"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="OVERFLOW_IRQ" bitrange="3:3"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="PILOT_SYNC_LOSS_IRQ" bitrange="2:2"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="ATTENTION_IRQ" bitrange="1:1"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="RUN" bitrange="0:0"> +<value name="HALT" value="0x0"> +</value> +<value name="RUN" value="0x1"> +</value> +</field> +</reg> +<reg name="TIMING" addr="0x10" sct="no"> +<field name="PILOT_REP_RATE" bitrange="19:16"> +</field> +<field name="GAP_DETECTION_INTERVAL" bitrange="7:0"> +</field> +</reg> +<reg name="STAT" addr="0x20" sct="no"> +<field name="DRI_PRESENT" bitrange="31:31"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="PILOT_PHASE" bitrange="19:16"> +</field> +<field name="OVERFLOW_IRQ_SUMMARY" bitrange="3:3"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="PILOT_SYNC_LOSS_IRQ_SUMMARY" bitrange="2:2"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="ATTENTION_IRQ_SUMMARY" bitrange="1:1"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +</reg> +<reg name="DATA" addr="0x30" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="DEBUG0" addr="0x40" sct="yes"> +<field name="DMAREQ" bitrange="31:31"> +</field> +<field name="DMACMDKICK" bitrange="30:30"> +</field> +<field name="DRI_CLK_INPUT" bitrange="29:29"> +</field> +<field name="DRI_DATA_INPUT" bitrange="28:28"> +</field> +<field name="TEST_MODE" bitrange="27:27"> +</field> +<field name="PILOT_REP_RATE" bitrange="26:26"> +<value name="8_AT_4MHZ" value="0x0"> +</value> +<value name="12_AT_6MHZ" value="0x1"> +</value> +</field> +<field name="SPARE" bitrange="25:18"> +</field> +<field name="FRAME" bitrange="17:0"> +</field> +</reg> +<reg name="DEBUG1" addr="0x50" sct="yes"> +<field name="INVERT_PILOT" bitrange="31:31"> +<value name="NORMAL" value="0x0"> +</value> +<value name="INVERTED" value="0x1"> +</value> +</field> +<field name="INVERT_ATTENTION" bitrange="30:30"> +<value name="NORMAL" value="0x0"> +</value> +<value name="INVERTED" value="0x1"> +</value> +</field> +<field name="INVERT_DRI_DATA" bitrange="29:29"> +<value name="NORMAL" value="0x0"> +</value> +<value name="INVERTED" value="0x1"> +</value> +</field> +<field name="INVERT_DRI_CLOCK" bitrange="28:28"> +<value name="NORMAL" value="0x0"> +</value> +<value name="INVERTED" value="0x1"> +</value> +</field> +<field name="REVERSE_FRAME" bitrange="27:27"> +<value name="NORMAL" value="0x0"> +</value> +<value name="REVERSED" value="0x1"> +</value> +</field> +<field name="SWIZZLED_FRAME" bitrange="17:0"> +</field> +</reg> +<reg name="VERSION" addr="0x60" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="ECC8" addr="0x80008000" long_name="Reed-Solomon ECC" desc="8-Symbol Correcting ECC Accelerator (ECC8)"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +<value name="RUN" value="0x0"> +</value> +<value name="RESET" value="0x1"> +</value> +</field> +<field name="CLKGATE" bitrange="30:30"> +<value name="RUN" value="0x0"> +</value> +<value name="NO_CLKS" value="0x1"> +</value> +</field> +<field name="AHBM_SFTRST" bitrange="29:29"> +<value name="RUN" value="0x0"> +</value> +<value name="RESET" value="0x1"> +</value> +</field> +<field name="THROTTLE" bitrange="27:24"> +</field> +<field name="DEBUG_STALL_IRQ_EN" bitrange="10:10"> +</field> +<field name="DEBUG_WRITE_IRQ_EN" bitrange="9:9"> +</field> +<field name="COMPLETE_IRQ_EN" bitrange="8:8"> +</field> +<field name="BM_ERROR_IRQ" bitrange="3:3"> +</field> +<field name="DEBUG_STALL_IRQ" bitrange="2:2"> +</field> +<field name="DEBUG_WRITE_IRQ" bitrange="1:1"> +</field> +<field name="COMPLETE_IRQ" bitrange="0:0"> +</field> +</reg> +<reg name="STATUS0" addr="0x10" sct="no"> +<field name="HANDLE" bitrange="31:16"> +</field> +<field name="RS8ECC_ENC_PRESENT" bitrange="15:15"> +</field> +<field name="RS8ECC_DEC_PRESENT" bitrange="14:14"> +</field> +<field name="RS4ECC_ENC_PRESENT" bitrange="13:13"> +</field> +<field name="RS4ECC_DEC_PRESENT" bitrange="12:12"> +</field> +<field name="STATUS_AUX" bitrange="11:8"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="ALLONES" bitrange="4:4"> +</field> +<field name="CORRECTED" bitrange="3:3"> +</field> +<field name="UNCORRECTABLE" bitrange="2:2"> +</field> +<field name="COMPLETED_CE" bitrange="1:0"> +</field> +</reg> +<reg name="STATUS1" addr="0x20" sct="no"> +<field name="STATUS_PAYLOAD7" bitrange="31:28"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD6" bitrange="27:24"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD5" bitrange="23:20"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD4" bitrange="19:16"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD3" bitrange="15:12"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD2" bitrange="11:8"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD1" bitrange="7:4"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +<field name="STATUS_PAYLOAD0" bitrange="3:0"> +<value name="NO_ERRORS" value="0x0"> +</value> +<value name="ONE_CORRECTABLE" value="0x1"> +</value> +<value name="TWO_CORRECTABLE" value="0x2"> +</value> +<value name="THREE_CORRECTABLE" value="0x3"> +</value> +<value name="FOUR_CORRECTABLE" value="0x4"> +</value> +<value name="FIVE_CORRECTABLE" value="0x5"> +</value> +<value name="SIX_CORRECTABLE" value="0x6"> +</value> +<value name="SEVEN_CORRECTABLE" value="0x7"> +</value> +<value name="EIGHT_CORRECTABLE" value="0x8"> +</value> +<value name="NOT_CHECKED" value="0xc"> +</value> +<value name="UNCORRECTABLE" value="0xe"> +</value> +<value name="ALL_ONES" value="0xf"> +</value> +</field> +</reg> +<reg name="DEBUG0" addr="0x30" sct="yes"> +<field name="KES_DEBUG_SYNDROME_SYMBOL" bitrange="24:16"> +<value name="NORMAL" value="0x0"> +</value> +<value name="TEST_MODE" value="0x1"> +</value> +</field> +<field name="KES_DEBUG_SHIFT_SYND" bitrange="15:15"> +</field> +<field name="KES_DEBUG_PAYLOAD_FLAG" bitrange="14:14"> +<value name="DATA" value="0x1"> +</value> +<value name="AUX" value="0x1"> +</value> +</field> +<field name="KES_DEBUG_MODE4K" bitrange="13:13"> +<value name="4k" value="0x1"> +</value> +<value name="2k" value="0x1"> +</value> +</field> +<field name="KES_DEBUG_KICK" bitrange="12:12"> +</field> +<field name="KES_STANDALONE" bitrange="11:11"> +<value name="NORMAL" value="0x0"> +</value> +<value name="TEST_MODE" value="0x1"> +</value> +</field> +<field name="KES_DEBUG_STEP" bitrange="10:10"> +</field> +<field name="KES_DEBUG_STALL" bitrange="9:9"> +<value name="NORMAL" value="0x0"> +</value> +<value name="WAIT" value="0x1"> +</value> +</field> +<field name="BM_KES_TEST_BYPASS" bitrange="8:8"> +<value name="NORMAL" value="0x0"> +</value> +<value name="TEST_MODE" value="0x1"> +</value> +</field> +<field name="DEBUG_REG_SELECT" bitrange="5:0"> +</field> +</reg> +<reg name="DBGKESREAD" addr="0x40" sct="no"> +<field name="VALUES" bitrange="31:0"> +</field> +</reg> +<reg name="DBGCSFEREAD" addr="0x50" sct="no"> +<field name="VALUES" bitrange="31:0"> +</field> +</reg> +<reg name="DBGSYNDGENREAD" addr="0x60" sct="no"> +<field name="VALUES" bitrange="31:0"> +</field> +</reg> +<reg name="DBGAHBMREAD" addr="0x70" sct="no"> +<field name="VALUES" bitrange="31:0"> +</field> +</reg> +<reg name="BLOCKNAME" addr="0x80" sct="no"> +<field name="NAME" bitrange="31:0"> +</field> +</reg> +<reg name="VERSION" addr="0xa0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="EMI" addr="0x80020000" long_name="External Memory Interface" desc="External Memory Interface (EMI)"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="MEM_WIDTH" bitrange="6:6"> +</field> +<field name="WRITE_PROTECT" bitrange="5:5"> +</field> +<field name="RESET_OUT" bitrange="4:4"> +</field> +<field name="CE_SELECT" bitrange="3:0"> +<value name="NONE" value="0x0"> +</value> +<value name="CE0" value="0x1"> +</value> +<value name="CE1" value="0x2"> +</value> +<value name="CE2" value="0x4"> +</value> +<value name="CE3" value="0x8"> +</value> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="no"> +<field name="DRAM_PRESENT" bitrange="31:31"> +</field> +<field name="NOR_PRESENT" bitrange="30:30"> +</field> +<field name="LARGE_DRAM_ENABLED" bitrange="29:29"> +</field> +<field name="DRAM_HALTED" bitrange="1:1"> +<value name="NOT_HALTED" value="0x0"> +</value> +<value name="HALTED" value="0x1"> +</value> +</field> +<field name="NOR_BUSY" bitrange="0:0"> +<value name="NOT_BUSY" value="0x0"> +</value> +<value name="BUSY" value="0x1"> +</value> +</field> +</reg> +<reg name="TIME" addr="0x20" sct="yes"> +<field name="THZ" bitrange="27:24"> +</field> +<field name="TDH" bitrange="19:16"> +</field> +<field name="TDS" bitrange="12:8"> +</field> +<field name="TAS" bitrange="3:0"> +</field> +</reg> +<reg name="DDR_TEST_MODE_CSR" addr="0x30" sct="yes"> +<field name="DONE" bitrange="1:1"> +</field> +<field name="START" bitrange="0:0"> +</field> +</reg> +<reg name="DEBUG" addr="0x80" sct="no"> +<field name="NOR_STATE" bitrange="3:0"> +</field> +</reg> +<reg name="DDR_TEST_MODE_STATUS0" addr="0x90" sct="no"> +<field name="ADDR0" bitrange="12:0"> +</field> +</reg> +<reg name="DDR_TEST_MODE_STATUS1" addr="0xa0" sct="no"> +<field name="ADDR1" bitrange="12:0"> +</field> +</reg> +<reg name="DDR_TEST_MODE_STATUS2" addr="0xb0" sct="no"> +<field name="DATA0" bitrange="31:0"> +</field> +</reg> +<reg name="DDR_TEST_MODE_STATUS3" addr="0xc0" sct="no"> +<field name="DATA1" bitrange="31:0"> +</field> +</reg> +<reg name="VERSION" addr="0xf0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="GPIOMON" addr="0x8003c300" long_name="GPIOMON interface" desc="GPIOMON interface"> +<reg name="BANK0_DATAIN" addr="0x0" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK1_DATAIN" addr="0x10" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK2_DATAIN" addr="0x20" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK3_DATAIN" addr="0x30" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK0_DATAOUT" addr="0x40" sct="yes"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK1_DATAOUT" addr="0x50" sct="yes"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK2_DATAOUT" addr="0x60" sct="yes"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK3_DATAOUT" addr="0x70" sct="yes"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="BANK0_DATAOEN" addr="0x80" sct="yes"> +<field name="OUTPUT_ENABLES" bitrange="31:0"> +</field> +</reg> +<reg name="BANK1_DATAOEN" addr="0x90" sct="yes"> +<field name="OUTPUT_ENABLES" bitrange="31:0"> +</field> +</reg> +<reg name="BANK2_DATAOEN" addr="0xa0" sct="yes"> +<field name="OUTPUT_ENABLES" bitrange="31:0"> +</field> +</reg> +<reg name="BANK3_DATAOEN" addr="0xb0" sct="yes"> +<field name="OUTPUT_ENABLES" bitrange="31:0"> +</field> +</reg> +<reg name="CTRL" addr="0xc0" sct="yes"> +<field name="RSRVD" bitrange="31:4"> +</field> +<field name="PINMUX_ALT_RESET" bitrange="3:3"> +</field> +<field name="OEN_8MA" bitrange="2:2"> +</field> +<field name="OEN_4MA" bitrange="1:1"> +</field> +<field name="OEN_NAND" bitrange="0:0"> +</field> +</reg> +<reg name="ALT1_PINMUX_BANK0" addr="0xd0" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT1_PINMUX_BANK1" addr="0xe0" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT1_PINMUX_BANK2" addr="0xf0" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT1_PINMUX_BANK3" addr="0x100" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT2_PINMUX_BANK0" addr="0x110" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT2_PINMUX_BANK1" addr="0x120" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT2_PINMUX_BANK2" addr="0x130" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT2_PINMUX_BANK3" addr="0x140" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT3_PINMUX_BANK0" addr="0x150" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT3_PINMUX_BANK1" addr="0x160" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT3_PINMUX_BANK2" addr="0x170" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +<reg name="ALT3_PINMUX_BANK3" addr="0x180" sct="yes"> +<field name="INDEX" bitrange="31:0"> +</field> +</reg> +</dev> +<dev name="GPMI" addr="0x8000c000" long_name="General Purpose Media Interface" desc="General Purpose Media Interface"> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +<value name="RUN" value="0x0"> +</value> +<value name="RESET" value="0x1"> +</value> +</field> +<field name="CLKGATE" bitrange="30:30"> +<value name="RUN" value="0x0"> +</value> +<value name="NO_CLKS" value="0x1"> +</value> +</field> +<field name="RUN" bitrange="29:29"> +<value name="IDLE" value="0x0"> +</value> +<value name="BUSY" value="0x1"> +</value> +</field> +<field name="DEV_IRQ_EN" bitrange="28:28"> +</field> +<field name="TIMEOUT_IRQ_EN" bitrange="27:27"> +</field> +<field name="UDMA" bitrange="26:26"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="COMMAND_MODE" bitrange="25:24"> +<value name="WRITE" value="0x0"> +</value> +<value name="READ" value="0x1"> +</value> +<value name="READ_AND_COMPARE" value="0x2"> +</value> +<value name="WAIT_FOR_READY" value="0x3"> +</value> +</field> +<field name="WORD_LENGTH" bitrange="23:23"> +<value name="16_BIT" value="0x0"> +</value> +<value name="8_BIT" value="0x1"> +</value> +</field> +<field name="LOCK_CS" bitrange="22:22"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="CS" bitrange="21:20"> +</field> +<field name="ADDRESS" bitrange="19:17"> +<value name="NAND_DATA" value="0x0"> +</value> +<value name="NAND_CLE" value="0x1"> +</value> +<value name="NAND_ALE" value="0x2"> +</value> +</field> +<field name="ADDRESS_INCREMENT" bitrange="16:16"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="XFER_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="COMPARE" addr="0x10" sct="no"> +<field name="MASK" bitrange="31:16"> +</field> +<field name="REFERENCE" bitrange="15:0"> +</field> +</reg> +<reg name="ECCCTRL" addr="0x20" sct="yes"> +<field name="HANDLE" bitrange="31:16"> +</field> +<field name="ECC_CMD" bitrange="14:13"> +<value name="DECODE_4_BIT" value="0x0"> +</value> +<value name="ENCODE_4_BIT" value="0x1"> +</value> +<value name="DECODE_8_BIT" value="0x2"> +</value> +<value name="ENCODE_8_BIT" value="0x3"> +</value> +</field> +<field name="ENABLE_ECC" bitrange="12:12"> +<value name="ENABLE" value="0x1"> +</value> +<value name="DISABLE" value="0x0"> +</value> +</field> +<field name="BUFFER_MASK" bitrange="8:0"> +<value name="AUXILIARY" value="0x100"> +</value> +<value name="BUFFER7" value="0x80"> +</value> +<value name="BUFFER6" value="0x40"> +</value> +<value name="BUFFER5" value="0x20"> +</value> +<value name="BUFFER4" value="0x10"> +</value> +<value name="BUFFER3" value="0x8"> +</value> +<value name="BUFFER2" value="0x4"> +</value> +<value name="BUFFER1" value="0x2"> +</value> +<value name="BUFFER0" value="0x1"> +</value> +</field> +</reg> +<reg name="ECCCOUNT" addr="0x30" sct="no"> +<field name="COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="PAYLOAD" addr="0x40" sct="no"> +<field name="ADDRESS" bitrange="31:2"> +</field> +</reg> +<reg name="AUXILIARY" addr="0x50" sct="no"> +<field name="ADDRESS" bitrange="31:2"> +</field> +</reg> +<reg name="CTRL1" addr="0x60" sct="yes"> +<field name="DSAMPLE_TIME" bitrange="14:12"> +</field> +<field name="DMA2ECC_MODE" bitrange="11:11"> +</field> +<field name="DEV_IRQ" bitrange="10:10"> +</field> +<field name="TIMEOUT_IRQ" bitrange="9:9"> +</field> +<field name="BURST_EN" bitrange="8:8"> +</field> +<field name="ABORT_WAIT_FOR_READY3" bitrange="7:7"> +</field> +<field name="ABORT_WAIT_FOR_READY2" bitrange="6:6"> +</field> +<field name="ABORT_WAIT_FOR_READY1" bitrange="5:5"> +</field> +<field name="ABORT_WAIT_FOR_READY0" bitrange="4:4"> +</field> +<field name="DEV_RESET" bitrange="3:3"> +<value name="ENABLED" value="0x0"> +</value> +<value name="DISABLED" value="0x1"> +</value> +</field> +<field name="ATA_IRQRDY_POLARITY" bitrange="2:2"> +<value name="ACTIVELOW" value="0x0"> +</value> +<value name="ACTIVEHIGH" value="0x1"> +</value> +</field> +<field name="CAMERA_MODE" bitrange="1:1"> +</field> +<field name="GPMI_MODE" bitrange="0:0"> +<value name="NAND" value="0x0"> +</value> +<value name="ATA" value="0x1"> +</value> +</field> +</reg> +<reg name="TIMING0" addr="0x70" sct="no"> +<field name="ADDRESS_SETUP" bitrange="23:16"> +</field> +<field name="DATA_HOLD" bitrange="15:8"> +</field> +<field name="DATA_SETUP" bitrange="7:0"> +</field> +</reg> +<reg name="TIMING1" addr="0x80" sct="no"> +<field name="DEVICE_BUSY_TIMEOUT" bitrange="31:16"> +</field> +</reg> +<reg name="TIMING2" addr="0x90" sct="no"> +<field name="UDMA_TRP" bitrange="31:24"> +</field> +<field name="UDMA_ENV" bitrange="23:16"> +</field> +<field name="UDMA_HOLD" bitrange="15:8"> +</field> +<field name="UDMA_SETUP" bitrange="7:0"> +</field> +</reg> +<reg name="DATA" addr="0xa0" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="STAT" addr="0xb0" sct="no"> +<field name="PRESENT" bitrange="31:31"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="RDY_TIMEOUT" bitrange="11:8"> +</field> +<field name="ATA_IRQ" bitrange="7:7"> +</field> +<field name="INVALID_BUFFER_MASK" bitrange="6:6"> +</field> +<field name="FIFO_EMPTY" bitrange="5:5"> +<value name="NOT_EMPTY" value="0x0"> +</value> +<value name="EMPTY" value="0x1"> +</value> +</field> +<field name="FIFO_FULL" bitrange="4:4"> +<value name="NOT_FULL" value="0x0"> +</value> +<value name="FULL" value="0x1"> +</value> +</field> +<field name="DEV3_ERROR" bitrange="3:3"> +</field> +<field name="DEV2_ERROR" bitrange="2:2"> +</field> +<field name="DEV1_ERROR" bitrange="1:1"> +</field> +<field name="DEV0_ERROR" bitrange="0:0"> +</field> +</reg> +<reg name="DEBUG" addr="0xc0" sct="no"> +<field name="READY3" bitrange="31:31"> +</field> +<field name="READY2" bitrange="30:30"> +</field> +<field name="READY1" bitrange="29:29"> +</field> +<field name="READY0" bitrange="28:28"> +</field> +<field name="WAIT_FOR_READY_END3" bitrange="27:27"> +</field> +<field name="WAIT_FOR_READY_END2" bitrange="26:26"> +</field> +<field name="WAIT_FOR_READY_END1" bitrange="25:25"> +</field> +<field name="WAIT_FOR_READY_END0" bitrange="24:24"> +</field> +<field name="SENSE3" bitrange="23:23"> +</field> +<field name="SENSE2" bitrange="22:22"> +</field> +<field name="SENSE1" bitrange="21:21"> +</field> +<field name="SENSE0" bitrange="20:20"> +</field> +<field name="DMAREQ3" bitrange="19:19"> +</field> +<field name="DMAREQ2" bitrange="18:18"> +</field> +<field name="DMAREQ1" bitrange="17:17"> +</field> +<field name="DMAREQ0" bitrange="16:16"> +</field> +<field name="CMD_END" bitrange="15:12"> +</field> +<field name="UDMA_STATE" bitrange="11:8"> +</field> +<field name="BUSY" bitrange="7:7"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="PIN_STATE" bitrange="6:4"> +<value name="PSM_IDLE" value="0x0"> +</value> +<value name="PSM_BYTCNT" value="0x1"> +</value> +<value name="PSM_ADDR" value="0x2"> +</value> +<value name="PSM_STALL" value="0x3"> +</value> +<value name="PSM_STROBE" value="0x4"> +</value> +<value name="PSM_ATARDY" value="0x5"> +</value> +<value name="PSM_DHOLD" value="0x6"> +</value> +<value name="PSM_DONE" value="0x7"> +</value> +</field> +<field name="MAIN_STATE" bitrange="3:0"> +<value name="MSM_IDLE" value="0x0"> +</value> +<value name="MSM_BYTCNT" value="0x1"> +</value> +<value name="MSM_WAITFE" value="0x2"> +</value> +<value name="MSM_WAITFR" value="0x3"> +</value> +<value name="MSM_DMAREQ" value="0x4"> +</value> +<value name="MSM_DMAACK" value="0x5"> +</value> +<value name="MSM_WAITFF" value="0x6"> +</value> +<value name="MSM_LDFIFO" value="0x7"> +</value> +<value name="MSM_LDDMAR" value="0x8"> +</value> +<value name="MSM_RDCMP" value="0x9"> +</value> +<value name="MSM_DONE" value="0xa"> +</value> +</field> +</reg> +<reg name="VERSION" addr="0xd0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="I2C" addr="0x80058000" long_name="I2C Interface" desc="I2C Interface"> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +<value name="RUN" value="0x0"> +</value> +<value name="RESET" value="0x1"> +</value> +</field> +<field name="CLKGATE" bitrange="30:30"> +<value name="RUN" value="0x0"> +</value> +<value name="NO_CLKS" value="0x1"> +</value> +</field> +<field name="RUN" bitrange="29:29"> +<value name="HALT" value="0x0"> +</value> +<value name="RUN" value="0x1"> +</value> +</field> +<field name="PRE_ACK" bitrange="27:27"> +</field> +<field name="ACKNOWLEDGE" bitrange="26:26"> +<value name="SNAK" value="0x0"> +</value> +<value name="ACK" value="0x1"> +</value> +</field> +<field name="SEND_NAK_ON_LAST" bitrange="25:25"> +<value name="ACK_IT" value="0x0"> +</value> +<value name="NAK_IT" value="0x1"> +</value> +</field> +<field name="PIO_MODE" bitrange="24:24"> +</field> +<field name="MULTI_MASTER" bitrange="23:23"> +<value name="SINGLE" value="0x0"> +</value> +<value name="MULTIPLE" value="0x1"> +</value> +</field> +<field name="CLOCK_HELD" bitrange="22:22"> +<value name="RELEASE" value="0x0"> +</value> +<value name="HELD_LOW" value="0x1"> +</value> +</field> +<field name="RETAIN_CLOCK" bitrange="21:21"> +<value name="RELEASE" value="0x0"> +</value> +<value name="HOLD_LOW" value="0x1"> +</value> +</field> +<field name="POST_SEND_STOP" bitrange="20:20"> +<value name="NO_STOP" value="0x0"> +</value> +<value name="SEND_STOP" value="0x1"> +</value> +</field> +<field name="PRE_SEND_START" bitrange="19:19"> +<value name="NO_START" value="0x0"> +</value> +<value name="SEND_START" value="0x1"> +</value> +</field> +<field name="SLAVE_ADDRESS_ENABLE" bitrange="18:18"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="MASTER_MODE" bitrange="17:17"> +<value name="SLAVE" value="0x0"> +</value> +<value name="MASTER" value="0x1"> +</value> +</field> +<field name="DIRECTION" bitrange="16:16"> +<value name="RECEIVE" value="0x0"> +</value> +<value name="TRANSMIT" value="0x1"> +</value> +</field> +<field name="XFER_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="TIMING0" addr="0x10" sct="yes"> +<field name="HIGH_COUNT" bitrange="25:16"> +</field> +<field name="RCV_COUNT" bitrange="9:0"> +</field> +</reg> +<reg name="TIMING1" addr="0x20" sct="yes"> +<field name="LOW_COUNT" bitrange="25:16"> +</field> +<field name="XMIT_COUNT" bitrange="9:0"> +</field> +</reg> +<reg name="TIMING2" addr="0x30" sct="yes"> +<field name="BUS_FREE" bitrange="25:16"> +</field> +<field name="LEADIN_COUNT" bitrange="9:0"> +</field> +</reg> +<reg name="CTRL1" addr="0x40" sct="yes"> +<field name="BCAST_SLAVE_EN" bitrange="24:24"> +<value name="NO_BCAST" value="0x0"> +</value> +<value name="WATCH_BCAST" value="0x1"> +</value> +</field> +<field name="SLAVE_ADDRESS_BYTE" bitrange="23:16"> +</field> +<field name="BUS_FREE_IRQ_EN" bitrange="15:15"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="DATA_ENGINE_CMPLT_IRQ_EN" bitrange="14:14"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="NO_SLAVE_ACK_IRQ_EN" bitrange="13:13"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="OVERSIZE_XFER_TERM_IRQ_EN" bitrange="12:12"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="EARLY_TERM_IRQ_EN" bitrange="11:11"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="MASTER_LOSS_IRQ_EN" bitrange="10:10"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="SLAVE_STOP_IRQ_EN" bitrange="9:9"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="SLAVE_IRQ_EN" bitrange="8:8"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="BUS_FREE_IRQ" bitrange="7:7"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="DATA_ENGINE_CMPLT_IRQ" bitrange="6:6"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="NO_SLAVE_ACK_IRQ" bitrange="5:5"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="OVERSIZE_XFER_TERM_IRQ" bitrange="4:4"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="EARLY_TERM_IRQ" bitrange="3:3"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="MASTER_LOSS_IRQ" bitrange="2:2"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="SLAVE_STOP_IRQ" bitrange="1:1"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="SLAVE_IRQ" bitrange="0:0"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +</reg> +<reg name="STAT" addr="0x50" sct="no"> +<field name="MASTER_PRESENT" bitrange="31:31"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="SLAVE_PRESENT" bitrange="30:30"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="ANY_ENABLED_IRQ" bitrange="29:29"> +<value name="NO_REQUESTS" value="0x0"> +</value> +<value name="AT_LEAST_ONE_REQUEST" value="0x1"> +</value> +</field> +<field name="RCVD_SLAVE_ADDR" bitrange="23:16"> +</field> +<field name="SLAVE_ADDR_EQ_ZERO" bitrange="15:15"> +<value name="ZERO_NOT_MATCHED" value="0x0"> +</value> +<value name="WAS_ZERO" value="0x1"> +</value> +</field> +<field name="SLAVE_FOUND" bitrange="14:14"> +<value name="IDLE" value="0x0"> +</value> +<value name="WAITING" value="0x1"> +</value> +</field> +<field name="SLAVE_SEARCHING" bitrange="13:13"> +<value name="IDLE" value="0x0"> +</value> +<value name="ACTIVE" value="0x1"> +</value> +</field> +<field name="DATA_ENGINE_DMA_WAIT" bitrange="12:12"> +<value name="CONTINUE" value="0x0"> +</value> +<value name="WAITING" value="0x1"> +</value> +</field> +<field name="BUS_BUSY" bitrange="11:11"> +<value name="IDLE" value="0x0"> +</value> +<value name="BUSY" value="0x1"> +</value> +</field> +<field name="CLK_GEN_BUSY" bitrange="10:10"> +<value name="IDLE" value="0x0"> +</value> +<value name="BUSY" value="0x1"> +</value> +</field> +<field name="DATA_ENGINE_BUSY" bitrange="9:9"> +<value name="IDLE" value="0x0"> +</value> +<value name="BUSY" value="0x1"> +</value> +</field> +<field name="SLAVE_BUSY" bitrange="8:8"> +<value name="IDLE" value="0x0"> +</value> +<value name="BUSY" value="0x1"> +</value> +</field> +<field name="BUS_FREE_IRQ_SUMMARY" bitrange="7:7"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="DATA_ENGINE_CMPLT_IRQ_SUMMARY" bitrange="6:6"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="NO_SLAVE_ACK_IRQ_SUMMARY" bitrange="5:5"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="OVERSIZE_XFER_TERM_IRQ_SUMMARY" bitrange="4:4"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="EARLY_TERM_IRQ_SUMMARY" bitrange="3:3"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="MASTER_LOSS_IRQ_SUMMARY" bitrange="2:2"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="SLAVE_STOP_IRQ_SUMMARY" bitrange="1:1"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="SLAVE_IRQ_SUMMARY" bitrange="0:0"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +</reg> +<reg name="DATA" addr="0x60" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="DEBUG0" addr="0x70" sct="yes"> +<field name="DMAREQ" bitrange="31:31"> +</field> +<field name="DMAENDCMD" bitrange="30:30"> +</field> +<field name="DMAKICK" bitrange="29:29"> +</field> +<field name="TBD" bitrange="28:26"> +</field> +<field name="DMA_STATE" bitrange="25:16"> +</field> +<field name="START_TOGGLE" bitrange="15:15"> +</field> +<field name="STOP_TOGGLE" bitrange="14:14"> +</field> +<field name="GRAB_TOGGLE" bitrange="13:13"> +</field> +<field name="CHANGE_TOGGLE" bitrange="12:12"> +</field> +<field name="TESTMODE" bitrange="11:11"> +</field> +<field name="SLAVE_HOLD_CLK" bitrange="10:10"> +</field> +<field name="SLAVE_STATE" bitrange="9:0"> +</field> +</reg> +<reg name="DEBUG1" addr="0x80" sct="yes"> +<field name="I2C_CLK_IN" bitrange="31:31"> +</field> +<field name="I2C_DATA_IN" bitrange="30:30"> +</field> +<field name="DMA_BYTE_ENABLES" bitrange="27:24"> +</field> +<field name="CLK_GEN_STATE" bitrange="22:16"> +</field> +<field name="LST_MODE" bitrange="10:9"> +<value name="BCAST" value="0x0"> +</value> +<value name="MY_WRITE" value="0x1"> +</value> +<value name="MY_READ" value="0x2"> +</value> +<value name="NOT_ME" value="0x3"> +</value> +</field> +<field name="LOCAL_SLAVE_TEST" bitrange="8:8"> +</field> +<field name="FORCE_CLK_ON" bitrange="5:5"> +</field> +<field name="FORCE_CLK_IDLE" bitrange="4:4"> +</field> +<field name="FORCE_ARB_LOSS" bitrange="3:3"> +</field> +<field name="FORCE_RCV_ACK" bitrange="2:2"> +</field> +<field name="FORCE_I2C_DATA_OE" bitrange="1:1"> +</field> +<field name="FORCE_I2C_CLK_OE" bitrange="0:0"> +</field> +</reg> +<reg name="VERSION" addr="0x90" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="ICOLL" addr="0x80000000" long_name="Interrupt Collector" desc="Interrupt Collector"> +<reg name="VECTOR" addr="0x0" sct="yes"> +<field name="IRQVECTOR" bitrange="31:2"> +</field> +</reg> +<reg name="LEVELACK" addr="0x10" sct="no"> +<field name="IRQLEVELACK" bitrange="3:0"> +<value name="LEVEL0" value="0x1"> +</value> +<value name="LEVEL1" value="0x2"> +</value> +<value name="LEVEL2" value="0x4"> +</value> +<value name="LEVEL3" value="0x8"> +</value> +</field> +</reg> +<reg name="CTRL" addr="0x20" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +<value name="RUN" value="0x0"> +</value> +<value name="IN_RESET" value="0x1"> +</value> +</field> +<field name="CLKGATE" bitrange="30:30"> +<value name="RUN" value="0x0"> +</value> +<value name="NO_CLOCKS" value="0x1"> +</value> +</field> +<field name="VECTOR_PITCH" bitrange="23:21"> +<value name="DEFAULT_BY4" value="0x0"> +</value> +<value name="BY4" value="0x1"> +</value> +<value name="BY8" value="0x2"> +</value> +<value name="BY12" value="0x3"> +</value> +<value name="BY16" value="0x4"> +</value> +<value name="BY20" value="0x5"> +</value> +<value name="BY24" value="0x6"> +</value> +<value name="BY28" value="0x7"> +</value> +</field> +<field name="BYPASS_FSM" bitrange="20:20"> +<value name="NORMAL" value="0x0"> +</value> +<value name="BYPASS" value="0x1"> +</value> +</field> +<field name="NO_NESTING" bitrange="19:19"> +<value name="NORMAL" value="0x0"> +</value> +<value name="NO_NEST" value="0x1"> +</value> +</field> +<field name="ARM_RSE_MODE" bitrange="18:18"> +<value name="MUST_WRITE" value="0x0"> +</value> +<value name="READ_SIDE_EFFECT" value="0x1"> +</value> +</field> +<field name="FIQ_FINAL_ENABLE" bitrange="17:17"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="IRQ_FINAL_ENABLE" bitrange="16:16"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ35" bitrange="7:7"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ34" bitrange="6:6"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ33" bitrange="5:5"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ32" bitrange="4:4"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ_T3" bitrange="3:3"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ_T2" bitrange="2:2"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ_T1" bitrange="1:1"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="ENABLE2FIQ_T0" bitrange="0:0"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +</reg> +<reg name="STAT" addr="0x30" sct="no"> +<field name="VECTOR_NUMBER" bitrange="5:0"> +</field> +</reg> +<multireg name="RAWn" base="0x40" count="1" offset="0x10" sct=""> +<reg name="RAW0" addr="0x40" index="0"> +</reg> +<reg name="RAW1" addr="0x50" index="1"> +</reg> +<field name="RAW_IRQS" bitrange="31:0"> +</field> +</multireg> +<multireg name="PRIORITYn" base="0x60" count="15" offset="0x10" sct="SCT"> +<reg name="PRIORITY0" addr="0x60" index="0"> +</reg> +<reg name="PRIORITY1" addr="0x70" index="1"> +</reg> +<reg name="PRIORITY2" addr="0x80" index="2"> +</reg> +<reg name="PRIORITY3" addr="0x90" index="3"> +</reg> +<reg name="PRIORITY4" addr="0xa0" index="4"> +</reg> +<reg name="PRIORITY5" addr="0xb0" index="5"> +</reg> +<reg name="PRIORITY6" addr="0xc0" index="6"> +</reg> +<reg name="PRIORITY7" addr="0xd0" index="7"> +</reg> +<reg name="PRIORITY8" addr="0xe0" index="8"> +</reg> +<reg name="PRIORITY9" addr="0xf0" index="9"> +</reg> +<reg name="PRIORITY10" addr="0x100" index="10"> +</reg> +<reg name="PRIORITY11" addr="0x110" index="11"> +</reg> +<reg name="PRIORITY12" addr="0x120" index="12"> +</reg> +<reg name="PRIORITY13" addr="0x130" index="13"> +</reg> +<reg name="PRIORITY14" addr="0x140" index="14"> +</reg> +<reg name="PRIORITY15" addr="0x150" index="15"> +</reg> +<field name="SOFTIRQ3" bitrange="27:27"> +<value name="NO_INTERRUPT" value="0x0"> +</value> +<value name="FORCE_INTERRUPT" value="0x1"> +</value> +</field> +<field name="ENABLE3" bitrange="26:26"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="PRIORITY3" bitrange="25:24"> +<value name="LEVEL0" value="0x0"> +</value> +<value name="LEVEL1" value="0x1"> +</value> +<value name="LEVEL2" value="0x2"> +</value> +<value name="LEVEL3" value="0x3"> +</value> +</field> +<field name="SOFTIRQ2" bitrange="19:19"> +<value name="NO_INTERRUPT" value="0x0"> +</value> +<value name="FORCE_INTERRUPT" value="0x1"> +</value> +</field> +<field name="ENABLE2" bitrange="18:18"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="PRIORITY2" bitrange="17:16"> +<value name="LEVEL0" value="0x0"> +</value> +<value name="LEVEL1" value="0x1"> +</value> +<value name="LEVEL2" value="0x2"> +</value> +<value name="LEVEL3" value="0x3"> +</value> +</field> +<field name="SOFTIRQ1" bitrange="11:11"> +<value name="NO_INTERRUPT" value="0x0"> +</value> +<value name="FORCE_INTERRUPT" value="0x1"> +</value> +</field> +<field name="ENABLE1" bitrange="10:10"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="PRIORITY1" bitrange="9:8"> +<value name="LEVEL0" value="0x0"> +</value> +<value name="LEVEL1" value="0x1"> +</value> +<value name="LEVEL2" value="0x2"> +</value> +<value name="LEVEL3" value="0x3"> +</value> +</field> +<field name="SOFTIRQ0" bitrange="3:3"> +<value name="NO_INTERRUPT" value="0x0"> +</value> +<value name="FORCE_INTERRUPT" value="0x1"> +</value> +</field> +<field name="ENABLE0" bitrange="2:2"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="PRIORITY0" bitrange="1:0"> +<value name="LEVEL0" value="0x0"> +</value> +<value name="LEVEL1" value="0x1"> +</value> +<value name="LEVEL2" value="0x2"> +</value> +<value name="LEVEL3" value="0x3"> +</value> +</field> +</multireg> +<reg name="VBASE" addr="0x160" sct="yes"> +<field name="TABLE_ADDRESS" bitrange="31:2"> +</field> +</reg> +<reg name="DEBUG" addr="0x170" sct="no"> +<field name="INSERVICE" bitrange="31:28"> +<value name="LEVEL0" value="0x1"> +</value> +<value name="LEVEL1" value="0x2"> +</value> +<value name="LEVEL2" value="0x4"> +</value> +<value name="LEVEL3" value="0x8"> +</value> +</field> +<field name="LEVEL_REQUESTS" bitrange="27:24"> +<value name="LEVEL0" value="0x1"> +</value> +<value name="LEVEL1" value="0x2"> +</value> +<value name="LEVEL2" value="0x4"> +</value> +<value name="LEVEL3" value="0x8"> +</value> +</field> +<field name="REQUESTS_BY_LEVEL" bitrange="23:20"> +<value name="LEVEL0" value="0x1"> +</value> +<value name="LEVEL1" value="0x2"> +</value> +<value name="LEVEL2" value="0x4"> +</value> +<value name="LEVEL3" value="0x8"> +</value> +</field> +<field name="FIQ" bitrange="17:17"> +<value name="NO_FIQ_REQUESTED" value="0x0"> +</value> +<value name="FIQ_REQUESTED" value="0x1"> +</value> +</field> +<field name="IRQ" bitrange="16:16"> +<value name="NO_IRQ_REQUESTED" value="0x0"> +</value> +<value name="IRQ_REQUESTED" value="0x1"> +</value> +</field> +<field name="VECTOR_FSM" bitrange="9:0"> +<value name="FSM_IDLE" value="0x0"> +</value> +<value name="FSM_MULTICYCLE1" value="0x1"> +</value> +<value name="FSM_MULTICYCLE2" value="0x2"> +</value> +<value name="FSM_PENDING" value="0x4"> +</value> +<value name="FSM_MULTICYCLE3" value="0x8"> +</value> +<value name="FSM_MULTICYCLE4" value="0x10"> +</value> +<value name="FSM_ISR_RUNNING1" value="0x20"> +</value> +<value name="FSM_ISR_RUNNING2" value="0x40"> +</value> +<value name="FSM_ISR_RUNNING3" value="0x80"> +</value> +<value name="FSM_MULTICYCLE5" value="0x100"> +</value> +<value name="FSM_MULTICYCLE6" value="0x200"> +</value> +</field> +</reg> +<reg name="DBGREAD0" addr="0x180" sct="no"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="DBGREAD1" addr="0x190" sct="no"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="DBGFLAG" addr="0x1a0" sct="yes"> +<field name="FLAG" bitrange="15:0"> +</field> +</reg> +<multireg name="DBGREQUESTn" base="0x1b0" count="1" offset="0x10" sct=""> +<reg name="DBGREQUEST0" addr="0x1b0" index="0"> +</reg> +<reg name="DBGREQUEST1" addr="0x1c0" index="1"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<reg name="VERSION" addr="0x1d0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="IR" addr="0x80078000" long_name="IrDA" desc="IrDA Controller"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +<value name="RUN" value="0x0"> +</value> +<value name="RESET" value="0x1"> +</value> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="MTA" bitrange="26:24"> +<value name="MTA_10MS" value="0x0"> +</value> +<value name="MTA_5MS" value="0x1"> +</value> +<value name="MTA_1MS" value="0x2"> +</value> +<value name="MTA_500US" value="0x3"> +</value> +<value name="MTA_100US" value="0x4"> +</value> +<value name="MTA_50US" value="0x5"> +</value> +<value name="MTA_10US" value="0x6"> +</value> +<value name="MTA_0" value="0x7"> +</value> +</field> +<field name="MODE" bitrange="23:22"> +<value name="SIR" value="0x0"> +</value> +<value name="MIR" value="0x1"> +</value> +<value name="FIR" value="0x2"> +</value> +<value name="VFIR" value="0x3"> +</value> +</field> +<field name="SPEED" bitrange="21:19"> +<value name="SPD000" value="0x0"> +</value> +<value name="SPD001" value="0x1"> +</value> +<value name="SPD010" value="0x2"> +</value> +<value name="SPD011" value="0x3"> +</value> +<value name="SPD100" value="0x4"> +</value> +<value name="SPD101" value="0x5"> +</value> +</field> +<field name="TC_TIME_DIV" bitrange="13:8"> +</field> +<field name="TC_TYPE" bitrange="7:7"> +</field> +<field name="SIR_GAP" bitrange="6:4"> +<value name="GAP_10K" value="0x0"> +</value> +<value name="GAP_5K" value="0x1"> +</value> +<value name="GAP_1K" value="0x2"> +</value> +<value name="GAP_500" value="0x3"> +</value> +<value name="GAP_100" value="0x4"> +</value> +<value name="GAP_50" value="0x5"> +</value> +<value name="GAP_10" value="0x6"> +</value> +<value name="GAP_0" value="0x7"> +</value> +</field> +<field name="SIPEN" bitrange="3:3"> +</field> +<field name="TCEN" bitrange="2:2"> +</field> +<field name="TXEN" bitrange="1:1"> +</field> +<field name="RXEN" bitrange="0:0"> +</field> +</reg> +<reg name="TXDMA" addr="0x10" sct="yes"> +<field name="RUN" bitrange="31:31"> +</field> +<field name="EMPTY" bitrange="29:29"> +</field> +<field name="INT" bitrange="28:28"> +</field> +<field name="CHANGE" bitrange="27:27"> +</field> +<field name="NEW_MTA" bitrange="26:24"> +</field> +<field name="NEW_MODE" bitrange="23:22"> +</field> +<field name="NEW_SPEED" bitrange="21:19"> +</field> +<field name="BOF_TYPE" bitrange="18:18"> +</field> +<field name="XBOFS" bitrange="17:12"> +</field> +<field name="XFER_COUNT" bitrange="11:0"> +</field> +</reg> +<reg name="RXDMA" addr="0x20" sct="yes"> +<field name="RUN" bitrange="31:31"> +</field> +<field name="XFER_COUNT" bitrange="9:0"> +</field> +</reg> +<reg name="DBGCTRL" addr="0x30" sct="yes"> +<field name="VFIRSWZ" bitrange="12:12"> +<value name="NORMAL" value="0x0"> +</value> +<value name="SWAP" value="0x1"> +</value> +</field> +<field name="RXFRMOFF" bitrange="11:11"> +</field> +<field name="RXCRCOFF" bitrange="10:10"> +</field> +<field name="RXINVERT" bitrange="9:9"> +</field> +<field name="TXFRMOFF" bitrange="8:8"> +</field> +<field name="TXCRCOFF" bitrange="7:7"> +</field> +<field name="TXINVERT" bitrange="6:6"> +</field> +<field name="INTLOOPBACK" bitrange="5:5"> +</field> +<field name="DUPLEX" bitrange="4:4"> +</field> +<field name="MIO_RX" bitrange="3:3"> +</field> +<field name="MIO_TX" bitrange="2:2"> +</field> +<field name="MIO_SCLK" bitrange="1:1"> +</field> +<field name="MIO_EN" bitrange="0:0"> +</field> +</reg> +<reg name="INTR" addr="0x40" sct="yes"> +<field name="RXABORT_IRQ_EN" bitrange="22:22"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="SPEED_IRQ_EN" bitrange="21:21"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="RXOF_IRQ_EN" bitrange="20:20"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="TXUF_IRQ_EN" bitrange="19:19"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="TC_IRQ_EN" bitrange="18:18"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="RX_IRQ_EN" bitrange="17:17"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="TX_IRQ_EN" bitrange="16:16"> +<value name="DISABLED" value="0x0"> +</value> +<value name="ENABLED" value="0x1"> +</value> +</field> +<field name="RXABORT_IRQ" bitrange="6:6"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="SPEED_IRQ" bitrange="5:5"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="RXOF_IRQ" bitrange="4:4"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="TXUF_IRQ" bitrange="3:3"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="TC_IRQ" bitrange="2:2"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="RX_IRQ" bitrange="1:1"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="TX_IRQ" bitrange="0:0"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +</reg> +<reg name="DATA" addr="0x50" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="STAT" addr="0x60" sct="no"> +<field name="PRESENT" bitrange="31:31"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="MODE_ALLOWED" bitrange="30:29"> +<value name="VFIR" value="0x0"> +</value> +<value name="FIR" value="0x1"> +</value> +<value name="MIR" value="0x2"> +</value> +<value name="SIR" value="0x3"> +</value> +</field> +<field name="ANY_IRQ" bitrange="28:28"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="RXABORT_SUMMARY" bitrange="22:22"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="SPEED_SUMMARY" bitrange="21:21"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="RXOF_SUMMARY" bitrange="20:20"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="TXUF_SUMMARY" bitrange="19:19"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="TC_SUMMARY" bitrange="18:18"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="RX_SUMMARY" bitrange="17:17"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="TX_SUMMARY" bitrange="16:16"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="MEDIA_BUSY" bitrange="2:2"> +</field> +<field name="RX_ACTIVE" bitrange="1:1"> +</field> +<field name="TX_ACTIVE" bitrange="0:0"> +</field> +</reg> +<reg name="TCCTRL" addr="0x70" sct="yes"> +<field name="INIT" bitrange="31:31"> +</field> +<field name="GO" bitrange="30:30"> +</field> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="TEMIC" bitrange="24:24"> +<value name="LOW" value="0x0"> +</value> +<value name="HIGH" value="0x1"> +</value> +</field> +<field name="EXT_DATA" bitrange="23:16"> +</field> +<field name="DATA" bitrange="15:8"> +</field> +<field name="ADDR" bitrange="7:5"> +</field> +<field name="INDX" bitrange="4:1"> +</field> +<field name="C" bitrange="0:0"> +</field> +</reg> +<reg name="SI_READ" addr="0x80" sct="no"> +<field name="ABORT" bitrange="8:8"> +</field> +<field name="DATA" bitrange="7:0"> +</field> +</reg> +<reg name="DEBUG" addr="0x90" sct="no"> +<field name="TXDMAKICK" bitrange="5:5"> +</field> +<field name="RXDMAKICK" bitrange="4:4"> +</field> +<field name="TXDMAEND" bitrange="3:3"> +</field> +<field name="RXDMAEND" bitrange="2:2"> +</field> +<field name="TXDMAREQ" bitrange="1:1"> +</field> +<field name="RXDMAREQ" bitrange="0:0"> +</field> +</reg> +<reg name="VERSION" addr="0xa0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="LCDIF" addr="0x80030000" long_name="LCD Interface" desc="LCD Interface (LCDIF)"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="READ_WRITEB" bitrange="29:29"> +</field> +<field name="WAIT_FOR_VSYNC_EDGE" bitrange="28:28"> +</field> +<field name="DATA_SHIFT_DIR" bitrange="27:27"> +<value name="TXDATA_SHIFT_LEFT" value="0x0"> +</value> +<value name="TXDATA_SHIFT_RIGHT" value="0x1"> +</value> +</field> +<field name="SHIFT_NUM_BITS" bitrange="26:25"> +</field> +<field name="DVI_MODE" bitrange="24:24"> +</field> +<field name="BYPASS_COUNT" bitrange="23:23"> +</field> +<field name="DATA_SWIZZLE" bitrange="22:21"> +<value name="NO_SWAP" value="0x0"> +</value> +<value name="LITTLE_ENDIAN" value="0x0"> +</value> +<value name="BIG_ENDIAN_SWAP" value="0x1"> +</value> +<value name="SWAP_ALL_BYTES" value="0x1"> +</value> +<value name="HWD_SWAP" value="0x2"> +</value> +<value name="HWD_BYTE_SWAP" value="0x3"> +</value> +</field> +<field name="VSYNC_MODE" bitrange="20:20"> +</field> +<field name="DOTCLK_MODE" bitrange="19:19"> +</field> +<field name="DATA_SELECT" bitrange="18:18"> +<value name="CMD_MODE" value="0x0"> +</value> +<value name="DATA_MODE" value="0x1"> +</value> +</field> +<field name="WORD_LENGTH" bitrange="17:17"> +<value name="16_BIT" value="0x0"> +</value> +<value name="8_BIT" value="0x1"> +</value> +</field> +<field name="RUN" bitrange="16:16"> +</field> +<field name="COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="CTRL1" addr="0x10" sct="yes"> +<field name="BYTE_PACKING_FORMAT" bitrange="19:16"> +</field> +<field name="OVERFLOW_IRQ_EN" bitrange="15:15"> +</field> +<field name="UNDERFLOW_IRQ_EN" bitrange="14:14"> +</field> +<field name="CUR_FRAME_DONE_IRQ_EN" bitrange="13:13"> +</field> +<field name="VSYNC_EDGE_IRQ_EN" bitrange="12:12"> +</field> +<field name="OVERFLOW_IRQ" bitrange="11:11"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="UNDERFLOW_IRQ" bitrange="10:10"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="CUR_FRAME_DONE_IRQ" bitrange="9:9"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="VSYNC_EDGE_IRQ" bitrange="8:8"> +<value name="NO_REQUEST" value="0x0"> +</value> +<value name="REQUEST" value="0x1"> +</value> +</field> +<field name="READ_MODE_NUM_PACKED_SUBWORDS" bitrange="7:5"> +</field> +<field name="FIRST_READ_DUMMY" bitrange="4:4"> +</field> +<field name="LCD_CS_CTRL" bitrange="3:3"> +</field> +<field name="BUSY_ENABLE" bitrange="2:2"> +<value name="BUSY_DISABLED" value="0x0"> +</value> +<value name="BUSY_ENABLED" value="0x1"> +</value> +</field> +<field name="MODE86" bitrange="1:1"> +<value name="8080_MODE" value="0x0"> +</value> +<value name="6800_MODE" value="0x1"> +</value> +</field> +<field name="RESET" bitrange="0:0"> +<value name="LCDRESET_LOW" value="0x0"> +</value> +<value name="LCDRESET_HIGH" value="0x1"> +</value> +</field> +</reg> +<reg name="TIMING" addr="0x20" sct="no"> +<field name="CMD_HOLD" bitrange="31:24"> +</field> +<field name="CMD_SETUP" bitrange="23:16"> +</field> +<field name="DATA_HOLD" bitrange="15:8"> +</field> +<field name="DATA_SETUP" bitrange="7:0"> +</field> +</reg> +<reg name="VDCTRL0" addr="0x30" sct="yes"> +<field name="VSYNC_OEB" bitrange="29:29"> +<value name="VSYNC_OUTPUT" value="0x0"> +</value> +<value name="VSYNC_INPUT" value="0x1"> +</value> +</field> +<field name="ENABLE_PRESENT" bitrange="28:28"> +</field> +<field name="VSYNC_POL" bitrange="27:27"> +</field> +<field name="HSYNC_POL" bitrange="26:26"> +</field> +<field name="DOTCLK_POL" bitrange="25:25"> +</field> +<field name="ENABLE_POL" bitrange="24:24"> +</field> +<field name="VSYNC_PERIOD_UNIT" bitrange="21:21"> +</field> +<field name="VSYNC_PULSE_WIDTH_UNIT" bitrange="20:20"> +</field> +<field name="INTERLACE" bitrange="19:19"> +</field> +<field name="DOTCLK_V_VALID_DATA_CNT" bitrange="9:0"> +</field> +</reg> +<reg name="VDCTRL1" addr="0x40" sct="no"> +<field name="VSYNC_PULSE_WIDTH" bitrange="31:20"> +</field> +<field name="VSYNC_PERIOD" bitrange="19:0"> +</field> +</reg> +<reg name="VDCTRL2" addr="0x50" sct="no"> +<field name="HSYNC_PULSE_WIDTH" bitrange="31:23"> +</field> +<field name="HSYNC_PERIOD" bitrange="22:11"> +</field> +<field name="DOTCLK_H_VALID_DATA_CNT" bitrange="10:0"> +</field> +</reg> +<reg name="VDCTRL3" addr="0x60" sct="no"> +<field name="SYNC_SIGNALS_ON" bitrange="24:24"> +</field> +<field name="HORIZONTAL_WAIT_CNT" bitrange="23:12"> +</field> +<field name="VERTICAL_WAIT_CNT" bitrange="8:0"> +</field> +</reg> +<reg name="DVICTRL0" addr="0x70" sct="no"> +<field name="H_ACTIVE_CNT" bitrange="30:20"> +</field> +<field name="H_BLANKING_CNT" bitrange="19:10"> +</field> +<field name="V_LINES_CNT" bitrange="9:0"> +</field> +</reg> +<reg name="DVICTRL1" addr="0x80" sct="no"> +<field name="F1_START_LINE" bitrange="29:20"> +</field> +<field name="F1_END_LINE" bitrange="19:10"> +</field> +<field name="F2_START_LINE" bitrange="9:0"> +</field> +</reg> +<reg name="DVICTRL2" addr="0x90" sct="no"> +<field name="F2_END_LINE" bitrange="29:20"> +</field> +<field name="V1_BLANK_START_LINE" bitrange="19:10"> +</field> +<field name="V1_BLANK_END_LINE" bitrange="9:0"> +</field> +</reg> +<reg name="DVICTRL3" addr="0xa0" sct="no"> +<field name="V2_BLANK_START_LINE" bitrange="25:16"> +</field> +<field name="V2_BLANK_END_LINE" bitrange="9:0"> +</field> +</reg> +<reg name="DATA" addr="0xb0" sct="no"> +<field name="DATA_THREE" bitrange="31:24"> +</field> +<field name="DATA_TWO" bitrange="23:16"> +</field> +<field name="DATA_ONE" bitrange="15:8"> +</field> +<field name="DATA_ZERO" bitrange="7:0"> +</field> +</reg> +<reg name="STAT" addr="0xc0" sct="no"> +<field name="PRESENT" bitrange="31:31"> +</field> +<field name="DMA_REQ" bitrange="30:30"> +</field> +<field name="RXFIFO_FULL" bitrange="29:29"> +</field> +<field name="RXFIFO_EMPTY" bitrange="28:28"> +</field> +<field name="TXFIFO_FULL" bitrange="27:27"> +</field> +<field name="TXFIFO_EMPTY" bitrange="26:26"> +</field> +<field name="BUSY" bitrange="25:25"> +</field> +<field name="DVI_CURRENT_FIELD" bitrange="24:24"> +</field> +</reg> +<reg name="VERSION" addr="0xd0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +<reg name="DEBUG0" addr="0xe0" sct="no"> +<field name="STREAMING_END_DETECTED" bitrange="31:31"> +</field> +<field name="WAIT_FOR_VSYNC_EDGE_OUT" bitrange="30:30"> +</field> +<field name="SYNC_SIGNALS_ON_REG" bitrange="29:29"> +</field> +<field name="DMACMDKICK" bitrange="28:28"> +</field> +<field name="ENABLE" bitrange="27:27"> +</field> +<field name="HSYNC" bitrange="26:26"> +</field> +<field name="VSYNC" bitrange="25:25"> +</field> +<field name="CUR_FRAME_TX" bitrange="24:24"> +</field> +<field name="EMPTY_WORD" bitrange="23:23"> +</field> +<field name="CUR_STATE" bitrange="22:16"> +</field> +<field name="DATA_COUNT" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="LRADC" addr="0x80050000" long_name="Low Resolution ADC" desc="Low-Resolution ADC and Touch-Screen Interface"> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="ONCHIP_GROUNDREF" bitrange="21:21"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="TOUCH_DETECT_ENABLE" bitrange="20:20"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="YMINUS_ENABLE" bitrange="19:19"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="XMINUS_ENABLE" bitrange="18:18"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="YPLUS_ENABLE" bitrange="17:17"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="XPLUS_ENABLE" bitrange="16:16"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="SCHEDULE" bitrange="7:0"> +</field> +</reg> +<reg name="CTRL1" addr="0x10" sct="yes"> +<field name="TOUCH_DETECT_IRQ_EN" bitrange="24:24"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC7_IRQ_EN" bitrange="23:23"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC6_IRQ_EN" bitrange="22:22"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC5_IRQ_EN" bitrange="21:21"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC4_IRQ_EN" bitrange="20:20"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC3_IRQ_EN" bitrange="19:19"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC2_IRQ_EN" bitrange="18:18"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC1_IRQ_EN" bitrange="17:17"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="LRADC0_IRQ_EN" bitrange="16:16"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="TOUCH_DETECT_IRQ" bitrange="8:8"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC7_IRQ" bitrange="7:7"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC6_IRQ" bitrange="6:6"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC5_IRQ" bitrange="5:5"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC4_IRQ" bitrange="4:4"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC3_IRQ" bitrange="3:3"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC2_IRQ" bitrange="2:2"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC1_IRQ" bitrange="1:1"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +<field name="LRADC0_IRQ" bitrange="0:0"> +<value name="CLEAR" value="0x0"> +</value> +<value name="PENDING" value="0x1"> +</value> +</field> +</reg> +<reg name="CTRL2" addr="0x20" sct="yes"> +<field name="DIVIDE_BY_TWO" bitrange="31:24"> +</field> +<field name="BL_AMP_BYPASS" bitrange="23:23"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="BL_ENABLE" bitrange="22:22"> +</field> +<field name="BL_MUX_SELECT" bitrange="21:21"> +</field> +<field name="BL_BRIGHTNESS" bitrange="20:16"> +</field> +<field name="TEMPSENSE_PWD" bitrange="15:15"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="EXT_EN1" bitrange="13:13"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="EXT_EN0" bitrange="12:12"> +</field> +<field name="TEMP_SENSOR_IENABLE1" bitrange="9:9"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="TEMP_SENSOR_IENABLE0" bitrange="8:8"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="TEMP_ISRC1" bitrange="7:4"> +<value name="300" value="0xf"> +</value> +<value name="280" value="0xe"> +</value> +<value name="260" value="0xd"> +</value> +<value name="240" value="0xc"> +</value> +<value name="220" value="0xb"> +</value> +<value name="200" value="0xa"> +</value> +<value name="180" value="0x9"> +</value> +<value name="160" value="0x8"> +</value> +<value name="140" value="0x7"> +</value> +<value name="120" value="0x6"> +</value> +<value name="100" value="0x5"> +</value> +<value name="80" value="0x4"> +</value> +<value name="60" value="0x3"> +</value> +<value name="40" value="0x2"> +</value> +<value name="20" value="0x1"> +</value> +<value name="ZERO" value="0x0"> +</value> +</field> +<field name="TEMP_ISRC0" bitrange="3:0"> +<value name="300" value="0xf"> +</value> +<value name="280" value="0xe"> +</value> +<value name="260" value="0xd"> +</value> +<value name="240" value="0xc"> +</value> +<value name="220" value="0xb"> +</value> +<value name="200" value="0xa"> +</value> +<value name="180" value="0x9"> +</value> +<value name="160" value="0x8"> +</value> +<value name="140" value="0x7"> +</value> +<value name="120" value="0x6"> +</value> +<value name="100" value="0x5"> +</value> +<value name="80" value="0x4"> +</value> +<value name="60" value="0x3"> +</value> +<value name="40" value="0x2"> +</value> +<value name="20" value="0x1"> +</value> +<value name="ZERO" value="0x0"> +</value> +</field> +</reg> +<reg name="CTRL3" addr="0x30" sct="yes"> +<field name="DISCARD" bitrange="25:24"> +<value name="1_SAMPLE" value="0x1"> +</value> +<value name="2_SAMPLES" value="0x2"> +</value> +<value name="3_SAMPLES" value="0x3"> +</value> +</field> +<field name="FORCE_ANALOG_PWUP" bitrange="23:23"> +<value name="OFF" value="0x0"> +</value> +<value name="ON" value="0x1"> +</value> +</field> +<field name="FORCE_ANALOG_PWDN" bitrange="22:22"> +<value name="ON" value="0x0"> +</value> +<value name="OFF" value="0x1"> +</value> +</field> +<field name="CYCLE_TIME" bitrange="9:8"> +<value name="6MHZ" value="0x0"> +</value> +<value name="4MHZ" value="0x1"> +</value> +<value name="3MHZ" value="0x2"> +</value> +<value name="2MHZ" value="0x3"> +</value> +</field> +<field name="HIGH_TIME" bitrange="5:4"> +<value name="42NS" value="0x0"> +</value> +<value name="83NS" value="0x1"> +</value> +<value name="125NS" value="0x2"> +</value> +<value name="250NS" value="0x3"> +</value> +</field> +<field name="DELAY_CLOCK" bitrange="1:1"> +<value name="NORMAL" value="0x0"> +</value> +<value name="DELAYED" value="0x1"> +</value> +</field> +<field name="INVERT_CLOCK" bitrange="0:0"> +<value name="NORMAL" value="0x0"> +</value> +<value name="INVERT" value="0x1"> +</value> +</field> +</reg> +<reg name="STATUS" addr="0x40" sct="no"> +<field name="TEMP1_PRESENT" bitrange="26:26"> +</field> +<field name="TEMP0_PRESENT" bitrange="25:25"> +</field> +<field name="TOUCH_PANEL_PRESENT" bitrange="24:24"> +</field> +<field name="CHANNEL7_PRESENT" bitrange="23:23"> +</field> +<field name="CHANNEL6_PRESENT" bitrange="22:22"> +</field> +<field name="CHANNEL5_PRESENT" bitrange="21:21"> +</field> +<field name="CHANNEL4_PRESENT" bitrange="20:20"> +</field> +<field name="CHANNEL3_PRESENT" bitrange="19:19"> +</field> +<field name="CHANNEL2_PRESENT" bitrange="18:18"> +</field> +<field name="CHANNEL1_PRESENT" bitrange="17:17"> +</field> +<field name="CHANNEL0_PRESENT" bitrange="16:16"> +</field> +<field name="TOUCH_DETECT_RAW" bitrange="0:0"> +<value name="OPEN" value="0x0"> +</value> +<value name="HIT" value="0x1"> +</value> +</field> +</reg> +<multireg name="CHn" base="0x50" count="5" offset="0x10" sct="SCT"> +<reg name="CH0" addr="0x50" index="0"> +</reg> +<reg name="CH1" addr="0x60" index="1"> +</reg> +<reg name="CH2" addr="0x70" index="2"> +</reg> +<reg name="CH3" addr="0x80" index="3"> +</reg> +<reg name="CH4" addr="0x90" index="4"> +</reg> +<reg name="CH5" addr="0xa0" index="5"> +</reg> +<field name="TOGGLE" bitrange="31:31"> +</field> +<field name="ACCUMULATE" bitrange="29:29"> +</field> +<field name="NUM_SAMPLES" bitrange="28:24"> +</field> +<field name="VALUE" bitrange="17:0"> +</field> +</multireg> +<reg name="CH6" addr="0xb0" sct="yes"> +<field name="TOGGLE" bitrange="31:31"> +</field> +<field name="ACCUMULATE" bitrange="29:29"> +</field> +<field name="NUM_SAMPLES" bitrange="28:24"> +</field> +<field name="VALUE" bitrange="17:0"> +</field> +</reg> +<reg name="CH7" addr="0xc0" sct="yes"> +<field name="TOGGLE" bitrange="31:31"> +</field> +<field name="TESTMODE_TOGGLE" bitrange="30:30"> +</field> +<field name="ACCUMULATE" bitrange="29:29"> +</field> +<field name="NUM_SAMPLES" bitrange="28:24"> +</field> +<field name="VALUE" bitrange="17:0"> +</field> +</reg> +<multireg name="DELAYn" base="0xd0" count="3" offset="0x10" sct="SCT"> +<reg name="DELAY0" addr="0xd0" index="0"> +</reg> +<reg name="DELAY1" addr="0xe0" index="1"> +</reg> +<reg name="DELAY2" addr="0xf0" index="2"> +</reg> +<reg name="DELAY3" addr="0x100" index="3"> +</reg> +<field name="TRIGGER_LRADCS" bitrange="31:24"> +</field> +<field name="KICK" bitrange="20:20"> +</field> +<field name="TRIGGER_DELAYS" bitrange="19:16"> +</field> +<field name="LOOP_COUNT" bitrange="15:11"> +</field> +<field name="DELAY" bitrange="10:0"> +</field> +</multireg> +<reg name="DEBUG0" addr="0x110" sct="no"> +<field name="READONLY" bitrange="31:16"> +</field> +<field name="STATE" bitrange="11:0"> +</field> +</reg> +<reg name="DEBUG1" addr="0x120" sct="yes"> +<field name="REQUEST" bitrange="23:16"> +</field> +<field name="TESTMODE_COUNT" bitrange="12:8"> +</field> +<field name="TESTMODE6" bitrange="2:2"> +<value name="NORMAL" value="0x0"> +</value> +<value name="TEST" value="0x1"> +</value> +</field> +<field name="TESTMODE5" bitrange="1:1"> +<value name="NORMAL" value="0x0"> +</value> +<value name="TEST" value="0x1"> +</value> +</field> +<field name="TESTMODE" bitrange="0:0"> +<value name="NORMAL" value="0x0"> +</value> +<value name="TEST" value="0x1"> +</value> +</field> +</reg> +<reg name="CONVERSION" addr="0x130" sct="yes"> +<field name="AUTOMATIC" bitrange="20:20"> +<value name="DISABLE" value="0x0"> +</value> +<value name="ENABLE" value="0x1"> +</value> +</field> +<field name="SCALE_FACTOR" bitrange="17:16"> +<value name="NIMH" value="0x0"> +</value> +<value name="DUAL_NIMH" value="0x1"> +</value> +<value name="LI_ION" value="0x2"> +</value> +<value name="ALT_LI_ION" value="0x3"> +</value> +</field> +<field name="SCALED_BATT_VOLTAGE" bitrange="9:0"> +</field> +</reg> +<reg name="CTRL4" addr="0x140" sct="yes"> +<field name="LRADC7SELECT" bitrange="31:28"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC6SELECT" bitrange="27:24"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC5SELECT" bitrange="23:20"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC4SELECT" bitrange="19:16"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC3SELECT" bitrange="15:12"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC2SELECT" bitrange="11:8"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC1SELECT" bitrange="7:4"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +<field name="LRADC0SELECT" bitrange="3:0"> +<value name="CHANNEL0" value="0x0"> +</value> +<value name="CHANNEL1" value="0x1"> +</value> +<value name="CHANNEL2" value="0x2"> +</value> +<value name="CHANNEL3" value="0x3"> +</value> +<value name="CHANNEL4" value="0x4"> +</value> +<value name="CHANNEL5" value="0x5"> +</value> +<value name="CHANNEL6" value="0x6"> +</value> +<value name="CHANNEL7" value="0x7"> +</value> +<value name="CHANNEL8" value="0x8"> +</value> +<value name="CHANNEL9" value="0x9"> +</value> +<value name="CHANNEL10" value="0xa"> +</value> +<value name="CHANNEL11" value="0xb"> +</value> +<value name="CHANNEL12" value="0xc"> +</value> +<value name="CHANNEL13" value="0xd"> +</value> +<value name="CHANNEL14" value="0xe"> +</value> +<value name="CHANNEL15" value="0xf"> +</value> +</field> +</reg> +<reg name="VERSION" addr="0x150" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="OCOTP" addr="0x8002c000" long_name="One-time Programmable Array Controller" desc="On-Chip OTP (OCOTP) Controller"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="WR_UNLOCK" bitrange="31:16"> +<value name="KEY" value="0x3e77"> +</value> +</field> +<field name="RELOAD_SHADOWS" bitrange="13:13"> +</field> +<field name="RD_BANK_OPEN" bitrange="12:12"> +</field> +<field name="ERROR" bitrange="9:9"> +</field> +<field name="BUSY" bitrange="8:8"> +</field> +<field name="ADDR" bitrange="4:0"> +</field> +</reg> +<reg name="DATA" addr="0x10" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<multireg name="CUSTn" base="0x20" count="3" offset="0x10" sct=""> +<reg name="CUST0" addr="0x20" index="0"> +</reg> +<reg name="CUST1" addr="0x30" index="1"> +</reg> +<reg name="CUST2" addr="0x40" index="2"> +</reg> +<reg name="CUST3" addr="0x50" index="3"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<multireg name="CRYPTOn" base="0x60" count="3" offset="0x10" sct=""> +<reg name="CRYPTO0" addr="0x60" index="0"> +</reg> +<reg name="CRYPTO1" addr="0x70" index="1"> +</reg> +<reg name="CRYPTO2" addr="0x80" index="2"> +</reg> +<reg name="CRYPTO3" addr="0x90" index="3"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<multireg name="HWCAPn" base="0xa0" count="5" offset="0x10" sct=""> +<reg name="HWCAP0" addr="0xa0" index="0"> +</reg> +<reg name="HWCAP1" addr="0xb0" index="1"> +</reg> +<reg name="HWCAP2" addr="0xc0" index="2"> +</reg> +<reg name="HWCAP3" addr="0xd0" index="3"> +</reg> +<reg name="HWCAP4" addr="0xe0" index="4"> +</reg> +<reg name="HWCAP5" addr="0xf0" index="5"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<reg name="SWCAP" addr="0x100" sct="no"> +<field name="BITS" bitrange="31:0"> +</field> +</reg> +<reg name="CUSTCAP" addr="0x110" sct="no"> +<field name="BITS" bitrange="31:0"> +</field> +</reg> +<reg name="LOCK" addr="0x120" sct="no"> +<field name="ROM7" bitrange="31:31"> +</field> +<field name="ROM6" bitrange="30:30"> +</field> +<field name="ROM5" bitrange="29:29"> +</field> +<field name="ROM4" bitrange="28:28"> +</field> +<field name="ROM3" bitrange="27:27"> +</field> +<field name="ROM2" bitrange="26:26"> +</field> +<field name="ROM1" bitrange="25:25"> +</field> +<field name="ROM0" bitrange="24:24"> +</field> +<field name="HWSW_SHADOW_ALT" bitrange="23:23"> +</field> +<field name="CRYPTODCP_ALT" bitrange="22:22"> +</field> +<field name="CRYPTOKEY_ALT" bitrange="21:21"> +</field> +<field name="PIN" bitrange="20:20"> +</field> +<field name="OPS" bitrange="19:19"> +</field> +<field name="UN2" bitrange="18:18"> +</field> +<field name="UN1" bitrange="17:17"> +</field> +<field name="UN0" bitrange="16:16"> +</field> +<field name="UNALLOCATED" bitrange="15:10"> +</field> +<field name="CUSTCAP" bitrange="9:9"> +</field> +<field name="HWSW" bitrange="8:8"> +</field> +<field name="CUSTCAP_SHADOW" bitrange="7:7"> +</field> +<field name="HWSW_SHADOW" bitrange="6:6"> +</field> +<field name="CRYPTODCP" bitrange="5:5"> +</field> +<field name="CRYPTOKEY" bitrange="4:4"> +</field> +<field name="CUST3" bitrange="3:3"> +</field> +<field name="CUST2" bitrange="2:2"> +</field> +<field name="CUST1" bitrange="1:1"> +</field> +<field name="CUST0" bitrange="0:0"> +</field> +</reg> +<multireg name="OPSn" base="0x130" count="3" offset="0x10" sct=""> +<reg name="OPS0" addr="0x130" index="0"> +</reg> +<reg name="OPS1" addr="0x140" index="1"> +</reg> +<reg name="OPS2" addr="0x150" index="2"> +</reg> +<reg name="OPS3" addr="0x160" index="3"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<multireg name="UNn" base="0x170" count="2" offset="0x10" sct=""> +<reg name="UN0" addr="0x170" index="0"> +</reg> +<reg name="UN1" addr="0x180" index="1"> +</reg> +<reg name="UN2" addr="0x190" index="2"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<multireg name="ROMn" base="0x1a0" count="7" offset="0x10" sct=""> +<reg name="ROM0" addr="0x1a0" index="0"> +</reg> +<reg name="ROM1" addr="0x1b0" index="1"> +</reg> +<reg name="ROM2" addr="0x1c0" index="2"> +</reg> +<reg name="ROM3" addr="0x1d0" index="3"> +</reg> +<reg name="ROM4" addr="0x1e0" index="4"> +</reg> +<reg name="ROM5" addr="0x1f0" index="5"> +</reg> +<reg name="ROM6" addr="0x200" index="6"> +</reg> +<reg name="ROM7" addr="0x210" index="7"> +</reg> +<field name="BITS" bitrange="31:0"> +</field> +</multireg> +<reg name="VERSION" addr="0x220" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="PINCTRL" addr="0x80018000" long_name="Pin Control" desc="Pin Control and GPIO"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="PRESENT3" bitrange="29:29"> +</field> +<field name="PRESENT2" bitrange="28:28"> +</field> +<field name="PRESENT1" bitrange="27:27"> +</field> +<field name="PRESENT0" bitrange="26:26"> +</field> +<field name="IRQOUT3" bitrange="3:3"> +</field> +<field name="IRQOUT2" bitrange="2:2"> +</field> +<field name="IRQOUT1" bitrange="1:1"> +</field> +<field name="IRQOUT0" bitrange="0:0"> +</field> +</reg> +<reg name="MUXSEL0" addr="0x100" sct="yes"> +<field name="BANK0_PIN15" bitrange="31:30"> +</field> +<field name="BANK0_PIN14" bitrange="29:28"> +</field> +<field name="BANK0_PIN13" bitrange="27:26"> +</field> +<field name="BANK0_PIN12" bitrange="25:24"> +</field> +<field name="BANK0_PIN11" bitrange="23:22"> +</field> +<field name="BANK0_PIN10" bitrange="21:20"> +</field> +<field name="BANK0_PIN09" bitrange="19:18"> +</field> +<field name="BANK0_PIN08" bitrange="17:16"> +</field> +<field name="BANK0_PIN07" bitrange="15:14"> +</field> +<field name="BANK0_PIN06" bitrange="13:12"> +</field> +<field name="BANK0_PIN05" bitrange="11:10"> +</field> +<field name="BANK0_PIN04" bitrange="9:8"> +</field> +<field name="BANK0_PIN03" bitrange="7:6"> +</field> +<field name="BANK0_PIN02" bitrange="5:4"> +</field> +<field name="BANK0_PIN01" bitrange="3:2"> +</field> +<field name="BANK0_PIN00" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL1" addr="0x110" sct="yes"> +<field name="BANK0_PIN29" bitrange="27:26"> +</field> +<field name="BANK0_PIN28" bitrange="25:24"> +</field> +<field name="BANK0_PIN27" bitrange="23:22"> +</field> +<field name="BANK0_PIN26" bitrange="21:20"> +</field> +<field name="BANK0_PIN25" bitrange="19:18"> +</field> +<field name="BANK0_PIN24" bitrange="17:16"> +</field> +<field name="BANK0_PIN23" bitrange="15:14"> +</field> +<field name="BANK0_PIN22" bitrange="13:12"> +</field> +<field name="BANK0_PIN21" bitrange="11:10"> +</field> +<field name="BANK0_PIN20" bitrange="9:8"> +</field> +<field name="BANK0_PIN19" bitrange="7:6"> +</field> +<field name="BANK0_PIN18" bitrange="5:4"> +</field> +<field name="BANK0_PIN17" bitrange="3:2"> +</field> +<field name="BANK0_PIN16" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL2" addr="0x120" sct="yes"> +<field name="BANK1_PIN15" bitrange="31:30"> +</field> +<field name="BANK1_PIN14" bitrange="29:28"> +</field> +<field name="BANK1_PIN13" bitrange="27:26"> +</field> +<field name="BANK1_PIN12" bitrange="25:24"> +</field> +<field name="BANK1_PIN11" bitrange="23:22"> +</field> +<field name="BANK1_PIN10" bitrange="21:20"> +</field> +<field name="BANK1_PIN09" bitrange="19:18"> +</field> +<field name="BANK1_PIN08" bitrange="17:16"> +</field> +<field name="BANK1_PIN07" bitrange="15:14"> +</field> +<field name="BANK1_PIN06" bitrange="13:12"> +</field> +<field name="BANK1_PIN05" bitrange="11:10"> +</field> +<field name="BANK1_PIN04" bitrange="9:8"> +</field> +<field name="BANK1_PIN03" bitrange="7:6"> +</field> +<field name="BANK1_PIN02" bitrange="5:4"> +</field> +<field name="BANK1_PIN01" bitrange="3:2"> +</field> +<field name="BANK1_PIN00" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL3" addr="0x130" sct="yes"> +<field name="BANK1_PIN28" bitrange="25:24"> +</field> +<field name="BANK1_PIN27" bitrange="23:22"> +</field> +<field name="BANK1_PIN26" bitrange="21:20"> +</field> +<field name="BANK1_PIN25" bitrange="19:18"> +</field> +<field name="BANK1_PIN24" bitrange="17:16"> +</field> +<field name="BANK1_PIN23" bitrange="15:14"> +</field> +<field name="BANK1_PIN22" bitrange="13:12"> +</field> +<field name="BANK1_PIN21" bitrange="11:10"> +</field> +<field name="BANK1_PIN20" bitrange="9:8"> +</field> +<field name="BANK1_PIN19" bitrange="7:6"> +</field> +<field name="BANK1_PIN18" bitrange="5:4"> +</field> +<field name="BANK1_PIN17" bitrange="3:2"> +</field> +<field name="BANK1_PIN16" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL4" addr="0x140" sct="yes"> +<field name="BANK2_PIN15" bitrange="31:30"> +</field> +<field name="BANK2_PIN14" bitrange="29:28"> +</field> +<field name="BANK2_PIN13" bitrange="27:26"> +</field> +<field name="BANK2_PIN12" bitrange="25:24"> +</field> +<field name="BANK2_PIN11" bitrange="23:22"> +</field> +<field name="BANK2_PIN10" bitrange="21:20"> +</field> +<field name="BANK2_PIN09" bitrange="19:18"> +</field> +<field name="BANK2_PIN08" bitrange="17:16"> +</field> +<field name="BANK2_PIN07" bitrange="15:14"> +</field> +<field name="BANK2_PIN06" bitrange="13:12"> +</field> +<field name="BANK2_PIN05" bitrange="11:10"> +</field> +<field name="BANK2_PIN04" bitrange="9:8"> +</field> +<field name="BANK2_PIN03" bitrange="7:6"> +</field> +<field name="BANK2_PIN02" bitrange="5:4"> +</field> +<field name="BANK2_PIN01" bitrange="3:2"> +</field> +<field name="BANK2_PIN00" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL5" addr="0x150" sct="yes"> +<field name="BANK2_PIN31" bitrange="31:30"> +</field> +<field name="BANK2_PIN30" bitrange="29:28"> +</field> +<field name="BANK2_PIN29" bitrange="27:26"> +</field> +<field name="BANK2_PIN28" bitrange="25:24"> +</field> +<field name="BANK2_PIN27" bitrange="23:22"> +</field> +<field name="BANK2_PIN26" bitrange="21:20"> +</field> +<field name="BANK2_PIN25" bitrange="19:18"> +</field> +<field name="BANK2_PIN24" bitrange="17:16"> +</field> +<field name="BANK2_PIN23" bitrange="15:14"> +</field> +<field name="BANK2_PIN22" bitrange="13:12"> +</field> +<field name="BANK2_PIN21" bitrange="11:10"> +</field> +<field name="BANK2_PIN20" bitrange="9:8"> +</field> +<field name="BANK2_PIN19" bitrange="7:6"> +</field> +<field name="BANK2_PIN18" bitrange="5:4"> +</field> +<field name="BANK2_PIN17" bitrange="3:2"> +</field> +<field name="BANK2_PIN16" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL6" addr="0x160" sct="yes"> +<field name="BANK3_PIN15" bitrange="31:30"> +</field> +<field name="BANK3_PIN14" bitrange="29:28"> +</field> +<field name="BANK3_PIN13" bitrange="27:26"> +</field> +<field name="BANK3_PIN12" bitrange="25:24"> +</field> +<field name="BANK3_PIN11" bitrange="23:22"> +</field> +<field name="BANK3_PIN10" bitrange="21:20"> +</field> +<field name="BANK3_PIN09" bitrange="19:18"> +</field> +<field name="BANK3_PIN08" bitrange="17:16"> +</field> +<field name="BANK3_PIN07" bitrange="15:14"> +</field> +<field name="BANK3_PIN06" bitrange="13:12"> +</field> +<field name="BANK3_PIN05" bitrange="11:10"> +</field> +<field name="BANK3_PIN04" bitrange="9:8"> +</field> +<field name="BANK3_PIN03" bitrange="7:6"> +</field> +<field name="BANK3_PIN02" bitrange="5:4"> +</field> +<field name="BANK3_PIN01" bitrange="3:2"> +</field> +<field name="BANK3_PIN00" bitrange="1:0"> +</field> +</reg> +<reg name="MUXSEL7" addr="0x170" sct="yes"> +<field name="BANK3_PIN21" bitrange="11:10"> +</field> +<field name="BANK3_PIN20" bitrange="9:8"> +</field> +<field name="BANK3_PIN19" bitrange="7:6"> +</field> +<field name="BANK3_PIN18" bitrange="5:4"> +</field> +<field name="BANK3_PIN17" bitrange="3:2"> +</field> +<field name="BANK3_PIN16" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE0" addr="0x200" sct="yes"> +<field name="BANK0_PIN07_V" bitrange="30:30"> +</field> +<field name="BANK0_PIN07_MA" bitrange="29:28"> +</field> +<field name="BANK0_PIN06_V" bitrange="26:26"> +</field> +<field name="BANK0_PIN06_MA" bitrange="25:24"> +</field> +<field name="BANK0_PIN05_V" bitrange="22:22"> +</field> +<field name="BANK0_PIN05_MA" bitrange="21:20"> +</field> +<field name="BANK0_PIN04_V" bitrange="18:18"> +</field> +<field name="BANK0_PIN04_MA" bitrange="17:16"> +</field> +<field name="BANK0_PIN03_V" bitrange="14:14"> +</field> +<field name="BANK0_PIN03_MA" bitrange="13:12"> +</field> +<field name="BANK0_PIN02_V" bitrange="10:10"> +</field> +<field name="BANK0_PIN02_MA" bitrange="9:8"> +</field> +<field name="BANK0_PIN01_V" bitrange="6:6"> +</field> +<field name="BANK0_PIN01_MA" bitrange="5:4"> +</field> +<field name="BANK0_PIN00_V" bitrange="2:2"> +</field> +<field name="BANK0_PIN00_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE1" addr="0x210" sct="yes"> +<field name="BANK0_PIN15_V" bitrange="30:30"> +</field> +<field name="BANK0_PIN15_MA" bitrange="29:28"> +</field> +<field name="BANK0_PIN14_V" bitrange="26:26"> +</field> +<field name="BANK0_PIN14_MA" bitrange="25:24"> +</field> +<field name="BANK0_PIN13_V" bitrange="22:22"> +</field> +<field name="BANK0_PIN13_MA" bitrange="21:20"> +</field> +<field name="BANK0_PIN12_V" bitrange="18:18"> +</field> +<field name="BANK0_PIN12_MA" bitrange="17:16"> +</field> +<field name="BANK0_PIN11_V" bitrange="14:14"> +</field> +<field name="BANK0_PIN11_MA" bitrange="13:12"> +</field> +<field name="BANK0_PIN10_V" bitrange="10:10"> +</field> +<field name="BANK0_PIN10_MA" bitrange="9:8"> +</field> +<field name="BANK0_PIN09_V" bitrange="6:6"> +</field> +<field name="BANK0_PIN09_MA" bitrange="5:4"> +</field> +<field name="BANK0_PIN08_V" bitrange="2:2"> +</field> +<field name="BANK0_PIN08_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE2" addr="0x220" sct="yes"> +<field name="BANK0_PIN23_V" bitrange="30:30"> +</field> +<field name="BANK0_PIN23_MA" bitrange="29:28"> +</field> +<field name="BANK0_PIN22_V" bitrange="26:26"> +</field> +<field name="BANK0_PIN22_MA" bitrange="25:24"> +</field> +<field name="BANK0_PIN21_V" bitrange="22:22"> +</field> +<field name="BANK0_PIN21_MA" bitrange="21:20"> +</field> +<field name="BANK0_PIN20_V" bitrange="18:18"> +</field> +<field name="BANK0_PIN20_MA" bitrange="17:16"> +</field> +<field name="BANK0_PIN19_V" bitrange="14:14"> +</field> +<field name="BANK0_PIN19_MA" bitrange="13:12"> +</field> +<field name="BANK0_PIN18_V" bitrange="10:10"> +</field> +<field name="BANK0_PIN18_MA" bitrange="9:8"> +</field> +<field name="BANK0_PIN17_V" bitrange="6:6"> +</field> +<field name="BANK0_PIN17_MA" bitrange="5:4"> +</field> +<field name="BANK0_PIN16_V" bitrange="2:2"> +</field> +<field name="BANK0_PIN16_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE3" addr="0x230" sct="yes"> +<field name="BANK0_PIN29_V" bitrange="22:22"> +</field> +<field name="BANK0_PIN29_MA" bitrange="21:20"> +</field> +<field name="BANK0_PIN28_V" bitrange="18:18"> +</field> +<field name="BANK0_PIN28_MA" bitrange="17:16"> +</field> +<field name="BANK0_PIN27_V" bitrange="14:14"> +</field> +<field name="BANK0_PIN27_MA" bitrange="13:12"> +</field> +<field name="BANK0_PIN26_V" bitrange="10:10"> +</field> +<field name="BANK0_PIN26_MA" bitrange="9:8"> +</field> +<field name="BANK0_PIN25_V" bitrange="6:6"> +</field> +<field name="BANK0_PIN25_MA" bitrange="5:4"> +</field> +<field name="BANK0_PIN24_V" bitrange="2:2"> +</field> +<field name="BANK0_PIN24_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE4" addr="0x240" sct="yes"> +<field name="BANK1_PIN07_V" bitrange="30:30"> +</field> +<field name="BANK1_PIN07_MA" bitrange="29:28"> +</field> +<field name="BANK1_PIN06_V" bitrange="26:26"> +</field> +<field name="BANK1_PIN06_MA" bitrange="25:24"> +</field> +<field name="BANK1_PIN05_V" bitrange="22:22"> +</field> +<field name="BANK1_PIN05_MA" bitrange="21:20"> +</field> +<field name="BANK1_PIN04_V" bitrange="18:18"> +</field> +<field name="BANK1_PIN04_MA" bitrange="17:16"> +</field> +<field name="BANK1_PIN03_V" bitrange="14:14"> +</field> +<field name="BANK1_PIN03_MA" bitrange="13:12"> +</field> +<field name="BANK1_PIN02_V" bitrange="10:10"> +</field> +<field name="BANK1_PIN02_MA" bitrange="9:8"> +</field> +<field name="BANK1_PIN01_V" bitrange="6:6"> +</field> +<field name="BANK1_PIN01_MA" bitrange="5:4"> +</field> +<field name="BANK1_PIN00_V" bitrange="2:2"> +</field> +<field name="BANK1_PIN00_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE5" addr="0x250" sct="yes"> +<field name="BANK1_PIN15_V" bitrange="30:30"> +</field> +<field name="BANK1_PIN15_MA" bitrange="29:28"> +</field> +<field name="BANK1_PIN14_V" bitrange="26:26"> +</field> +<field name="BANK1_PIN14_MA" bitrange="25:24"> +</field> +<field name="BANK1_PIN13_V" bitrange="22:22"> +</field> +<field name="BANK1_PIN13_MA" bitrange="21:20"> +</field> +<field name="BANK1_PIN12_V" bitrange="18:18"> +</field> +<field name="BANK1_PIN12_MA" bitrange="17:16"> +</field> +<field name="BANK1_PIN11_V" bitrange="14:14"> +</field> +<field name="BANK1_PIN11_MA" bitrange="13:12"> +</field> +<field name="BANK1_PIN10_V" bitrange="10:10"> +</field> +<field name="BANK1_PIN10_MA" bitrange="9:8"> +</field> +<field name="BANK1_PIN09_V" bitrange="6:6"> +</field> +<field name="BANK1_PIN09_MA" bitrange="5:4"> +</field> +<field name="BANK1_PIN08_V" bitrange="2:2"> +</field> +<field name="BANK1_PIN08_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE6" addr="0x260" sct="yes"> +<field name="BANK1_PIN23_V" bitrange="30:30"> +</field> +<field name="BANK1_PIN23_MA" bitrange="29:28"> +</field> +<field name="BANK1_PIN22_V" bitrange="26:26"> +</field> +<field name="BANK1_PIN22_MA" bitrange="25:24"> +</field> +<field name="BANK1_PIN21_V" bitrange="22:22"> +</field> +<field name="BANK1_PIN21_MA" bitrange="21:20"> +</field> +<field name="BANK1_PIN20_V" bitrange="18:18"> +</field> +<field name="BANK1_PIN20_MA" bitrange="17:16"> +</field> +<field name="BANK1_PIN19_V" bitrange="14:14"> +</field> +<field name="BANK1_PIN19_MA" bitrange="13:12"> +</field> +<field name="BANK1_PIN18_V" bitrange="10:10"> +</field> +<field name="BANK1_PIN18_MA" bitrange="9:8"> +</field> +<field name="BANK1_PIN17_V" bitrange="6:6"> +</field> +<field name="BANK1_PIN17_MA" bitrange="5:4"> +</field> +<field name="BANK1_PIN16_V" bitrange="2:2"> +</field> +<field name="BANK1_PIN16_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE7" addr="0x270" sct="yes"> +<field name="BANK1_PIN28_V" bitrange="18:18"> +</field> +<field name="BANK1_PIN28_MA" bitrange="17:16"> +</field> +<field name="BANK1_PIN27_V" bitrange="14:14"> +</field> +<field name="BANK1_PIN27_MA" bitrange="13:12"> +</field> +<field name="BANK1_PIN26_V" bitrange="10:10"> +</field> +<field name="BANK1_PIN26_MA" bitrange="9:8"> +</field> +<field name="BANK1_PIN25_V" bitrange="6:6"> +</field> +<field name="BANK1_PIN25_MA" bitrange="5:4"> +</field> +<field name="BANK1_PIN24_V" bitrange="2:2"> +</field> +<field name="BANK1_PIN24_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE8" addr="0x280" sct="yes"> +<field name="BANK2_PIN07_V" bitrange="30:30"> +</field> +<field name="BANK2_PIN07_MA" bitrange="29:28"> +</field> +<field name="BANK2_PIN06_V" bitrange="26:26"> +</field> +<field name="BANK2_PIN06_MA" bitrange="25:24"> +</field> +<field name="BANK2_PIN05_V" bitrange="22:22"> +</field> +<field name="BANK2_PIN05_MA" bitrange="21:20"> +</field> +<field name="BANK2_PIN04_V" bitrange="18:18"> +</field> +<field name="BANK2_PIN04_MA" bitrange="17:16"> +</field> +<field name="BANK2_PIN03_V" bitrange="14:14"> +</field> +<field name="BANK2_PIN03_MA" bitrange="13:12"> +</field> +<field name="BANK2_PIN02_V" bitrange="10:10"> +</field> +<field name="BANK2_PIN02_MA" bitrange="9:8"> +</field> +<field name="BANK2_PIN01_V" bitrange="6:6"> +</field> +<field name="BANK2_PIN01_MA" bitrange="5:4"> +</field> +<field name="BANK2_PIN00_V" bitrange="2:2"> +</field> +<field name="BANK2_PIN00_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE9" addr="0x290" sct="yes"> +<field name="BANK2_PIN15_V" bitrange="30:30"> +</field> +<field name="BANK2_PIN15_MA" bitrange="29:28"> +</field> +<field name="BANK2_PIN14_V" bitrange="26:26"> +</field> +<field name="BANK2_PIN14_MA" bitrange="25:24"> +</field> +<field name="BANK2_PIN13_V" bitrange="22:22"> +</field> +<field name="BANK2_PIN13_MA" bitrange="21:20"> +</field> +<field name="BANK2_PIN12_V" bitrange="18:18"> +</field> +<field name="BANK2_PIN12_MA" bitrange="17:16"> +</field> +<field name="BANK2_PIN11_V" bitrange="14:14"> +</field> +<field name="BANK2_PIN11_MA" bitrange="13:12"> +</field> +<field name="BANK2_PIN10_V" bitrange="10:10"> +</field> +<field name="BANK2_PIN10_MA" bitrange="9:8"> +</field> +<field name="BANK2_PIN09_V" bitrange="6:6"> +</field> +<field name="BANK2_PIN09_MA" bitrange="5:4"> +</field> +<field name="BANK2_PIN08_V" bitrange="2:2"> +</field> +<field name="BANK2_PIN08_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE10" addr="0x2a0" sct="yes"> +<field name="BANK2_PIN23_V" bitrange="30:30"> +</field> +<field name="BANK2_PIN23_MA" bitrange="29:28"> +</field> +<field name="BANK2_PIN22_V" bitrange="26:26"> +</field> +<field name="BANK2_PIN22_MA" bitrange="25:24"> +</field> +<field name="BANK2_PIN21_V" bitrange="22:22"> +</field> +<field name="BANK2_PIN21_MA" bitrange="21:20"> +</field> +<field name="BANK2_PIN20_V" bitrange="18:18"> +</field> +<field name="BANK2_PIN20_MA" bitrange="17:16"> +</field> +<field name="BANK2_PIN19_V" bitrange="14:14"> +</field> +<field name="BANK2_PIN19_MA" bitrange="13:12"> +</field> +<field name="BANK2_PIN18_V" bitrange="10:10"> +</field> +<field name="BANK2_PIN18_MA" bitrange="9:8"> +</field> +<field name="BANK2_PIN17_V" bitrange="6:6"> +</field> +<field name="BANK2_PIN17_MA" bitrange="5:4"> +</field> +<field name="BANK2_PIN16_V" bitrange="2:2"> +</field> +<field name="BANK2_PIN16_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE11" addr="0x2b0" sct="yes"> +<field name="BANK2_PIN31_V" bitrange="30:30"> +</field> +<field name="BANK2_PIN31_MA" bitrange="29:28"> +</field> +<field name="BANK2_PIN30_V" bitrange="26:26"> +</field> +<field name="BANK2_PIN30_MA" bitrange="25:24"> +</field> +<field name="BANK2_PIN29_V" bitrange="22:22"> +</field> +<field name="BANK2_PIN29_MA" bitrange="21:20"> +</field> +<field name="BANK2_PIN28_V" bitrange="18:18"> +</field> +<field name="BANK2_PIN28_MA" bitrange="17:16"> +</field> +<field name="BANK2_PIN27_V" bitrange="14:14"> +</field> +<field name="BANK2_PIN27_MA" bitrange="13:12"> +</field> +<field name="BANK2_PIN26_V" bitrange="10:10"> +</field> +<field name="BANK2_PIN26_MA" bitrange="9:8"> +</field> +<field name="BANK2_PIN25_V" bitrange="6:6"> +</field> +<field name="BANK2_PIN25_MA" bitrange="5:4"> +</field> +<field name="BANK2_PIN24_V" bitrange="2:2"> +</field> +<field name="BANK2_PIN24_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE12" addr="0x2c0" sct="yes"> +<field name="BANK3_PIN07_V" bitrange="30:30"> +</field> +<field name="BANK3_PIN07_MA" bitrange="29:28"> +</field> +<field name="BANK3_PIN06_V" bitrange="26:26"> +</field> +<field name="BANK3_PIN06_MA" bitrange="25:24"> +</field> +<field name="BANK3_PIN05_V" bitrange="22:22"> +</field> +<field name="BANK3_PIN05_MA" bitrange="21:20"> +</field> +<field name="BANK3_PIN04_V" bitrange="18:18"> +</field> +<field name="BANK3_PIN04_MA" bitrange="17:16"> +</field> +<field name="BANK3_PIN03_V" bitrange="14:14"> +</field> +<field name="BANK3_PIN03_MA" bitrange="13:12"> +</field> +<field name="BANK3_PIN02_V" bitrange="10:10"> +</field> +<field name="BANK3_PIN02_MA" bitrange="9:8"> +</field> +<field name="BANK3_PIN01_V" bitrange="6:6"> +</field> +<field name="BANK3_PIN01_MA" bitrange="5:4"> +</field> +<field name="BANK3_PIN00_V" bitrange="2:2"> +</field> +<field name="BANK3_PIN00_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE13" addr="0x2d0" sct="yes"> +<field name="BANK3_PIN15_V" bitrange="30:30"> +</field> +<field name="BANK3_PIN15_MA" bitrange="29:28"> +</field> +<field name="BANK3_PIN14_V" bitrange="26:26"> +</field> +<field name="BANK3_PIN14_MA" bitrange="25:24"> +</field> +<field name="BANK3_PIN13_V" bitrange="22:22"> +</field> +<field name="BANK3_PIN13_MA" bitrange="21:20"> +</field> +<field name="BANK3_PIN12_V" bitrange="18:18"> +</field> +<field name="BANK3_PIN12_MA" bitrange="17:16"> +</field> +<field name="BANK3_PIN11_V" bitrange="14:14"> +</field> +<field name="BANK3_PIN11_MA" bitrange="13:12"> +</field> +<field name="BANK3_PIN10_V" bitrange="10:10"> +</field> +<field name="BANK3_PIN10_MA" bitrange="9:8"> +</field> +<field name="BANK3_PIN09_V" bitrange="6:6"> +</field> +<field name="BANK3_PIN09_MA" bitrange="5:4"> +</field> +<field name="BANK3_PIN08_V" bitrange="2:2"> +</field> +<field name="BANK3_PIN08_MA" bitrange="1:0"> +</field> +</reg> +<reg name="DRIVE14" addr="0x2e0" sct="yes"> +<field name="BANK3_PIN21_V" bitrange="22:22"> +</field> +<field name="BANK3_PIN21_MA" bitrange="21:20"> +</field> +<field name="BANK3_PIN20_V" bitrange="18:18"> +</field> +<field name="BANK3_PIN20_MA" bitrange="17:16"> +</field> +<field name="BANK3_PIN19_V" bitrange="14:14"> +</field> +<field name="BANK3_PIN19_MA" bitrange="13:12"> +</field> +<field name="BANK3_PIN18_V" bitrange="10:10"> +</field> +<field name="BANK3_PIN18_MA" bitrange="9:8"> +</field> +<field name="BANK3_PIN17_V" bitrange="6:6"> +</field> +<field name="BANK3_PIN17_MA" bitrange="5:4"> +</field> +<field name="BANK3_PIN16_V" bitrange="2:2"> +</field> +<field name="BANK3_PIN16_MA" bitrange="1:0"> +</field> +</reg> +<reg name="PULL0" addr="0x300" sct="yes"> +<field name="BANK0_PIN29" bitrange="29:29"> +</field> +<field name="BANK0_PIN28" bitrange="28:28"> +</field> +<field name="BANK0_PIN27" bitrange="27:27"> +</field> +<field name="BANK0_PIN26" bitrange="26:26"> +</field> +<field name="BANK0_PIN20" bitrange="20:20"> +</field> +<field name="BANK0_PIN07" bitrange="7:7"> +</field> +<field name="BANK0_PIN06" bitrange="6:6"> +</field> +<field name="BANK0_PIN05" bitrange="5:5"> +</field> +<field name="BANK0_PIN04" bitrange="4:4"> +</field> +<field name="BANK0_PIN03" bitrange="3:3"> +</field> +<field name="BANK0_PIN02" bitrange="2:2"> +</field> +<field name="BANK0_PIN01" bitrange="1:1"> +</field> +</reg> +<reg name="PULL1" addr="0x310" sct="yes"> +<field name="BANK1_PIN27" bitrange="27:27"> +</field> +<field name="BANK1_PIN26" bitrange="26:26"> +</field> +<field name="BANK1_PIN25" bitrange="25:25"> +</field> +<field name="BANK1_PIN24" bitrange="24:24"> +</field> +<field name="BANK1_PIN22" bitrange="22:22"> +</field> +</reg> +<reg name="PULL2" addr="0x320" sct="yes"> +<field name="BANK2_PIN14" bitrange="14:14"> +</field> +</reg> +<reg name="PULL3" addr="0x330" sct="yes"> +<field name="BANK3_PIN17" bitrange="17:17"> +</field> +<field name="BANK3_PIN16" bitrange="16:16"> +</field> +<field name="BANK3_PIN15" bitrange="15:15"> +</field> +<field name="BANK3_PIN14" bitrange="14:14"> +</field> +<field name="BANK3_PIN13" bitrange="13:13"> +</field> +<field name="BANK3_PIN12" bitrange="12:12"> +</field> +<field name="BANK3_PIN11" bitrange="11:11"> +</field> +<field name="BANK3_PIN10" bitrange="10:10"> +</field> +<field name="BANK3_PIN09" bitrange="9:9"> +</field> +<field name="BANK3_PIN08" bitrange="8:8"> +</field> +<field name="BANK3_PIN07" bitrange="7:7"> +</field> +<field name="BANK3_PIN06" bitrange="6:6"> +</field> +<field name="BANK3_PIN05" bitrange="5:5"> +</field> +<field name="BANK3_PIN04" bitrange="4:4"> +</field> +<field name="BANK3_PIN03" bitrange="3:3"> +</field> +<field name="BANK3_PIN02" bitrange="2:2"> +</field> +<field name="BANK3_PIN01" bitrange="1:1"> +</field> +<field name="BANK3_PIN00" bitrange="0:0"> +</field> +</reg> +<reg name="DOUT0" addr="0x400" sct="yes"> +<field name="DOUT" bitrange="29:0"> +</field> +</reg> +<reg name="DOUT1" addr="0x410" sct="yes"> +<field name="DOUT" bitrange="28:0"> +</field> +</reg> +<reg name="DOUT2" addr="0x420" sct="yes"> +<field name="DOUT" bitrange="31:0"> +</field> +</reg> +<reg name="DIN0" addr="0x500" sct="no"> +<field name="DIN" bitrange="29:0"> +</field> +</reg> +<reg name="DIN1" addr="0x510" sct="no"> +<field name="DIN" bitrange="28:0"> +</field> +</reg> +<reg name="DIN2" addr="0x520" sct="no"> +<field name="DIN" bitrange="31:0"> +</field> +</reg> +<reg name="DOE0" addr="0x600" sct="yes"> +<field name="DOE" bitrange="29:0"> +</field> +</reg> +<reg name="DOE1" addr="0x610" sct="yes"> +<field name="DOE" bitrange="28:0"> +</field> +</reg> +<reg name="DOE2" addr="0x620" sct="yes"> +<field name="DOE" bitrange="31:0"> +</field> +</reg> +<reg name="PIN2IRQ0" addr="0x700" sct="yes"> +<field name="PIN2IRQ" bitrange="29:0"> +</field> +</reg> +<reg name="PIN2IRQ1" addr="0x710" sct="yes"> +<field name="PIN2IRQ" bitrange="28:0"> +</field> +</reg> +<reg name="PIN2IRQ2" addr="0x720" sct="yes"> +<field name="PIN2IRQ" bitrange="31:0"> +</field> +</reg> +<reg name="IRQEN0" addr="0x800" sct="yes"> +<field name="IRQEN" bitrange="29:0"> +</field> +</reg> +<reg name="IRQEN1" addr="0x810" sct="yes"> +<field name="IRQEN" bitrange="28:0"> +</field> +</reg> +<reg name="IRQEN2" addr="0x820" sct="yes"> +<field name="IRQEN" bitrange="31:0"> +</field> +</reg> +<reg name="IRQLEVEL0" addr="0x900" sct="yes"> +<field name="IRQLEVEL" bitrange="29:0"> +</field> +</reg> +<reg name="IRQLEVEL1" addr="0x910" sct="yes"> +<field name="IRQLEVEL" bitrange="28:0"> +</field> +</reg> +<reg name="IRQLEVEL2" addr="0x920" sct="yes"> +<field name="IRQLEVEL" bitrange="31:0"> +</field> +</reg> +<reg name="IRQPOL0" addr="0xa00" sct="yes"> +<field name="IRQPOL" bitrange="29:0"> +</field> +</reg> +<reg name="IRQPOL1" addr="0xa10" sct="yes"> +<field name="IRQPOL" bitrange="28:0"> +</field> +</reg> +<reg name="IRQPOL2" addr="0xa20" sct="yes"> +<field name="IRQPOL" bitrange="31:0"> +</field> +</reg> +<reg name="IRQSTAT0" addr="0xb00" sct="yes"> +<field name="IRQSTAT" bitrange="29:0"> +</field> +</reg> +<reg name="IRQSTAT1" addr="0xb10" sct="yes"> +<field name="IRQSTAT" bitrange="28:0"> +</field> +</reg> +<reg name="IRQSTAT2" addr="0xb20" sct="yes"> +<field name="IRQSTAT" bitrange="31:0"> +</field> +</reg> +</dev> +<dev name="POWER" addr="0x80044000" long_name="Power Control" desc="Power Supply"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="PSWITCH_IRQ" bitrange="22:22"> +</field> +<field name="PSWITCH_IRQ_SRC" bitrange="21:21"> +</field> +<field name="POLARITY_PSWITCH" bitrange="20:20"> +</field> +<field name="ENIRQ_PSWITCH" bitrange="19:19"> +</field> +<field name="POLARITY_LINREG_OK" bitrange="18:18"> +</field> +<field name="LINREG_OK_IRQ" bitrange="17:17"> +</field> +<field name="ENIRQ_LINREG_OK" bitrange="16:16"> +</field> +<field name="DC_OK_IRQ" bitrange="15:15"> +</field> +<field name="ENIRQ_DC_OK" bitrange="14:14"> +</field> +<field name="BATT_BO_IRQ" bitrange="13:13"> +</field> +<field name="ENIRQBATT_BO" bitrange="12:12"> +</field> +<field name="VDDIO_BO_IRQ" bitrange="11:11"> +</field> +<field name="ENIRQ_VDDIO_BO" bitrange="10:10"> +</field> +<field name="VDDA_BO_IRQ" bitrange="9:9"> +</field> +<field name="ENIRQ_VDDA_BO" bitrange="8:8"> +</field> +<field name="VDDD_BO_IRQ" bitrange="7:7"> +</field> +<field name="ENIRQ_VDDD_BO" bitrange="6:6"> +</field> +<field name="POLARITY_VBUSVALID" bitrange="5:5"> +</field> +<field name="VBUSVALID_IRQ" bitrange="4:4"> +</field> +<field name="ENIRQ_VBUS_VALID" bitrange="3:3"> +</field> +<field name="POLARITY_VDD5V_GT_VDDIO" bitrange="2:2"> +</field> +<field name="VDD5V_GT_VDDIO_IRQ" bitrange="1:1"> +</field> +<field name="ENIRQ_VDD5V_GT_VDDIO" bitrange="0:0"> +</field> +</reg> +<reg name="5VCTRL" addr="0x10" sct="yes"> +<field name="VBUSVALID_TRSH" bitrange="11:10"> +</field> +<field name="PWDN_5VBRNOUT" bitrange="8:8"> +</field> +<field name="ENABLE_ILIMIT" bitrange="7:7"> +</field> +<field name="DCDC_XFER" bitrange="6:6"> +</field> +<field name="EN_BATT_PULLDN" bitrange="5:5"> +</field> +<field name="VBUSVALID_5VDETECT" bitrange="4:4"> +</field> +<field name="VBUSVALID_TO_B" bitrange="3:3"> +</field> +<field name="ILIMIT_EQ_ZERO" bitrange="2:2"> +</field> +<field name="OTG_PWRUP_CMPS" bitrange="1:1"> +</field> +<field name="ENABLE_DCDC" bitrange="0:0"> +</field> +</reg> +<reg name="MINPWR" addr="0x20" sct="yes"> +<field name="PWD_BO" bitrange="11:11"> +</field> +<field name="USB_I_SUSPEND" bitrange="10:10"> +</field> +<field name="ENABLE_OSC" bitrange="9:9"> +</field> +<field name="SELECT_OSC" bitrange="8:8"> +</field> +<field name="VBG_OFF" bitrange="7:7"> +</field> +<field name="DOUBLE_FETS" bitrange="6:6"> +</field> +<field name="HALF_FETS" bitrange="5:5"> +</field> +<field name="LESSANA_I" bitrange="4:4"> +</field> +<field name="PWD_XTAL24" bitrange="3:3"> +</field> +<field name="DC_STOPCLK" bitrange="2:2"> +</field> +<field name="EN_DC_PFM" bitrange="1:1"> +</field> +<field name="DC_HALFCLK" bitrange="0:0"> +</field> +</reg> +<reg name="CHARGE" addr="0x30" sct="yes"> +<field name="ENABLE_FAULT_DETECT" bitrange="20:20"> +</field> +<field name="CHRG_STS_OFF" bitrange="19:19"> +</field> +<field name="USE_EXTERN_R" bitrange="17:17"> +</field> +<field name="PWD_BATTCHRG" bitrange="16:16"> +</field> +<field name="STOP_ILIMIT" bitrange="11:8"> +</field> +<field name="BATTCHRG_I" bitrange="5:0"> +</field> +</reg> +<reg name="VDDDCTRL" addr="0x40" sct="no"> +<field name="ADJTN" bitrange="31:28"> +</field> +<field name="ALKALINE_CHARGE" bitrange="24:24"> +</field> +<field name="DISABLE_STEPPING" bitrange="23:23"> +</field> +<field name="LINREG_FROM_BATT" bitrange="22:22"> +</field> +<field name="ENABLE_LINREG" bitrange="21:21"> +</field> +<field name="DISABLE_FET" bitrange="20:20"> +</field> +<field name="LINREG_OFFSET" bitrange="17:16"> +</field> +<field name="BO_OFFSET" bitrange="10:8"> +</field> +<field name="TRG" bitrange="4:0"> +</field> +</reg> +<reg name="VDDACTRL" addr="0x50" sct="no"> +<field name="DISABLE_STEPPING" bitrange="18:18"> +</field> +<field name="ENABLE_LINREG" bitrange="17:17"> +</field> +<field name="DISABLE_FET" bitrange="16:16"> +</field> +<field name="LINREG_OFFSET" bitrange="13:12"> +</field> +<field name="BO_OFFSET" bitrange="10:8"> +</field> +<field name="TRG" bitrange="4:0"> +</field> +</reg> +<reg name="VDDIOCTRL" addr="0x60" sct="no"> +<field name="ADJTN" bitrange="19:16"> +</field> +<field name="DISABLE_STEPPING" bitrange="15:15"> +</field> +<field name="DISABLE_FET" bitrange="14:14"> +</field> +<field name="LINREG_OFFSET" bitrange="13:12"> +</field> +<field name="BO_OFFSET" bitrange="10:8"> +</field> +<field name="TRG" bitrange="4:0"> +</field> +</reg> +<reg name="DCFUNCV" addr="0x70" sct="no"> +<field name="VDDD" bitrange="25:16"> +</field> +<field name="VDDIO" bitrange="9:0"> +</field> +</reg> +<reg name="MISC" addr="0x80" sct="no"> +<field name="FREQSEL" bitrange="5:4"> +</field> +<field name="DELAY_TIMING" bitrange="3:3"> +</field> +<field name="TEST" bitrange="2:2"> +</field> +<field name="SEL_PLLCLK" bitrange="1:1"> +</field> +<field name="PERIPHERALSWOFF" bitrange="0:0"> +</field> +</reg> +<reg name="DCLIMITS" addr="0x90" sct="no"> +<field name="POSLIMIT_BOOST" bitrange="22:16"> +</field> +<field name="POSLIMIT_BUCK" bitrange="14:8"> +</field> +<field name="NEGLIMIT" bitrange="6:0"> +</field> +</reg> +<reg name="LOOPCTRL" addr="0xa0" sct="yes"> +<field name="TOGGLE_DIF" bitrange="20:20"> +</field> +<field name="HYST_SIGN" bitrange="19:19"> +</field> +<field name="EN_CM_HYST" bitrange="18:18"> +</field> +<field name="EN_DF_HYST" bitrange="17:17"> +</field> +<field name="CM_HYST_THRESH" bitrange="16:16"> +</field> +<field name="DF_HYST_THRESH" bitrange="15:15"> +</field> +<field name="RCSCALE_THRESH" bitrange="14:14"> +</field> +<field name="EN_RCSCALE" bitrange="13:12"> +</field> +<field name="DC_FF" bitrange="10:8"> +</field> +<field name="DC_R" bitrange="7:4"> +</field> +<field name="DC_C" bitrange="1:0"> +</field> +</reg> +<reg name="STS" addr="0xb0" sct="no"> +<field name="BATT_CHRG_PRESENT" bitrange="31:31"> +</field> +<field name="PSWITCH" bitrange="19:18"> +</field> +<field name="AVALID_STATUS" bitrange="17:17"> +</field> +<field name="BVALID_STATUS" bitrange="16:16"> +</field> +<field name="VBUSVALID_STATUS" bitrange="15:15"> +</field> +<field name="SESSEND_STATUS" bitrange="14:14"> +</field> +<field name="MODE" bitrange="13:13"> +</field> +<field name="BATT_BO" bitrange="12:12"> +</field> +<field name="VDD5V_FAULT" bitrange="11:11"> +</field> +<field name="CHRGSTS" bitrange="10:10"> +</field> +<field name="LINREG_OK" bitrange="9:9"> +</field> +<field name="DC_OK" bitrange="8:8"> +</field> +<field name="VDDIO_BO" bitrange="7:7"> +</field> +<field name="VDDA_BO" bitrange="6:6"> +</field> +<field name="VDDD_BO" bitrange="5:5"> +</field> +<field name="VDD5V_GT_VDDIO" bitrange="4:4"> +</field> +<field name="AVALID" bitrange="3:3"> +</field> +<field name="BVALID" bitrange="2:2"> +</field> +<field name="VBUSVALID" bitrange="1:1"> +</field> +<field name="SESSEND" bitrange="0:0"> +</field> +</reg> +<reg name="SPEED" addr="0xc0" sct="yes"> +<field name="STATUS" bitrange="23:16"> +</field> +<field name="CTRL" bitrange="1:0"> +</field> +</reg> +<reg name="BATTMONITOR" addr="0xd0" sct="no"> +<field name="BATT_VAL" bitrange="25:16"> +</field> +<field name="EN_BATADJ" bitrange="6:6"> +</field> +<field name="PWDN_BATTBRNOUT" bitrange="5:5"> +</field> +<field name="BRWNOUT_PWD" bitrange="4:4"> +</field> +<field name="BRWNOUT_LVL" bitrange="3:0"> +</field> +</reg> +<reg name="RESET" addr="0xe0" sct="yes"> +<field name="UNLOCK" bitrange="31:16"> +<value name="KEY" value="0x3e77"> +</value> +</field> +<field name="PWD_OFF" bitrange="1:1"> +</field> +<field name="PWD" bitrange="0:0"> +</field> +</reg> +<reg name="DEBUG" addr="0xf0" sct="yes"> +<field name="VBUSVALIDPIOLOCK" bitrange="3:3"> +</field> +<field name="AVALIDPIOLOCK" bitrange="2:2"> +</field> +<field name="BVALIDPIOLOCK" bitrange="1:1"> +</field> +<field name="SESSENDPIOLOCK" bitrange="0:0"> +</field> +</reg> +<reg name="SPECIAL" addr="0x100" sct="yes"> +<field name="TEST" bitrange="31:0"> +</field> +</reg> +<reg name="VERSION" addr="0x110" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="PWM" addr="0x80064000" long_name="Pulse width Modulation" desc="Pulse-Width Modulator (PWM) Controller"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="PWM4_PRESENT" bitrange="29:29"> +</field> +<field name="PWM3_PRESENT" bitrange="28:28"> +</field> +<field name="PWM2_PRESENT" bitrange="27:27"> +</field> +<field name="PWM1_PRESENT" bitrange="26:26"> +</field> +<field name="PWM0_PRESENT" bitrange="25:25"> +</field> +<field name="PWM2_ANA_CTRL_ENABLE" bitrange="5:5"> +</field> +<field name="PWM4_ENABLE" bitrange="4:4"> +</field> +<field name="PWM3_ENABLE" bitrange="3:3"> +</field> +<field name="PWM2_ENABLE" bitrange="2:2"> +</field> +<field name="PWM1_ENABLE" bitrange="1:1"> +</field> +<field name="PWM0_ENABLE" bitrange="0:0"> +</field> +</reg> +<multireg name="ACTIVEn" base="0x10" count="4" offset="0x20" sct="SCT"> +<reg name="ACTIVE0" addr="0x10" index="0"> +</reg> +<reg name="ACTIVE1" addr="0x30" index="1"> +</reg> +<reg name="ACTIVE2" addr="0x50" index="2"> +</reg> +<reg name="ACTIVE3" addr="0x70" index="3"> +</reg> +<reg name="ACTIVE4" addr="0x90" index="4"> +</reg> +<field name="INACTIVE" bitrange="31:16"> +</field> +<field name="ACTIVE" bitrange="15:0"> +</field> +</multireg> +<multireg name="PERIODn" base="0x20" count="4" offset="0x20" sct="SCT"> +<reg name="PERIOD0" addr="0x20" index="0"> +</reg> +<reg name="PERIOD1" addr="0x40" index="1"> +</reg> +<reg name="PERIOD2" addr="0x60" index="2"> +</reg> +<reg name="PERIOD3" addr="0x80" index="3"> +</reg> +<reg name="PERIOD4" addr="0xa0" index="4"> +</reg> +<field name="MATT" bitrange="23:23"> +</field> +<field name="CDIV" bitrange="22:20"> +<value name="DIV_1" value="0x0"> +</value> +<value name="DIV_2" value="0x1"> +</value> +<value name="DIV_4" value="0x2"> +</value> +<value name="DIV_8" value="0x3"> +</value> +<value name="DIV_16" value="0x4"> +</value> +<value name="DIV_64" value="0x5"> +</value> +<value name="DIV_256" value="0x6"> +</value> +<value name="DIV_1024" value="0x7"> +</value> +</field> +<field name="INACTIVE_STATE" bitrange="19:18"> +<value name="HI_Z" value="0x0"> +</value> +<value name="0" value="0x2"> +</value> +<value name="1" value="0x3"> +</value> +</field> +<field name="ACTIVE_STATE" bitrange="17:16"> +<value name="HI_Z" value="0x0"> +</value> +<value name="0" value="0x2"> +</value> +<value name="1" value="0x3"> +</value> +</field> +<field name="PERIOD" bitrange="15:0"> +</field> +</multireg> +<reg name="VERSION" addr="0xb0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<dev name="RTC" addr="0x8005c000" long_name="Real Time Clock" desc="Real-Time Clock, Alarm, Watchdog, Persistent Bits"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="SUPPRESS_COPY2ANALOG" bitrange="6:6"> +</field> +<field name="FORCE_UPDATE" bitrange="5:5"> +</field> +<field name="WATCHDOGEN" bitrange="4:4"> +</field> +<field name="ONEMSEC_IRQ" bitrange="3:3"> +</field> +<field name="ALARM_IRQ" bitrange="2:2"> +</field> +<field name="ONEMSEC_IRQ_EN" bitrange="1:1"> +</field> +<field name="ALARM_IRQ_EN" bitrange="0:0"> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="no"> +<field name="RTC_PRESENT" bitrange="31:31"> +</field> +<field name="ALARM_PRESENT" bitrange="30:30"> +</field> +<field name="WATCHDOG_PRESENT" bitrange="29:29"> +</field> +<field name="XTAL32000_PRESENT" bitrange="28:28"> +</field> +<field name="XTAL32768_PRESENT" bitrange="27:27"> +</field> +<field name="STALE_REGS" bitrange="23:16"> +</field> +<field name="NEW_REGS" bitrange="15:8"> +</field> +</reg> +<reg name="MILLISECONDS" addr="0x20" sct="yes"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="SECONDS" addr="0x30" sct="yes"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="ALARM" addr="0x40" sct="yes"> +<field name="VALUE" bitrange="31:0"> +</field> +</reg> +<reg name="WATCHDOG" addr="0x50" sct="yes"> +<field name="COUNT" bitrange="31:0"> +</field> +</reg> +<reg name="PERSISTENT0" addr="0x60" sct="yes"> +<field name="SPARE_ANALOG" bitrange="31:18"> +</field> +<field name="AUTO_RESTART" bitrange="17:17"> +</field> +<field name="DISABLE_PSWITCH" bitrange="16:16"> +</field> +<field name="LOWERBIAS" bitrange="15:14"> +</field> +<field name="DISABLE_XTALOK" bitrange="13:13"> +</field> +<field name="MSEC_RES" bitrange="12:8"> +</field> +<field name="ALARM_WAKE" bitrange="7:7"> +</field> +<field name="XTAL32_FREQ" bitrange="6:6"> +</field> +<field name="XTAL32KHZ_PWRUP" bitrange="5:5"> +</field> +<field name="XTAL24MHZ_PWRUP" bitrange="4:4"> +</field> +<field name="LCK_SECS" bitrange="3:3"> +</field> +<field name="ALARM_EN" bitrange="2:2"> +</field> +<field name="ALARM_WAKE_EN" bitrange="1:1"> +</field> +<field name="CLOCKSOURCE" bitrange="0:0"> +</field> +</reg> +<reg name="PERSISTENT1" addr="0x70" sct="yes"> +<field name="GENERAL" bitrange="31:0"> +<value name="SPARE3" value="0x4000"> +</value> +<value name="SDRAM_BOOT" value="0x2000"> +</value> +<value name="ENUMERATE_500MA_TWICE" value="0x1000"> +</value> +<value name="USB_BOOT_PLAYER_MODE" value="0x800"> +</value> +<value name="SKIP_CHECKDISK" value="0x400"> +</value> +<value name="USB_LOW_POWER_MODE" value="0x200"> +</value> +<value name="OTG_HNP_BIT" value="0x100"> +</value> +<value name="OTG_ATL_ROLE_BIT" value="0x80"> +</value> +<value name="SDRAM_CS_HI" value="0x40"> +</value> +<value name="SDRAM_CS_LO" value="0x20"> +</value> +<value name="SDRAM_NDX_3" value="0x10"> +</value> +<value name="SDRAM_NDX_2" value="0x8"> +</value> +<value name="SDRAM_NDX_1" value="0x4"> +</value> +<value name="SDRAM_NDX_0" value="0x2"> +</value> +<value name="ETM_ENABLE" value="0x1"> +</value> +</field> +</reg> +<reg name="PERSISTENT2" addr="0x80" sct="yes"> +<field name="GENERAL" bitrange="31:0"> +</field> +</reg> +<reg name="PERSISTENT3" addr="0x90" sct="yes"> +<field name="GENERAL" bitrange="31:0"> +</field> +</reg> +<reg name="PERSISTENT4" addr="0xa0" sct="yes"> +<field name="GENERAL" bitrange="31:0"> +</field> +</reg> +<reg name="PERSISTENT5" addr="0xb0" sct="yes"> +<field name="GENERAL" bitrange="31:0"> +</field> +</reg> +<reg name="DEBUG" addr="0xc0" sct="yes"> +<field name="WATCHDOG_RESET_MASK" bitrange="1:1"> +</field> +<field name="WATCHDOG_RESET" bitrange="0:0"> +</field> +</reg> +<reg name="VERSION" addr="0xd0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<multidev name="SAIF" long_name="Sync Audio Interface" desc="Sync Audio Interface (SAIF)" base="0x80042000" count="2" offset="0x4000"> +<dev name="SAIF1" addr="0x80042000" index="1"> +</dev> +<dev name="SAIF2" addr="0x80046000" index="2"> +</dev> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="BITCLK_MULT_RATE" bitrange="29:27"> +</field> +<field name="BITCLK_BASE_RATE" bitrange="26:26"> +</field> +<field name="FIFO_ERROR_IRQ_EN" bitrange="25:25"> +</field> +<field name="FIFO_SERVICE_IRQ_EN" bitrange="24:24"> +</field> +<field name="DMAWAIT_COUNT" bitrange="20:16"> +</field> +<field name="CHANNEL_NUM_SELECT" bitrange="15:14"> +</field> +<field name="BIT_ORDER" bitrange="12:12"> +</field> +<field name="DELAY" bitrange="11:11"> +</field> +<field name="JUSTIFY" bitrange="10:10"> +</field> +<field name="LRCLK_POLARITY" bitrange="9:9"> +</field> +<field name="BITCLK_EDGE" bitrange="8:8"> +</field> +<field name="WORD_LENGTH" bitrange="7:4"> +</field> +<field name="BITCLK_48XFS_ENABLE" bitrange="3:3"> +</field> +<field name="SLAVE_MODE" bitrange="2:2"> +</field> +<field name="READ_MODE" bitrange="1:1"> +</field> +<field name="RUN" bitrange="0:0"> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="yes"> +<field name="PRESENT" bitrange="31:31"> +</field> +<field name="DMA_PREQ" bitrange="16:16"> +</field> +<field name="FIFO_UNDERFLOW_IRQ" bitrange="6:6"> +</field> +<field name="FIFO_OVERFLOW_IRQ" bitrange="5:5"> +</field> +<field name="FIFO_SERVICE_IRQ" bitrange="4:4"> +</field> +<field name="BUSY" bitrange="0:0"> +</field> +</reg> +<reg name="DATA" addr="0x20" sct="yes"> +<field name="PCM_RIGHT" bitrange="31:16"> +</field> +<field name="PCM_LEFT" bitrange="15:0"> +</field> +</reg> +<reg name="VERSION" addr="0x30" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</multidev> +<dev name="SPDIF" addr="0x80054000" long_name="Sony/Phillips Digital Audio Interface" desc="SPDIF Transmitter"> +<reg name="CTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="DMAWAIT_COUNT" bitrange="20:16"> +</field> +<field name="WAIT_END_XFER" bitrange="5:5"> +</field> +<field name="WORD_LENGTH" bitrange="4:4"> +</field> +<field name="FIFO_UNDERFLOW_IRQ" bitrange="3:3"> +</field> +<field name="FIFO_OVERFLOW_IRQ" bitrange="2:2"> +</field> +<field name="FIFO_ERROR_IRQ_EN" bitrange="1:1"> +</field> +<field name="RUN" bitrange="0:0"> +</field> +</reg> +<reg name="STAT" addr="0x10" sct="no"> +<field name="PRESENT" bitrange="31:31"> +</field> +<field name="END_XFER" bitrange="0:0"> +</field> +</reg> +<reg name="FRAMECTRL" addr="0x20" sct="yes"> +<field name="V_CONFIG" bitrange="17:17"> +</field> +<field name="AUTO_MUTE" bitrange="16:16"> +</field> +<field name="USER_DATA" bitrange="14:14"> +</field> +<field name="V" bitrange="13:13"> +</field> +<field name="L" bitrange="12:12"> +</field> +<field name="CC" bitrange="10:4"> +</field> +<field name="PRE" bitrange="3:3"> +</field> +<field name="COPY" bitrange="2:2"> +</field> +<field name="AUDIO" bitrange="1:1"> +</field> +<field name="PRO" bitrange="0:0"> +</field> +</reg> +<reg name="SRR" addr="0x30" sct="yes"> +<field name="BASEMULT" bitrange="30:28"> +</field> +<field name="RATE" bitrange="19:0"> +</field> +</reg> +<reg name="DEBUG" addr="0x40" sct="no"> +<field name="DMA_PREQ" bitrange="1:1"> +</field> +<field name="FIFO_STATUS" bitrange="0:0"> +</field> +</reg> +<reg name="DATA" addr="0x50" sct="yes"> +<field name="HIGH" bitrange="31:16"> +</field> +<field name="LOW" bitrange="15:0"> +</field> +</reg> +<reg name="VERSION" addr="0x60" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<multidev name="SSP" long_name="Sync Serial Port" desc="Synchronous Serial Ports (SSP)" base="0x80010000" count="2" offset="0x24000"> +<dev name="SSP1" addr="0x80010000" index="1"> +</dev> +<dev name="SSP2" addr="0x80034000" index="2"> +</dev> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="RUN" bitrange="29:29"> +</field> +<field name="SDIO_IRQ_CHECK" bitrange="28:28"> +</field> +<field name="LOCK_CS" bitrange="27:27"> +</field> +<field name="IGNORE_CRC" bitrange="26:26"> +</field> +<field name="READ" bitrange="25:25"> +</field> +<field name="DATA_XFER" bitrange="24:24"> +</field> +<field name="BUS_WIDTH" bitrange="23:22"> +<value name="ONE_BIT" value="0x0"> +</value> +<value name="FOUR_BIT" value="0x1"> +</value> +<value name="EIGHT_BIT" value="0x2"> +</value> +</field> +<field name="WAIT_FOR_IRQ" bitrange="21:21"> +</field> +<field name="WAIT_FOR_CMD" bitrange="20:20"> +</field> +<field name="LONG_RESP" bitrange="19:19"> +</field> +<field name="CHECK_RESP" bitrange="18:18"> +</field> +<field name="GET_RESP" bitrange="17:17"> +</field> +<field name="ENABLE" bitrange="16:16"> +</field> +<field name="XFER_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="CMD0" addr="0x10" sct="yes"> +<field name="APPEND_8CYC" bitrange="20:20"> +</field> +<field name="BLOCK_SIZE" bitrange="19:16"> +</field> +<field name="BLOCK_COUNT" bitrange="15:8"> +</field> +<field name="CMD" bitrange="7:0"> +<value name="MMC_GO_IDLE_STATE" value="0x0"> +</value> +<value name="MMC_SEND_OP_COND" value="0x1"> +</value> +<value name="MMC_ALL_SEND_CID" value="0x2"> +</value> +<value name="MMC_SET_RELATIVE_ADDR" value="0x3"> +</value> +<value name="MMC_SET_DSR" value="0x4"> +</value> +<value name="MMC_RESERVED_5" value="0x5"> +</value> +<value name="MMC_SWITCH" value="0x6"> +</value> +<value name="MMC_SELECT_DESELECT_CARD" value="0x7"> +</value> +<value name="MMC_SEND_EXT_CSD" value="0x8"> +</value> +<value name="MMC_SEND_CSD" value="0x9"> +</value> +<value name="MMC_SEND_CID" value="0xa"> +</value> +<value name="MMC_READ_DAT_UNTIL_STOP" value="0xb"> +</value> +<value name="MMC_STOP_TRANSMISSION" value="0xc"> +</value> +<value name="MMC_SEND_STATUS" value="0xd"> +</value> +<value name="MMC_BUSTEST_R" value="0xe"> +</value> +<value name="MMC_GO_INACTIVE_STATE" value="0xf"> +</value> +<value name="MMC_SET_BLOCKLEN" value="0x10"> +</value> +<value name="MMC_READ_SINGLE_BLOCK" value="0x11"> +</value> +<value name="MMC_READ_MULTIPLE_BLOCK" value="0x12"> +</value> +<value name="MMC_BUSTEST_W" value="0x13"> +</value> +<value name="MMC_WRITE_DAT_UNTIL_STOP" value="0x14"> +</value> +<value name="MMC_SET_BLOCK_COUNT" value="0x17"> +</value> +<value name="MMC_WRITE_BLOCK" value="0x18"> +</value> +<value name="MMC_WRITE_MULTIPLE_BLOCK" value="0x19"> +</value> +<value name="MMC_PROGRAM_CID" value="0x1a"> +</value> +<value name="MMC_PROGRAM_CSD" value="0x1b"> +</value> +<value name="MMC_SET_WRITE_PROT" value="0x1c"> +</value> +<value name="MMC_CLR_WRITE_PROT" value="0x1d"> +</value> +<value name="MMC_SEND_WRITE_PROT" value="0x1e"> +</value> +<value name="MMC_ERASE_GROUP_START" value="0x23"> +</value> +<value name="MMC_ERASE_GROUP_END" value="0x24"> +</value> +<value name="MMC_ERASE" value="0x26"> +</value> +<value name="MMC_FAST_IO" value="0x27"> +</value> +<value name="MMC_GO_IRQ_STATE" value="0x28"> +</value> +<value name="MMC_LOCK_UNLOCK" value="0x2a"> +</value> +<value name="MMC_APP_CMD" value="0x37"> +</value> +<value name="MMC_GEN_CMD" value="0x38"> +</value> +<value name="SD_GO_IDLE_STATE" value="0x0"> +</value> +<value name="SD_ALL_SEND_CID" value="0x2"> +</value> +<value name="SD_SEND_RELATIVE_ADDR" value="0x3"> +</value> +<value name="SD_SET_DSR" value="0x4"> +</value> +<value name="SD_IO_SEND_OP_COND" value="0x5"> +</value> +<value name="SD_SELECT_DESELECT_CARD" value="0x7"> +</value> +<value name="SD_SEND_CSD" value="0x9"> +</value> +<value name="SD_SEND_CID" value="0xa"> +</value> +<value name="SD_STOP_TRANSMISSION" value="0xc"> +</value> +<value name="SD_SEND_STATUS" value="0xd"> +</value> +<value name="SD_GO_INACTIVE_STATE" value="0xf"> +</value> +<value name="SD_SET_BLOCKLEN" value="0x10"> +</value> +<value name="SD_READ_SINGLE_BLOCK" value="0x11"> +</value> +<value name="SD_READ_MULTIPLE_BLOCK" value="0x12"> +</value> +<value name="SD_WRITE_BLOCK" value="0x18"> +</value> +<value name="SD_WRITE_MULTIPLE_BLOCK" value="0x19"> +</value> +<value name="SD_PROGRAM_CSD" value="0x1b"> +</value> +<value name="SD_SET_WRITE_PROT" value="0x1c"> +</value> +<value name="SD_CLR_WRITE_PROT" value="0x1d"> +</value> +<value name="SD_SEND_WRITE_PROT" value="0x1e"> +</value> +<value name="SD_ERASE_WR_BLK_START" value="0x20"> +</value> +<value name="SD_ERASE_WR_BLK_END" value="0x21"> +</value> +<value name="SD_ERASE_GROUP_START" value="0x23"> +</value> +<value name="SD_ERASE_GROUP_END" value="0x24"> +</value> +<value name="SD_ERASE" value="0x26"> +</value> +<value name="SD_LOCK_UNLOCK" value="0x2a"> +</value> +<value name="SD_IO_RW_DIRECT" value="0x34"> +</value> +<value name="SD_IO_RW_EXTENDED" value="0x35"> +</value> +<value name="SD_APP_CMD" value="0x37"> +</value> +<value name="SD_GEN_CMD" value="0x38"> +</value> +</field> +</reg> +<reg name="CMD1" addr="0x20" sct="no"> +<field name="CMD_ARG" bitrange="31:0"> +</field> +</reg> +<reg name="COMPREF" addr="0x30" sct="no"> +<field name="REFERENCE" bitrange="31:0"> +</field> +</reg> +<reg name="COMPMASK" addr="0x40" sct="no"> +<field name="MASK" bitrange="31:0"> +</field> +</reg> +<reg name="TIMING" addr="0x50" sct="no"> +<field name="TIMEOUT" bitrange="31:16"> +</field> +<field name="CLOCK_DIVIDE" bitrange="15:8"> +</field> +<field name="CLOCK_RATE" bitrange="7:0"> +</field> +</reg> +<reg name="CTRL1" addr="0x60" sct="yes"> +<field name="SDIO_IRQ" bitrange="31:31"> +</field> +<field name="SDIO_IRQ_EN" bitrange="30:30"> +</field> +<field name="RESP_ERR_IRQ" bitrange="29:29"> +</field> +<field name="RESP_ERR_IRQ_EN" bitrange="28:28"> +</field> +<field name="RESP_TIMEOUT_IRQ" bitrange="27:27"> +</field> +<field name="RESP_TIMEOUT_IRQ_EN" bitrange="26:26"> +</field> +<field name="DATA_TIMEOUT_IRQ" bitrange="25:25"> +</field> +<field name="DATA_TIMEOUT_IRQ_EN" bitrange="24:24"> +</field> +<field name="DATA_CRC_IRQ" bitrange="23:23"> +</field> +<field name="DATA_CRC_IRQ_EN" bitrange="22:22"> +</field> +<field name="FIFO_UNDERRUN_IRQ" bitrange="21:21"> +</field> +<field name="FIFO_UNDERRUN_EN" bitrange="20:20"> +</field> +<field name="CEATA_CCS_ERR_IRQ" bitrange="19:19"> +</field> +<field name="CEATA_CCS_ERR_IRQ_EN" bitrange="18:18"> +</field> +<field name="RECV_TIMEOUT_IRQ" bitrange="17:17"> +</field> +<field name="RECV_TIMEOUT_IRQ_EN" bitrange="16:16"> +</field> +<field name="FIFO_OVERRUN_IRQ" bitrange="15:15"> +</field> +<field name="FIFO_OVERRUN_IRQ_EN" bitrange="14:14"> +</field> +<field name="DMA_ENABLE" bitrange="13:13"> +</field> +<field name="CEATA_CCS_ERR_EN" bitrange="12:12"> +</field> +<field name="SLAVE_OUT_DISABLE" bitrange="11:11"> +</field> +<field name="PHASE" bitrange="10:10"> +</field> +<field name="POLARITY" bitrange="9:9"> +</field> +<field name="SLAVE_MODE" bitrange="8:8"> +</field> +<field name="WORD_LENGTH" bitrange="7:4"> +<value name="RESERVED0" value="0x0"> +</value> +<value name="RESERVED1" value="0x1"> +</value> +<value name="RESERVED2" value="0x2"> +</value> +<value name="FOUR_BITS" value="0x3"> +</value> +<value name="EIGHT_BITS" value="0x7"> +</value> +<value name="SIXTEEN_BITS" value="0xf"> +</value> +</field> +<field name="SSP_MODE" bitrange="3:0"> +<value name="SPI" value="0x0"> +</value> +<value name="SSI" value="0x1"> +</value> +<value name="SD_MMC" value="0x3"> +</value> +<value name="MS" value="0x4"> +</value> +<value name="CE_ATA" value="0x7"> +</value> +</field> +</reg> +<reg name="DATA" addr="0x70" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="SDRESP0" addr="0x80" sct="no"> +<field name="RESP0" bitrange="31:0"> +</field> +</reg> +<reg name="SDRESP1" addr="0x90" sct="no"> +<field name="RESP1" bitrange="31:0"> +</field> +</reg> +<reg name="SDRESP2" addr="0xa0" sct="no"> +<field name="RESP2" bitrange="31:0"> +</field> +</reg> +<reg name="SDRESP3" addr="0xb0" sct="no"> +<field name="RESP3" bitrange="31:0"> +</field> +</reg> +<reg name="STATUS" addr="0xc0" sct="no"> +<field name="PRESENT" bitrange="31:31"> +</field> +<field name="MS_PRESENT" bitrange="30:30"> +</field> +<field name="SD_PRESENT" bitrange="29:29"> +</field> +<field name="CARD_DETECT" bitrange="28:28"> +</field> +<field name="DMASENSE" bitrange="21:21"> +</field> +<field name="DMATERM" bitrange="20:20"> +</field> +<field name="DMAREQ" bitrange="19:19"> +</field> +<field name="DMAEND" bitrange="18:18"> +</field> +<field name="SDIO_IRQ" bitrange="17:17"> +</field> +<field name="RESP_CRC_ERR" bitrange="16:16"> +</field> +<field name="RESP_ERR" bitrange="15:15"> +</field> +<field name="RESP_TIMEOUT" bitrange="14:14"> +</field> +<field name="DATA_CRC_ERR" bitrange="13:13"> +</field> +<field name="TIMEOUT" bitrange="12:12"> +</field> +<field name="RECV_TIMEOUT_STAT" bitrange="11:11"> +</field> +<field name="CEATA_CCS_ERR" bitrange="10:10"> +</field> +<field name="FIFO_OVRFLW" bitrange="9:9"> +</field> +<field name="FIFO_FULL" bitrange="8:8"> +</field> +<field name="FIFO_EMPTY" bitrange="5:5"> +</field> +<field name="FIFO_UNDRFLW" bitrange="4:4"> +</field> +<field name="CMD_BUSY" bitrange="3:3"> +</field> +<field name="DATA_BUSY" bitrange="2:2"> +</field> +<field name="BUSY" bitrange="0:0"> +</field> +</reg> +<reg name="DEBUG" addr="0x100" sct="no"> +<field name="DATACRC_ERR" bitrange="31:28"> +</field> +<field name="DATA_STALL" bitrange="27:27"> +</field> +<field name="DAT_SM" bitrange="26:24"> +<value name="DSM_IDLE" value="0x0"> +</value> +<value name="DSM_WORD" value="0x2"> +</value> +<value name="DSM_CRC1" value="0x3"> +</value> +<value name="DSM_CRC2" value="0x4"> +</value> +<value name="DSM_END" value="0x5"> +</value> +</field> +<field name="MSTK_SM" bitrange="23:20"> +<value name="MSTK_IDLE" value="0x0"> +</value> +<value name="MSTK_CKON" value="0x1"> +</value> +<value name="MSTK_BS1" value="0x2"> +</value> +<value name="MSTK_TPC" value="0x3"> +</value> +<value name="MSTK_BS2" value="0x4"> +</value> +<value name="MSTK_HDSHK" value="0x5"> +</value> +<value name="MSTK_BS3" value="0x6"> +</value> +<value name="MSTK_RW" value="0x7"> +</value> +<value name="MSTK_CRC1" value="0x8"> +</value> +<value name="MSTK_CRC2" value="0x9"> +</value> +<value name="MSTK_BS0" value="0xa"> +</value> +<value name="MSTK_END1" value="0xb"> +</value> +<value name="MSTK_END2W" value="0xc"> +</value> +<value name="MSTK_END2R" value="0xd"> +</value> +<value name="MSTK_DONE" value="0xe"> +</value> +</field> +<field name="CMD_OE" bitrange="19:19"> +</field> +<field name="DMA_SM" bitrange="18:16"> +<value name="DMA_IDLE" value="0x0"> +</value> +<value name="DMA_DMAREQ" value="0x1"> +</value> +<value name="DMA_DMAACK" value="0x2"> +</value> +<value name="DMA_STALL" value="0x3"> +</value> +<value name="DMA_BUSY" value="0x4"> +</value> +<value name="DMA_DONE" value="0x5"> +</value> +<value name="DMA_COUNT" value="0x6"> +</value> +</field> +<field name="MMC_SM" bitrange="15:12"> +<value name="MMC_IDLE" value="0x0"> +</value> +<value name="MMC_CMD" value="0x1"> +</value> +<value name="MMC_TRC" value="0x2"> +</value> +<value name="MMC_RESP" value="0x3"> +</value> +<value name="MMC_RPRX" value="0x4"> +</value> +<value name="MMC_TX" value="0x5"> +</value> +<value name="MMC_CTOK" value="0x6"> +</value> +<value name="MMC_RX" value="0x7"> +</value> +<value name="MMC_CCS" value="0x8"> +</value> +<value name="MMC_PUP" value="0x9"> +</value> +<value name="MMC_WAIT" value="0xa"> +</value> +</field> +<field name="CMD_SM" bitrange="11:10"> +<value name="CSM_IDLE" value="0x0"> +</value> +<value name="CSM_INDEX" value="0x1"> +</value> +<value name="CSM_ARG" value="0x2"> +</value> +<value name="CSM_CRC" value="0x3"> +</value> +</field> +<field name="SSP_CMD" bitrange="9:9"> +</field> +<field name="SSP_RESP" bitrange="8:8"> +</field> +<field name="SSP_RXD" bitrange="7:0"> +</field> +</reg> +<reg name="VERSION" addr="0x110" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</multidev> +<dev name="TIMROT" addr="0x80068000" long_name="Timers/Rotary Interface" desc="Timers and Rotary Decoder"> +<reg name="ROTCTRL" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="ROTARY_PRESENT" bitrange="29:29"> +</field> +<field name="TIM3_PRESENT" bitrange="28:28"> +</field> +<field name="TIM2_PRESENT" bitrange="27:27"> +</field> +<field name="TIM1_PRESENT" bitrange="26:26"> +</field> +<field name="TIM0_PRESENT" bitrange="25:25"> +</field> +<field name="STATE" bitrange="24:22"> +</field> +<field name="DIVIDER" bitrange="21:16"> +</field> +<field name="RELATIVE" bitrange="12:12"> +</field> +<field name="OVERSAMPLE" bitrange="11:10"> +<value name="8X" value="0x0"> +</value> +<value name="4X" value="0x1"> +</value> +<value name="2X" value="0x2"> +</value> +<value name="1X" value="0x3"> +</value> +</field> +<field name="POLARITY_B" bitrange="9:9"> +</field> +<field name="POLARITY_A" bitrange="8:8"> +</field> +<field name="SELECT_B" bitrange="6:4"> +<value name="NEVER_TICK" value="0x0"> +</value> +<value name="PWM0" value="0x1"> +</value> +<value name="PWM1" value="0x2"> +</value> +<value name="PWM2" value="0x3"> +</value> +<value name="PWM3" value="0x4"> +</value> +<value name="PWM4" value="0x5"> +</value> +<value name="ROTARYA" value="0x6"> +</value> +<value name="ROTARYB" value="0x7"> +</value> +</field> +<field name="SELECT_A" bitrange="2:0"> +<value name="NEVER_TICK" value="0x0"> +</value> +<value name="PWM0" value="0x1"> +</value> +<value name="PWM1" value="0x2"> +</value> +<value name="PWM2" value="0x3"> +</value> +<value name="PWM3" value="0x4"> +</value> +<value name="PWM4" value="0x5"> +</value> +<value name="ROTARYA" value="0x6"> +</value> +<value name="ROTARYB" value="0x7"> +</value> +</field> +</reg> +<reg name="ROTCOUNT" addr="0x10" sct="no"> +<field name="UPDOWN" bitrange="15:0"> +</field> +</reg> +<multireg name="TIMCTRLn" base="0x20" count="2" offset="0x20" sct="SCT"> +<reg name="TIMCTRL0" addr="0x20" index="0"> +</reg> +<reg name="TIMCTRL1" addr="0x40" index="1"> +</reg> +<reg name="TIMCTRL2" addr="0x60" index="2"> +</reg> +<field name="IRQ" bitrange="15:15"> +</field> +<field name="IRQ_EN" bitrange="14:14"> +</field> +<field name="POLARITY" bitrange="8:8"> +</field> +<field name="UPDATE" bitrange="7:7"> +</field> +<field name="RELOAD" bitrange="6:6"> +</field> +<field name="PRESCALE" bitrange="5:4"> +<value name="DIV_BY_1" value="0x0"> +</value> +<value name="DIV_BY_2" value="0x1"> +</value> +<value name="DIV_BY_4" value="0x2"> +</value> +<value name="DIV_BY_8" value="0x3"> +</value> +</field> +<field name="SELECT" bitrange="3:0"> +<value name="NEVER_TICK" value="0x0"> +</value> +<value name="PWM0" value="0x1"> +</value> +<value name="PWM1" value="0x2"> +</value> +<value name="PWM2" value="0x3"> +</value> +<value name="PWM3" value="0x4"> +</value> +<value name="PWM4" value="0x5"> +</value> +<value name="ROTARYA" value="0x6"> +</value> +<value name="ROTARYB" value="0x7"> +</value> +<value name="32KHZ_XTAL" value="0x8"> +</value> +<value name="8KHZ_XTAL" value="0x9"> +</value> +<value name="4KHZ_XTAL" value="0xa"> +</value> +<value name="1KHZ_XTAL" value="0xb"> +</value> +<value name="TICK_ALWAYS" value="0xc"> +</value> +</field> +</multireg> +<multireg name="TIMCOUNTn" base="0x30" count="2" offset="0x20" sct=""> +<reg name="TIMCOUNT0" addr="0x30" index="0"> +</reg> +<reg name="TIMCOUNT1" addr="0x50" index="1"> +</reg> +<reg name="TIMCOUNT2" addr="0x70" index="2"> +</reg> +<field name="RUNNING_COUNT" bitrange="31:16"> +</field> +<field name="FIXED_COUNT" bitrange="15:0"> +</field> +</multireg> +<reg name="TIMCTRL3" addr="0x80" sct="yes"> +<field name="TEST_SIGNAL" bitrange="19:16"> +<value name="NEVER_TICK" value="0x0"> +</value> +<value name="PWM0" value="0x1"> +</value> +<value name="PWM1" value="0x2"> +</value> +<value name="PWM2" value="0x3"> +</value> +<value name="PWM3" value="0x4"> +</value> +<value name="PWM4" value="0x5"> +</value> +<value name="ROTARYA" value="0x6"> +</value> +<value name="ROTARYB" value="0x7"> +</value> +<value name="32KHZ_XTAL" value="0x8"> +</value> +<value name="8KHZ_XTAL" value="0x9"> +</value> +<value name="4KHZ_XTAL" value="0xa"> +</value> +<value name="1KHZ_XTAL" value="0xb"> +</value> +<value name="TICK_ALWAYS" value="0xc"> +</value> +</field> +<field name="IRQ" bitrange="15:15"> +</field> +<field name="IRQ_EN" bitrange="14:14"> +</field> +<field name="DUTY_VALID" bitrange="10:10"> +</field> +<field name="DUTY_CYCLE" bitrange="9:9"> +</field> +<field name="POLARITY" bitrange="8:8"> +</field> +<field name="UPDATE" bitrange="7:7"> +</field> +<field name="RELOAD" bitrange="6:6"> +</field> +<field name="PRESCALE" bitrange="5:4"> +<value name="DIV_BY_1" value="0x0"> +</value> +<value name="DIV_BY_2" value="0x1"> +</value> +<value name="DIV_BY_4" value="0x2"> +</value> +<value name="DIV_BY_8" value="0x3"> +</value> +</field> +<field name="SELECT" bitrange="3:0"> +<value name="NEVER_TICK" value="0x0"> +</value> +<value name="PWM0" value="0x1"> +</value> +<value name="PWM1" value="0x2"> +</value> +<value name="PWM2" value="0x3"> +</value> +<value name="PWM3" value="0x4"> +</value> +<value name="PWM4" value="0x5"> +</value> +<value name="ROTARYA" value="0x6"> +</value> +<value name="ROTARYB" value="0x7"> +</value> +<value name="32KHZ_XTAL" value="0x8"> +</value> +<value name="8KHZ_XTAL" value="0x9"> +</value> +<value name="4KHZ_XTAL" value="0xa"> +</value> +<value name="1KHZ_XTAL" value="0xb"> +</value> +<value name="TICK_ALWAYS" value="0xc"> +</value> +</field> +</reg> +<reg name="TIMCOUNT3" addr="0x90" sct="no"> +<field name="LOW_RUNNING_COUNT" bitrange="31:16"> +</field> +<field name="HIGH_FIXED_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="VERSION" addr="0xa0" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +<multidev name="UARTAPP" long_name="Application UART" desc="Application UART" base="0x8006c000" count="2" offset="0x2000"> +<dev name="UARTAPP1" addr="0x8006c000" index="1"> +</dev> +<dev name="UARTAPP2" addr="0x8006e000" index="2"> +</dev> +<reg name="CTRL0" addr="0x0" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="RUN" bitrange="29:29"> +</field> +<field name="RX_SOURCE" bitrange="28:28"> +</field> +<field name="RXTO_ENABLE" bitrange="27:27"> +</field> +<field name="RXTIMEOUT" bitrange="26:16"> +</field> +<field name="XFER_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="CTRL1" addr="0x10" sct="yes"> +<field name="RUN" bitrange="28:28"> +</field> +<field name="XFER_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="CTRL2" addr="0x20" sct="yes"> +<field name="INVERT_RTS" bitrange="31:31"> +</field> +<field name="INVERT_CTS" bitrange="30:30"> +</field> +<field name="INVERT_TX" bitrange="29:29"> +</field> +<field name="INVERT_RX" bitrange="28:28"> +</field> +<field name="RTS_SEMAPHORE" bitrange="27:27"> +</field> +<field name="DMAONERR" bitrange="26:26"> +</field> +<field name="TXDMAE" bitrange="25:25"> +</field> +<field name="RXDMAE" bitrange="24:24"> +</field> +<field name="RXIFLSEL" bitrange="22:20"> +<value name="NOT_EMPTY" value="0x0"> +</value> +<value name="ONE_QUARTER" value="0x1"> +</value> +<value name="ONE_HALF" value="0x2"> +</value> +<value name="THREE_QUARTERS" value="0x3"> +</value> +<value name="SEVEN_EIGHTHS" value="0x4"> +</value> +<value name="INVALID5" value="0x5"> +</value> +<value name="INVALID6" value="0x6"> +</value> +<value name="INVALID7" value="0x7"> +</value> +</field> +<field name="TXIFLSEL" bitrange="18:16"> +<value name="EMPTY" value="0x0"> +</value> +<value name="ONE_QUARTER" value="0x1"> +</value> +<value name="ONE_HALF" value="0x2"> +</value> +<value name="THREE_QUARTERS" value="0x3"> +</value> +<value name="SEVEN_EIGHTHS" value="0x4"> +</value> +<value name="INVALID5" value="0x5"> +</value> +<value name="INVALID6" value="0x6"> +</value> +<value name="INVALID7" value="0x7"> +</value> +</field> +<field name="CTSEN" bitrange="15:15"> +</field> +<field name="RTSEN" bitrange="14:14"> +</field> +<field name="OUT2" bitrange="13:13"> +</field> +<field name="OUT1" bitrange="12:12"> +</field> +<field name="RTS" bitrange="11:11"> +</field> +<field name="DTR" bitrange="10:10"> +</field> +<field name="RXE" bitrange="9:9"> +</field> +<field name="TXE" bitrange="8:8"> +</field> +<field name="LBE" bitrange="7:7"> +</field> +<field name="USE_LCR2" bitrange="6:6"> +</field> +<field name="SIRLP" bitrange="2:2"> +</field> +<field name="SIREN" bitrange="1:1"> +</field> +<field name="UARTEN" bitrange="0:0"> +</field> +</reg> +<reg name="LINECTRL" addr="0x30" sct="yes"> +<field name="BAUD_DIVINT" bitrange="31:16"> +</field> +<field name="BAUD_DIVFRAC" bitrange="13:8"> +</field> +<field name="SPS" bitrange="7:7"> +</field> +<field name="WLEN" bitrange="6:5"> +</field> +<field name="FEN" bitrange="4:4"> +</field> +<field name="STP2" bitrange="3:3"> +</field> +<field name="EPS" bitrange="2:2"> +</field> +<field name="PEN" bitrange="1:1"> +</field> +<field name="BRK" bitrange="0:0"> +</field> +</reg> +<reg name="LINECTRL2" addr="0x40" sct="yes"> +<field name="BAUD_DIVINT" bitrange="31:16"> +</field> +<field name="BAUD_DIVFRAC" bitrange="13:8"> +</field> +<field name="SPS" bitrange="7:7"> +</field> +<field name="WLEN" bitrange="6:5"> +</field> +<field name="FEN" bitrange="4:4"> +</field> +<field name="STP2" bitrange="3:3"> +</field> +<field name="EPS" bitrange="2:2"> +</field> +<field name="PEN" bitrange="1:1"> +</field> +</reg> +<reg name="INTR" addr="0x50" sct="yes"> +<field name="OEIEN" bitrange="26:26"> +</field> +<field name="BEIEN" bitrange="25:25"> +</field> +<field name="PEIEN" bitrange="24:24"> +</field> +<field name="FEIEN" bitrange="23:23"> +</field> +<field name="RTIEN" bitrange="22:22"> +</field> +<field name="TXIEN" bitrange="21:21"> +</field> +<field name="RXIEN" bitrange="20:20"> +</field> +<field name="DSRMIEN" bitrange="19:19"> +</field> +<field name="DCDMIEN" bitrange="18:18"> +</field> +<field name="CTSMIEN" bitrange="17:17"> +</field> +<field name="RIMIEN" bitrange="16:16"> +</field> +<field name="OEIS" bitrange="10:10"> +</field> +<field name="BEIS" bitrange="9:9"> +</field> +<field name="PEIS" bitrange="8:8"> +</field> +<field name="FEIS" bitrange="7:7"> +</field> +<field name="RTIS" bitrange="6:6"> +</field> +<field name="TXIS" bitrange="5:5"> +</field> +<field name="RXIS" bitrange="4:4"> +</field> +<field name="DSRMIS" bitrange="3:3"> +</field> +<field name="DCDMIS" bitrange="2:2"> +</field> +<field name="CTSMIS" bitrange="1:1"> +</field> +<field name="RIMIS" bitrange="0:0"> +</field> +</reg> +<reg name="DATA" addr="0x60" sct="no"> +<field name="DATA" bitrange="31:0"> +</field> +</reg> +<reg name="STAT" addr="0x70" sct="no"> +<field name="PRESENT" bitrange="31:31"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="HISPEED" bitrange="30:30"> +<value name="UNAVAILABLE" value="0x0"> +</value> +<value name="AVAILABLE" value="0x1"> +</value> +</field> +<field name="BUSY" bitrange="29:29"> +</field> +<field name="CTS" bitrange="28:28"> +</field> +<field name="TXFE" bitrange="27:27"> +</field> +<field name="RXFF" bitrange="26:26"> +</field> +<field name="TXFF" bitrange="25:25"> +</field> +<field name="RXFE" bitrange="24:24"> +</field> +<field name="RXBYTE_INVALID" bitrange="23:20"> +</field> +<field name="OERR" bitrange="19:19"> +</field> +<field name="BERR" bitrange="18:18"> +</field> +<field name="PERR" bitrange="17:17"> +</field> +<field name="FERR" bitrange="16:16"> +</field> +<field name="RXCOUNT" bitrange="15:0"> +</field> +</reg> +<reg name="DEBUG" addr="0x80" sct="no"> +<field name="TXDMARUN" bitrange="5:5"> +</field> +<field name="RXDMARUN" bitrange="4:4"> +</field> +<field name="TXCMDEND" bitrange="3:3"> +</field> +<field name="RXCMDEND" bitrange="2:2"> +</field> +<field name="TXDMARQ" bitrange="1:1"> +</field> +<field name="RXDMARQ" bitrange="0:0"> +</field> +</reg> +<reg name="VERSION" addr="0x90" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</multidev> +<dev name="UARTDBG" addr="0x80070000" long_name="Debug UART" desc="Debug UART"> +<reg name="DR" addr="0x0" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:12"> +</field> +<field name="OE" bitrange="11:11"> +</field> +<field name="BE" bitrange="10:10"> +</field> +<field name="PE" bitrange="9:9"> +</field> +<field name="FE" bitrange="8:8"> +</field> +<field name="DATA" bitrange="7:0"> +</field> +</reg> +<reg name="RSR_ECR" addr="0x4" sct="no"> +<field name="UNAVAILABLE" bitrange="31:8"> +</field> +<field name="EC" bitrange="7:4"> +</field> +<field name="OE" bitrange="3:3"> +</field> +<field name="BE" bitrange="2:2"> +</field> +<field name="PE" bitrange="1:1"> +</field> +<field name="FE" bitrange="0:0"> +</field> +</reg> +<reg name="FR" addr="0x18" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:9"> +</field> +<field name="RI" bitrange="8:8"> +</field> +<field name="TXFE" bitrange="7:7"> +</field> +<field name="RXFF" bitrange="6:6"> +</field> +<field name="TXFF" bitrange="5:5"> +</field> +<field name="RXFE" bitrange="4:4"> +</field> +<field name="BUSY" bitrange="3:3"> +</field> +<field name="DCD" bitrange="2:2"> +</field> +<field name="DSR" bitrange="1:1"> +</field> +<field name="CTS" bitrange="0:0"> +</field> +</reg> +<reg name="ILPR" addr="0x20" sct="no"> +<field name="UNAVAILABLE" bitrange="31:8"> +</field> +<field name="ILPDVSR" bitrange="7:0"> +</field> +</reg> +<reg name="IBRD" addr="0x24" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="BAUD_DIVINT" bitrange="15:0"> +</field> +</reg> +<reg name="FBRD" addr="0x28" sct="no"> +<field name="UNAVAILABLE" bitrange="31:8"> +</field> +<field name="RESERVED" bitrange="7:6"> +</field> +<field name="BAUD_DIVFRAC" bitrange="5:0"> +</field> +</reg> +<reg name="LCR_H" addr="0x2c" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:8"> +</field> +<field name="SPS" bitrange="7:7"> +</field> +<field name="WLEN" bitrange="6:5"> +</field> +<field name="FEN" bitrange="4:4"> +</field> +<field name="STP2" bitrange="3:3"> +</field> +<field name="EPS" bitrange="2:2"> +</field> +<field name="PEN" bitrange="1:1"> +</field> +<field name="BRK" bitrange="0:0"> +</field> +</reg> +<reg name="CR" addr="0x30" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="CTSEN" bitrange="15:15"> +</field> +<field name="RTSEN" bitrange="14:14"> +</field> +<field name="OUT2" bitrange="13:13"> +</field> +<field name="OUT1" bitrange="12:12"> +</field> +<field name="RTS" bitrange="11:11"> +</field> +<field name="DTR" bitrange="10:10"> +</field> +<field name="RXE" bitrange="9:9"> +</field> +<field name="TXE" bitrange="8:8"> +</field> +<field name="LBE" bitrange="7:7"> +</field> +<field name="RESERVED" bitrange="6:3"> +</field> +<field name="SIRLP" bitrange="2:2"> +</field> +<field name="SIREN" bitrange="1:1"> +</field> +<field name="UARTEN" bitrange="0:0"> +</field> +</reg> +<reg name="IFLS" addr="0x34" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:6"> +</field> +<field name="RXIFLSEL" bitrange="5:3"> +<value name="NOT_EMPTY" value="0x0"> +</value> +<value name="ONE_QUARTER" value="0x1"> +</value> +<value name="ONE_HALF" value="0x2"> +</value> +<value name="THREE_QUARTERS" value="0x3"> +</value> +<value name="SEVEN_EIGHTHS" value="0x4"> +</value> +<value name="INVALID5" value="0x5"> +</value> +<value name="INVALID6" value="0x6"> +</value> +<value name="INVALID7" value="0x7"> +</value> +</field> +<field name="TXIFLSEL" bitrange="2:0"> +<value name="EMPTY" value="0x0"> +</value> +<value name="ONE_QUARTER" value="0x1"> +</value> +<value name="ONE_HALF" value="0x2"> +</value> +<value name="THREE_QUARTERS" value="0x3"> +</value> +<value name="SEVEN_EIGHTHS" value="0x4"> +</value> +<value name="INVALID5" value="0x5"> +</value> +<value name="INVALID6" value="0x6"> +</value> +<value name="INVALID7" value="0x7"> +</value> +</field> +</reg> +<reg name="IMSC" addr="0x38" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:11"> +</field> +<field name="OEIM" bitrange="10:10"> +</field> +<field name="BEIM" bitrange="9:9"> +</field> +<field name="PEIM" bitrange="8:8"> +</field> +<field name="FEIM" bitrange="7:7"> +</field> +<field name="RTIM" bitrange="6:6"> +</field> +<field name="TXIM" bitrange="5:5"> +</field> +<field name="RXIM" bitrange="4:4"> +</field> +<field name="DSRMIM" bitrange="3:3"> +</field> +<field name="DCDMIM" bitrange="2:2"> +</field> +<field name="CTSMIM" bitrange="1:1"> +</field> +<field name="RIMIM" bitrange="0:0"> +</field> +</reg> +<reg name="RIS" addr="0x3c" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:11"> +</field> +<field name="OERIS" bitrange="10:10"> +</field> +<field name="BERIS" bitrange="9:9"> +</field> +<field name="PERIS" bitrange="8:8"> +</field> +<field name="FERIS" bitrange="7:7"> +</field> +<field name="RTRIS" bitrange="6:6"> +</field> +<field name="TXRIS" bitrange="5:5"> +</field> +<field name="RXRIS" bitrange="4:4"> +</field> +<field name="DSRRMIS" bitrange="3:3"> +</field> +<field name="DCDRMIS" bitrange="2:2"> +</field> +<field name="CTSRMIS" bitrange="1:1"> +</field> +<field name="RIRMIS" bitrange="0:0"> +</field> +</reg> +<reg name="MIS" addr="0x40" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:11"> +</field> +<field name="OEMIS" bitrange="10:10"> +</field> +<field name="BEMIS" bitrange="9:9"> +</field> +<field name="PEMIS" bitrange="8:8"> +</field> +<field name="FEMIS" bitrange="7:7"> +</field> +<field name="RTMIS" bitrange="6:6"> +</field> +<field name="TXMIS" bitrange="5:5"> +</field> +<field name="RXMIS" bitrange="4:4"> +</field> +<field name="DSRMMIS" bitrange="3:3"> +</field> +<field name="DCDMMIS" bitrange="2:2"> +</field> +<field name="CTSMMIS" bitrange="1:1"> +</field> +<field name="RIMMIS" bitrange="0:0"> +</field> +</reg> +<reg name="ICR" addr="0x44" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:11"> +</field> +<field name="OEIC" bitrange="10:10"> +</field> +<field name="BEIC" bitrange="9:9"> +</field> +<field name="PEIC" bitrange="8:8"> +</field> +<field name="FEIC" bitrange="7:7"> +</field> +<field name="RTIC" bitrange="6:6"> +</field> +<field name="TXIC" bitrange="5:5"> +</field> +<field name="RXIC" bitrange="4:4"> +</field> +<field name="DSRMIC" bitrange="3:3"> +</field> +<field name="DCDMIC" bitrange="2:2"> +</field> +<field name="CTSMIC" bitrange="1:1"> +</field> +<field name="RIMIC" bitrange="0:0"> +</field> +</reg> +<reg name="DMACR" addr="0x48" sct="no"> +<field name="UNAVAILABLE" bitrange="31:16"> +</field> +<field name="RESERVED" bitrange="15:3"> +</field> +<field name="DMAONERR" bitrange="2:2"> +</field> +<field name="TXDMAE" bitrange="1:1"> +</field> +<field name="RXDMAE" bitrange="0:0"> +</field> +</reg> +</dev> +<dev name="USBCTRL" addr="0x80080000" long_name="USB Controller" desc="USB High-Speed Host/Device Controller"> +<reg name="ID" addr="0x0" sct="no"> +<field name="REV" bitrange="23:16"> +</field> +<field name="ID_N" bitrange="15:8"> +</field> +<field name="ID" bitrange="7:0"> +</field> +</reg> +<reg name="GENERAL" addr="0x4" sct="no"> +<field name="SM" bitrange="9:9"> +</field> +<field name="PHYM" bitrange="8:6"> +</field> +<field name="PHYW" bitrange="5:4"> +</field> +<field name="BWT" bitrange="3:3"> +</field> +<field name="CLKC" bitrange="2:1"> +</field> +<field name="RT" bitrange="0:0"> +</field> +</reg> +<reg name="HOST" addr="0x8" sct="no"> +<field name="TTPER" bitrange="31:24"> +</field> +<field name="TTASY" bitrange="23:16"> +</field> +<field name="NPORT" bitrange="3:1"> +</field> +<field name="HC" bitrange="0:0"> +</field> +</reg> +<reg name="DEVICE" addr="0xc" sct="no"> +<field name="DEVEP" bitrange="5:1"> +</field> +<field name="DC" bitrange="0:0"> +</field> +</reg> +<reg name="TXBUF" addr="0x10" sct="no"> +<field name="TXLCR" bitrange="31:31"> +</field> +<field name="TXCHANADD" bitrange="23:16"> +</field> +<field name="TXADD" bitrange="15:8"> +</field> +<field name="TXBURST" bitrange="7:0"> +</field> +</reg> +<reg name="RXBUF" addr="0x14" sct="no"> +<field name="RXADD" bitrange="15:8"> +</field> +<field name="RXBURST" bitrange="7:0"> +</field> +</reg> +<reg name="TTTXBUF" addr="0x18" sct="no"> +<field name="TTTXBUF" bitrange="31:0"> +</field> +</reg> +<reg name="TTRXBUF" addr="0x1c" sct="no"> +<field name="TTRXBUF" bitrange="31:0"> +</field> +</reg> +<reg name="CAPLENGTH" addr="0x100" sct="no"> +<field name="HCIVER" bitrange="31:16"> +</field> +<field name="LENGTH" bitrange="7:0"> +</field> +</reg> +<reg name="HCSPARAMS" addr="0x104" sct="no"> +<field name="NPORTS" bitrange="3:0"> +</field> +<field name="PPC" bitrange="4:4"> +</field> +<field name="NPCC" bitrange="11:8"> +</field> +<field name="NCC" bitrange="15:12"> +</field> +<field name="PI" bitrange="16:16"> +</field> +<field name="NPTT" bitrange="23:20"> +</field> +<field name="NTT" bitrange="27:24"> +</field> +</reg> +<reg name="HCCPARAMS" addr="0x108" sct="no"> +<field name="ADDR64BITCAP" bitrange="0:0"> +</field> +<field name="PGM_FRM_LIST_FLAG" bitrange="1:1"> +</field> +<field name="ASYNC_PARK_CAP" bitrange="2:2"> +</field> +<field name="ISO_SCH_THRESHOLD" bitrange="15:8"> +</field> +</reg> +<reg name="DCIVERSION" addr="0x120" sct="no"> +<field name="DCIVER" bitrange="15:0"> +</field> +</reg> +<reg name="DCCPARAMS" addr="0x124" sct="no"> +<field name="HC" bitrange="8:8"> +</field> +<field name="DC" bitrange="7:7"> +</field> +<field name="DEN" bitrange="4:0"> +</field> +</reg> +<reg name="USBCMD" addr="0x140" sct="no"> +<field name="RS" bitrange="0:0"> +</field> +<field name="RST" bitrange="1:1"> +</field> +<field name="FS0" bitrange="2:2"> +</field> +<field name="FS1" bitrange="3:3"> +</field> +<field name="PSE" bitrange="4:4"> +</field> +<field name="ASE" bitrange="5:5"> +</field> +<field name="IAA" bitrange="6:6"> +</field> +<field name="LR" bitrange="7:7"> +</field> +<field name="ASP0" bitrange="8:8"> +</field> +<field name="ASP1" bitrange="9:9"> +</field> +<field name="ASPE" bitrange="11:11"> +</field> +<field name="FS2" bitrange="15:15"> +</field> +<field name="ITC" bitrange="23:16"> +</field> +</reg> +<reg name="USBSTS" addr="0x144" sct="no"> +<field name="UI" bitrange="0:0"> +</field> +<field name="UEI" bitrange="1:1"> +</field> +<field name="PCI" bitrange="2:2"> +</field> +<field name="FRI" bitrange="3:3"> +</field> +<field name="SEI" bitrange="4:4"> +</field> +<field name="AAI" bitrange="5:5"> +</field> +<field name="URI" bitrange="6:6"> +</field> +<field name="SRI" bitrange="7:7"> +</field> +<field name="SLI" bitrange="8:8"> +</field> +<field name="ULPII" bitrange="10:10"> +</field> +<field name="HCH" bitrange="12:12"> +</field> +<field name="RCL" bitrange="13:13"> +</field> +<field name="PS" bitrange="14:14"> +</field> +<field name="AS" bitrange="15:15"> +</field> +<field name="NAKI" bitrange="16:16"> +</field> +</reg> +<reg name="USBINTR" addr="0x148" sct="no"> +<field name="UE" bitrange="0:0"> +</field> +<field name="UEE" bitrange="1:1"> +</field> +<field name="PCE" bitrange="2:2"> +</field> +<field name="FRE" bitrange="3:3"> +</field> +<field name="SEE" bitrange="4:4"> +</field> +<field name="AAE" bitrange="5:5"> +</field> +<field name="URE" bitrange="6:6"> +</field> +<field name="SRE" bitrange="7:7"> +</field> +<field name="SLE" bitrange="8:8"> +</field> +<field name="ULPIE" bitrange="10:10"> +</field> +<field name="NAKE" bitrange="16:16"> +</field> +</reg> +<reg name="FRINDEX" addr="0x14c" sct="no"> +<field name="LISTINDEX" bitrange="13:3"> +</field> +<field name="UINDEX" bitrange="2:0"> +</field> +</reg> +<reg name="CTRLDSSEGMENT" addr="0x150" sct="no"> +<field name="EMPTY" bitrange="31:0"> +</field> +</reg> +<reg name="PERIODICLISTBASE" addr="0x154" sct="no"> +<field name="BASEADDR" bitrange="31:12"> +</field> +</reg> +<reg name="ASYNCLISTADDR" addr="0x158" sct="no"> +<field name="ASYBASE" bitrange="31:5"> +</field> +</reg> +<reg name="TTCTRL" addr="0x15c" sct="no"> +<field name="TTHA" bitrange="30:24"> +</field> +</reg> +<reg name="BURSTSIZE" addr="0x160" sct="no"> +<field name="TX" bitrange="15:8"> +</field> +<field name="RX" bitrange="7:0"> +</field> +</reg> +<reg name="TXFILLTUNING" addr="0x164" sct="no"> +<field name="TXFIFOTHRES" bitrange="21:16"> +</field> +<field name="TXSCHEALTH" bitrange="12:8"> +</field> +<field name="TXSCHOH" bitrange="7:0"> +</field> +</reg> +<reg name="TXTTFILLTUNING" addr="0x168" sct="no"> +<field name="EMPTY" bitrange="31:0"> +</field> +</reg> +<reg name="ULPI" addr="0x170" sct="no"> +<field name="WAKEUP" bitrange="31:31"> +</field> +<field name="RUN" bitrange="30:30"> +</field> +<field name="RDWR" bitrange="29:29"> +</field> +<field name="ERROR" bitrange="28:28"> +</field> +<field name="SYNC" bitrange="27:27"> +</field> +<field name="PORT" bitrange="26:24"> +</field> +<field name="ADDR" bitrange="23:16"> +</field> +<field name="DATARD" bitrange="15:8"> +</field> +<field name="DATAWR" bitrange="7:0"> +</field> +</reg> +<reg name="VFRAME" addr="0x174" sct="no"> +<field name="EMPTY" bitrange="31:0"> +</field> +</reg> +<reg name="EPNAK" addr="0x178" sct="no"> +<field name="EPTN" bitrange="31:16"> +</field> +<field name="EPRN" bitrange="15:0"> +</field> +</reg> +<reg name="EPNAKEN" addr="0x17c" sct="no"> +<field name="EPTNE" bitrange="31:16"> +</field> +<field name="EPRNE" bitrange="15:0"> +</field> +</reg> +<reg name="CONFIGFLAG" addr="0x180" sct="no"> +<field name="FLAG" bitrange="0:0"> +</field> +</reg> +<reg name="PORTSC1" addr="0x184" sct="no"> +<field name="PTS" bitrange="31:30"> +<value name="UTMI" value="0x0"> +</value> +<value name="PHIL" value="0x1"> +</value> +<value name="ULPI" value="0x2"> +</value> +<value name="SERIAL" value="0x3"> +</value> +</field> +<field name="STS" bitrange="29:29"> +</field> +<field name="PTW" bitrange="28:28"> +</field> +<field name="PSPD" bitrange="27:26"> +<value name="FULL" value="0x0"> +</value> +<value name="LO" value="0x1"> +</value> +<value name="HI" value="0x2"> +</value> +</field> +<field name="PFSC" bitrange="24:24"> +</field> +<field name="PHCD" bitrange="23:23"> +</field> +<field name="WKOC" bitrange="22:22"> +</field> +<field name="WKDS" bitrange="21:21"> +</field> +<field name="WKCN" bitrange="20:20"> +</field> +<field name="PTC" bitrange="19:16"> +<value name="DISABLE" value="0x0"> +</value> +<value name="J" value="0x1"> +</value> +<value name="K" value="0x2"> +</value> +<value name="SE0orNAK" value="0x3"> +</value> +<value name="Packet" value="0x4"> +</value> +<value name="ForceEnableHS" value="0x5"> +</value> +<value name="ForceEnableFS" value="0x6"> +</value> +<value name="ForceEnableLS" value="0x7"> +</value> +</field> +<field name="PIC" bitrange="15:14"> +<value name="OFF" value="0x0"> +</value> +<value name="AMBER" value="0x1"> +</value> +<value name="GREEN" value="0x2"> +</value> +<value name="UNDEF" value="0x3"> +</value> +</field> +<field name="PO" bitrange="13:13"> +</field> +<field name="PP" bitrange="12:12"> +</field> +<field name="LS" bitrange="11:10"> +<value name="SE0" value="0x0"> +</value> +<value name="K" value="0x1"> +</value> +<value name="J" value="0x2"> +</value> +</field> +<field name="HSP" bitrange="9:9"> +</field> +<field name="PR" bitrange="8:8"> +</field> +<field name="SUSP" bitrange="7:7"> +</field> +<field name="FPR" bitrange="6:6"> +</field> +<field name="OCC" bitrange="5:5"> +</field> +<field name="OCA" bitrange="4:4"> +</field> +<field name="PEC" bitrange="3:3"> +</field> +<field name="PE" bitrange="2:2"> +</field> +<field name="CSC" bitrange="1:1"> +</field> +<field name="CCS" bitrange="0:0"> +</field> +</reg> +<reg name="OTGSC" addr="0x1a4" sct="no"> +<field name="DPIE" bitrange="30:30"> +</field> +<field name="ONEMSE" bitrange="29:29"> +</field> +<field name="BSEIE" bitrange="28:28"> +</field> +<field name="BSVIE" bitrange="27:27"> +</field> +<field name="ASVIE" bitrange="26:26"> +</field> +<field name="AVVIE" bitrange="25:25"> +</field> +<field name="IDIE" bitrange="24:24"> +</field> +<field name="DPIS" bitrange="22:22"> +</field> +<field name="ONEMSS" bitrange="21:21"> +</field> +<field name="BSEIS" bitrange="20:20"> +</field> +<field name="BSVIS" bitrange="19:19"> +</field> +<field name="ASVIS" bitrange="18:18"> +</field> +<field name="AVVIS" bitrange="17:17"> +</field> +<field name="IDIS" bitrange="16:16"> +</field> +<field name="DPS" bitrange="14:14"> +</field> +<field name="ONEMST" bitrange="13:13"> +</field> +<field name="BSE" bitrange="12:12"> +</field> +<field name="BSV" bitrange="11:11"> +</field> +<field name="ASV" bitrange="10:10"> +</field> +<field name="AVV" bitrange="9:9"> +</field> +<field name="ID" bitrange="8:8"> +</field> +<field name="HABA" bitrange="7:7"> +</field> +<field name="HADP" bitrange="6:6"> +</field> +<field name="IDPU" bitrange="5:5"> +</field> +<field name="DP" bitrange="4:4"> +</field> +<field name="OT" bitrange="3:3"> +</field> +<field name="HAAR" bitrange="2:2"> +</field> +<field name="VC" bitrange="1:1"> +</field> +<field name="VD" bitrange="0:0"> +</field> +</reg> +<reg name="USBMODE" addr="0x1a8" sct="no"> +<field name="SDIS" bitrange="4:4"> +</field> +<field name="SLOM" bitrange="3:3"> +</field> +<field name="ES" bitrange="2:2"> +</field> +<field name="CM" bitrange="1:0"> +<value name="IDLE" value="0x0"> +</value> +<value name="DEVICE" value="0x2"> +</value> +<value name="HOST" value="0x3"> +</value> +</field> +</reg> +<reg name="ENDPTSETUPSTAT" addr="0x1ac" sct="no"> +<field name="STS" bitrange="15:0"> +</field> +</reg> +<reg name="ENDPTPRIME" addr="0x1b0" sct="no"> +<field name="PETB" bitrange="31:16"> +</field> +<field name="PERB" bitrange="15:0"> +</field> +</reg> +<reg name="ENDPTFLUSH" addr="0x1b4" sct="no"> +<field name="FETB" bitrange="31:16"> +</field> +<field name="FERB" bitrange="15:0"> +</field> +</reg> +<reg name="ENDPTSTATUS" addr="0x1b8" sct="no"> +<field name="ETBR" bitrange="31:16"> +</field> +<field name="ERBR" bitrange="15:0"> +</field> +</reg> +<reg name="ENDPTCOMPLETE" addr="0x1bc" sct="no"> +<field name="ETCE" bitrange="31:16"> +</field> +<field name="ERCE" bitrange="15:0"> +</field> +</reg> +<multireg name="ENDPTCTRLn" base="0x1c0" count="4" offset="0x4" sct=""> +<reg name="ENDPTCTRL0" addr="0x1c0" index="0"> +</reg> +<reg name="ENDPTCTRL1" addr="0x1c4" index="1"> +</reg> +<reg name="ENDPTCTRL2" addr="0x1c8" index="2"> +</reg> +<reg name="ENDPTCTRL3" addr="0x1cc" index="3"> +</reg> +<reg name="ENDPTCTRL4" addr="0x1d0" index="4"> +</reg> +<field name="TXE" bitrange="23:23"> +</field> +<field name="TXR" bitrange="22:22"> +</field> +<field name="TXI" bitrange="21:21"> +</field> +<field name="TXT" bitrange="19:18"> +<value name="ISOCHRONOUS" value="0x1"> +</value> +<value name="BULK" value="0x2"> +</value> +<value name="INT" value="0x3"> +</value> +</field> +<field name="TXS" bitrange="16:16"> +</field> +<field name="RXE" bitrange="7:7"> +</field> +<field name="RXR" bitrange="6:6"> +</field> +<field name="RXI" bitrange="5:5"> +</field> +<field name="RXT" bitrange="3:2"> +</field> +<field name="RXS" bitrange="0:0"> +</field> +</multireg> +</dev> +<dev name="USBPHY" addr="0x8007c000" long_name="USB Physical Interface" desc="Integrated USB 2.0 PHY"> +<reg name="PWD" addr="0x0" sct="yes"> +<field name="RXPWDRX" bitrange="20:20"> +</field> +<field name="RXPWDDIFF" bitrange="19:19"> +</field> +<field name="RXPWD1PT1" bitrange="18:18"> +</field> +<field name="RXPWDENV" bitrange="17:17"> +</field> +<field name="TXPWDCOMP" bitrange="14:14"> +</field> +<field name="TXPWDVBG" bitrange="13:13"> +</field> +<field name="TXPWDV2I" bitrange="12:12"> +</field> +<field name="TXPWDIBIAS" bitrange="11:11"> +</field> +<field name="TXPWDFS" bitrange="10:10"> +</field> +</reg> +<reg name="TX" addr="0x10" sct="yes"> +<field name="USBPHY_TX_EDGECTRL" bitrange="28:26"> +</field> +<field name="USBPHY_TX_SYNC_INVERT" bitrange="25:25"> +</field> +<field name="USBPHY_TX_SYNC_MUX" bitrange="24:24"> +</field> +<field name="TXCMPOUT_STATUS" bitrange="23:23"> +</field> +<field name="TXENCAL45DP" bitrange="21:21"> +</field> +<field name="TXCAL45DP" bitrange="19:16"> +</field> +<field name="TXENCAL45DN" bitrange="13:13"> +</field> +<field name="TXCAL45DN" bitrange="11:8"> +</field> +<field name="TXCALIBRATE" bitrange="7:7"> +</field> +<field name="D_CAL" bitrange="3:0"> +</field> +</reg> +<reg name="RX" addr="0x20" sct="yes"> +<field name="RXDBYPASS" bitrange="22:22"> +</field> +<field name="DISCONADJ" bitrange="5:4"> +</field> +<field name="ENVADJ" bitrange="1:0"> +</field> +</reg> +<reg name="CTRL" addr="0x30" sct="yes"> +<field name="SFTRST" bitrange="31:31"> +</field> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="UTMI_SUSPENDM" bitrange="29:29"> +</field> +<field name="HOST_FORCE_LS_SE0" bitrange="28:28"> +</field> +<field name="DATA_ON_LRADC" bitrange="13:13"> +</field> +<field name="DEVPLUGIN_IRQ" bitrange="12:12"> +</field> +<field name="ENIRQDEVPLUGIN" bitrange="11:11"> +</field> +<field name="RESUME_IRQ" bitrange="10:10"> +</field> +<field name="ENIRQRESUMEDETECT" bitrange="9:9"> +</field> +<field name="ENOTGIDDETECT" bitrange="7:7"> +</field> +<field name="DEVPLUGIN_POLARITY" bitrange="5:5"> +</field> +<field name="ENDEVPLUGINDETECT" bitrange="4:4"> +</field> +<field name="HOSTDISCONDETECT_IRQ" bitrange="3:3"> +</field> +<field name="ENIRQHOSTDISCON" bitrange="2:2"> +</field> +<field name="ENHOSTDISCONDETECT" bitrange="1:1"> +</field> +<field name="ENHSPRECHARGEXMIT" bitrange="0:0"> +</field> +</reg> +<reg name="STATUS" addr="0x40" sct="no"> +<field name="RESUME_STATUS" bitrange="10:10"> +</field> +<field name="OTGID_STATUS" bitrange="8:8"> +</field> +<field name="DEVPLUGIN_STATUS" bitrange="6:6"> +</field> +<field name="HOSTDISCONDETECT_STATUS" bitrange="3:3"> +</field> +</reg> +<reg name="DEBUG" addr="0x50" sct="yes"> +<field name="CLKGATE" bitrange="30:30"> +</field> +<field name="HOST_RESUME_DEBUG" bitrange="29:29"> +</field> +<field name="SQUELCHRESETLENGTH" bitrange="28:25"> +</field> +<field name="ENSQUELCHRESET" bitrange="24:24"> +</field> +<field name="SQUELCHRESETCOUNT" bitrange="20:16"> +</field> +<field name="ENTX2RXCOUNT" bitrange="12:12"> +</field> +<field name="TX2RXCOUNT" bitrange="11:8"> +</field> +<field name="ENHSTPULLDOWN" bitrange="5:4"> +</field> +<field name="HSTPULLDOWN" bitrange="3:2"> +</field> +<field name="DEBUG_INTERFACE_HOLD" bitrange="1:1"> +</field> +<field name="OTGIDPIOLOCK" bitrange="0:0"> +</field> +</reg> +<reg name="DEBUG0_STATUS" addr="0x60" sct="no"> +<field name="SQUELCH_COUNT" bitrange="31:26"> +</field> +<field name="UTMI_RXERROR_FAIL_COUNT" bitrange="25:16"> +</field> +<field name="LOOP_BACK_FAIL_COUNT" bitrange="15:0"> +</field> +</reg> +<reg name="DEBUG1" addr="0x70" sct="yes"> +<field name="ENTAILADJVD" bitrange="14:13"> +</field> +<field name="ENTX2TX" bitrange="12:12"> +</field> +<field name="PLL_IS_240" bitrange="8:8"> +</field> +<field name="DBG_ADDRESS" bitrange="3:0"> +</field> +</reg> +<reg name="VERSION" addr="0x80" sct="no"> +<field name="MAJOR" bitrange="31:24"> +</field> +<field name="MINOR" bitrange="23:16"> +</field> +<field name="STEP" bitrange="15:0"> +</field> +</reg> +</dev> +</soc> |