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-rw-r--r--utils/rk27utils/rk27load/stage1/main.S46
-rw-r--r--utils/rk27utils/rk27load/stage2/crt0.S93
-rw-r--r--utils/rk27utils/rk27load/stage2/irq.S143
-rw-r--r--utils/rk27utils/rk27load/stage2/main.S141
4 files changed, 213 insertions, 210 deletions
diff --git a/utils/rk27utils/rk27load/stage1/main.S b/utils/rk27utils/rk27load/stage1/main.S
index 44e7e2f914..d8a3225fff 100644
--- a/utils/rk27utils/rk27load/stage1/main.S
+++ b/utils/rk27utils/rk27load/stage1/main.S
@@ -2,41 +2,41 @@
.global start
start:
- msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
+ msr cpsr_c,#0xd3 /* enter supervisor mode, disable IRQ/FIQ */
pll_setup:
- mov r0, #0x18000000
- add r0, r0, #0x1c000
+ mov r0,#0x18000000
+ add r0,r0,#0x1c000
/* setup ARM core freq = 200MHz */
/* AHB bus freq (HCLK) = 100MHz */
/* APB bus freq (PCLK) = 50MHz */
- ldr r1, [r0,#0x14] /* SCU_DIVCON1 */
- orr r1, #9 /* ARM slow mode, HCLK:PCLK = 2:1 */
- str r1, [r0,#0x14]
+ ldr r1,[r0,#0x14] /* SCU_DIVCON1 */
+ orr r1,#9 /* ARM slow mode, HCLK:PCLK = 2:1 */
+ str r1,[r0,#0x14]
- ldr r1,=0x01970c70 /* (1<<24) | (1<<23) | (23<<16) | (199<<4) */
- str r1, [r0,#0x08]
+ ldr r1,=0x01970c70 /* (1<<24) | (1<<23) | (23<<16) | (199<<4) */
+ str r1,[r0,#0x08]
- ldr r2,=0x40000
+ ldr r2,=0x40000
1:
- ldr r1, [r0,#0x2c] /* SCU_STATUS */
- tst r1, #1 /* ARM pll lock */
- bne 1f
- subs r2, #1
- bne 1b
+ ldr r1,[r0,#0x2c] /* SCU_STATUS */
+ tst r1,#1 /* ARM pll lock */
+ bne 1f
+ subs r2,#1
+ bne 1b
1:
- ldr r1, [r0,#0x14] /* SCU_DIVCON1 */
- bic r1, #5 /* leave ARM slow mode, ARMclk:HCLK = 2:1 */
- str r1, [r0,#0x14]
+ ldr r1,[r0,#0x14] /* SCU_DIVCON1 */
+ bic r1,#5 /* leave ARM slow mode, ARMclk:HCLK = 2:1 */
+ str r1,[r0,#0x14]
sdram_config:
- add r0, r0, #0x94000 /* SDRAM base */
+ add r0,r0, #0x94000 /* SDRAM base */
- mov r1, #1
- str r1, [r0,#0x10c] /* MCSDR_BASIC Round-robin, SDRAM width 16bits */
+ mov r1,#1
+ str r1,[r0,#0x10c] /* MCSDR_BASIC Round-robin, SDRAM width 16bits */
- add r1, #0x10
- str r1, [r0,#0x108] /* MCSDR_ADDCFG 12 bits row/9 bits col addr */
+ add r1,#0x10
+ str r1,[r0,#0x108] /* MCSDR_ADDCFG 12 bits row/9 bits col addr */
- mov pc, lr /* we are done, return to bootrom code */
+ mov pc,lr /* we are done, return to bootrom code */
diff --git a/utils/rk27utils/rk27load/stage2/crt0.S b/utils/rk27utils/rk27load/stage2/crt0.S
index c85477546d..d931123f95 100644
--- a/utils/rk27utils/rk27load/stage2/crt0.S
+++ b/utils/rk27utils/rk27load/stage2/crt0.S
@@ -1,55 +1,56 @@
-//
-// startup code
-//
-//
+/*
+ * startup code
+ *
+ */
-#define PSR_MODE 0x0000001f
-#define PSR_USR_MODE 0x00000010
-#define PSR_IRQ_MODE 0x00000012
-#define PSR_SVC_MODE 0x00000013
+#define PSR_MODE 0x0000001f
+#define PSR_USR_MODE 0x00000010
+#define PSR_IRQ_MODE 0x00000012
+#define PSR_SVC_MODE 0x00000013
-#define PSR_INT_MASK 0x000000c0
-#define PSR_FIQ_DIS 0x00000040
-#define PSR_IRQ_DIS 0x00000080
+#define PSR_INT_MASK 0x000000c0
+#define PSR_FIQ_DIS 0x00000040
+#define PSR_IRQ_DIS 0x00000080
.section .init.text,"ax",%progbits
.global start
.extern _interrupt_disable
-// -----------------------------------------------------
-// startup code (setup stacks, branch to main)
-// -----------------------------------------------------
+/* -----------------------------------------------------
+ * startup code (setup stacks, branch to main)
+ * -----------------------------------------------------
+ */
start:
- // setup IRQ stack
- mov r0, #(PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
- msr cpsr, r0
- ldr sp,=irqstackend
-
- // setup SVC stack
- mov r0, #(PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
- msr cpsr, r0
- ldr sp,=stackend
-
- // disbale interrupts
- mrs r0, cpsr
- orr r0, r0, #0xc0
- msr cpsr_c, r0
-
- // remap
- mov r0, #0x18000000
- add r0, r0, #0x1C000
- ldr r1,=0xdeadbeef
- str r1, [r0, #4]
-
- // relocate itself
- ldr r0,=_relocstart
- ldr r1,=_relocend
- ldr r2,=0x0
+ /* setup IRQ stack */
+ mov r0,#(PSR_IRQ_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
+ msr cpsr,r0
+ ldr sp,=irqstackend
+
+ /* setup SVC stack */
+ mov r0,#(PSR_SVC_MODE|PSR_FIQ_DIS|PSR_IRQ_DIS)
+ msr cpsr,r0
+ ldr sp,=stackend
+
+ /* disbale interrupts */
+ mrs r0,cpsr
+ orr r0,r0,#0xc0
+ msr cpsr_c, r0
+
+ /* remap */
+ mov r0,#0x18000000
+ add r0,r0,#0x1C000
+ ldr r1,=0xdeadbeef
+ str r1,[r0,#4]
+
+ /* relocate itself */
+ ldr r0,=_relocstart
+ ldr r1,=_relocend
+ ldr r2,=0x0
1:
- cmp r1,r0
- ldrhi r3,[r0],#4
- strhi r3,[r2],#4
- bhi 1b
-
- // continue running in SVC (supervisor mode)
- ldr pc,=0x0
+ cmp r1,r0
+ ldrhi r3,[r0],#4
+ strhi r3,[r2],#4
+ bhi 1b
+
+ /* continue running in SVC (supervisor mode) */
+ ldr pc,=0x0
diff --git a/utils/rk27utils/rk27load/stage2/irq.S b/utils/rk27utils/rk27load/stage2/irq.S
index 043bf185a5..29ffdb49bb 100644
--- a/utils/rk27utils/rk27load/stage2/irq.S
+++ b/utils/rk27utils/rk27load/stage2/irq.S
@@ -1,103 +1,102 @@
- .section .text
- .align 4
+.section .text
+.align 4
- .global irq_handler
- #define BUFF_ADDR 0x60800000
+.global irq_handler
+#define BUFF_ADDR 0x60800000
irq_handler:
- stmfd sp!, {r0-r7, ip, lr}
+ stmfd sp!,{r0-r7,ip,lr}
- // get interrupt number
- mov r4, #0x18000000
- add r4, r4, #0x80000
- ldr r5, [r4, #0x104]
- and r5, r5, #0x1f
- cmp r5, #0x10 // UDC interrupt
+ /* get interrupt number */
+ mov r4,#0x18000000
+ add r4,r4,#0x80000
+ ldr r5,[r4,#0x104]
+ and r5,r5,#0x1f
+ cmp r5,#0x10 /* UDC interrupt */
- bleq udc_irq
+ bleq udc_irq
- // clear pending interrupt
- mov r3, #1
- mov r2, r3, LSL r5
- str r2, [r4, #0x118]
+ /* clear pending interrupt */
+ mov r3,#1
+ mov r2,r3,LSL r5
+ str r2,[r4,#0x118]
- ldmfd sp!, {r0-r7, ip, lr}
- subs pc, lr, #4
+ ldmfd sp!,{r0-r7,ip,lr}
+ subs pc,lr,#4
udc_irq:
- stmfd sp!, {r4-r8, lr}
+ stmfd sp!,{r4-r8,lr}
- // handle usb interrupt
- ldr r4,=0x180A0000
- ldr r5, [r4, #0x18] // UDC_INTFLAG
+ /* handle usb interrupt */
+ ldr r4,=0x180A0000
+ ldr r5,[r4,#0x18] /* UDC_INTFLAG */
- // ep0 in intr
- tst r5, #0x04
- beq bulk_recv_intr
+ /* ep0 in intr */
+ tst r5,#0x04
+ beq bulk_recv_intr
+ep0:
+ ldr r5,[r4,#0x40]
+ mov r5,r5,lsr #10
+ mov r5,r5,lsl #10 /* clear lower 10 bits in TX0STAT */
+ str r5,[r4,#0x40]
- // write_reg32(UDC_TX0STAT, read_reg32(UDC_TX0STAT) & ~0x7FF);
- ldr r5, [r4, #0x40]
- mov r5, r5, lsr #10
- mov r5, r5, lsl #10 // clear clower 10 bits
- str r5, [r4, #0x40]
+ /* set buffer addres in UDC_DMA0LM_OADDR */
+ mov r5,#0x60000000
+ str r5,[r4, #0x3c]
- // write_reg32(UDC_DMA0LM_OADDR, (uint32_t)(state.ctrlep_data));
- mov r5, #0x60000000
- str r5, [r4, #0x3c]
+ /* write DMA_START in UDC_DMA0CTLO */
+ mov r5,#1
+ str r5,[r4,#0x38]
- // write_reg32(UDC_DMA0CTLO, read_reg32(UDC_DMA0CTLO) | ENP_DMA_START);
- mov r5, #1
- str r5, [r4, #0x38]
+ ldmfd sp!,{r4-r8,pc}
- ldmfd sp!, {r4-r8, pc}
-
-// bulk out interrupt
+/* bulk out interrupt */
bulk_recv_intr:
- tst r5, #0x100
- ldmeqfd sp!, {r4-r8, pc}
+ tst r5,#0x100
+ ldmeqfd sp!,{r4-r8,pc}
- // read UDC_RX1STAT
- ldr r5, [r4, #0x54]
- mov r5, r5, lsl #21
- mov r5, r5, lsr #21 // r5 = length
+ /* read UDC_RX1STAT */
+ ldr r5,[r4,#0x54]
+ mov r5,r5,lsl #21
+ mov r5,r5,lsr #21 /* r5 = length */
- ldr r6,=usb_sz
- ldr r6, [r6]
- ldr r7, [r6] // r7 = total_code_length expected
+ ldr r6,=usb_sz
+ ldr r6,[r6]
+ ldr r7,[r6] /* r7 = total_code_length expected */
- subs r7, r7, r5
- bne usb_bulk_out1_recv
+ subs r7,r7,r5
+ bne usb_bulk_out1_recv
- // copy from buff to the begining of the ram
- ldr r0,=BUFF_ADDR
- ldr r1,[r0,#-4] // size
+ /* copy from buff to the begining of the ram */
+ ldr r0,=BUFF_ADDR
+ ldr r1,[r0,#-4] /* size */
- ldr r1,=0x800000 // buffer size
+ ldr r1,=0x800000 /* buffer size */
- add r1,r1,r0 // end address
- ldr r2,=0x60000000 // destination
+ add r1,r1,r0 /* end address */
+ ldr r2,=0x60000000 /* destination */
1:
- cmp r1,r0
- ldrhi r3,[r0],#4
- strhi r3,[r2],#4
- bhi 1b
+ cmp r1,r0
+ ldrhi r3,[r0],#4
+ strhi r3,[r2],#4
+ bhi 1b
- // execute user code
- ldr r0,=0x60000000
- bx r0 // jump to 0x60000000
+ /* execute user code */
+ ldr r0,=0x60000000
+ bx r0 /* jump to 0x60000000 */
usb_bulk_out1_recv:
- str r7, [r6] // size = size - received
+ str r7,[r6] /* size = size - received */
- ldr r6,=usb_write_addr
- ldr r7, [r6]
+ ldr r6,=usb_write_addr
+ ldr r7,[r6]
- add r7, r7, r5
- str r7, [r6] // usb_write_addr += length
+ add r7,r7,r5
+ str r7,[r6] /* usb_write_addr += length */
- str r7, [r4, #0x60] // DMA1LM_OADDR = usb_write_addr
+ str r7,[r4,#0x60] /* DMA1LM_OADDR = usb_write_addr */
- mov r5, #1
- str r5, [r4, #0x5c] // DMA1_CTL0 = ENP_DMA_START
+ mov r5,#1
+ str r5,[r4,#0x5c] /* DMA1_CTL0 = ENP_DMA_START */
- ldmfd sp!, {r4-r8, pc}
+ ldmfd sp!,{r4-r8,pc}
diff --git a/utils/rk27utils/rk27load/stage2/main.S b/utils/rk27utils/rk27load/stage2/main.S
index c8474b0579..14e83e0d01 100644
--- a/utils/rk27utils/rk27load/stage2/main.S
+++ b/utils/rk27utils/rk27load/stage2/main.S
@@ -1,89 +1,92 @@
+.section .text
+.align 4
- .section .text
- .align 4
-
- .arm
-
- .global main
- .global _interrupt_disable
- .global _interrupt_enable
+.arm
- .global usb_write_addr
- .global usb_sz
+.global main
+.global _interrupt_disable
+.global _interrupt_enable
- #define BUFF_ADDR 0x60800000
+.global usb_write_addr
+.global usb_sz
-// -----------------------------------------------------
-// vector table
-// -----------------------------------------------------
- ldr pc, =main
- ldr pc, =main
- ldr pc, =main
- ldr pc, =main
- ldr pc, =main
- ldr pc, =main
- ldr pc, =irq_handler
- ldr pc, =main
+#define BUFF_ADDR 0x60800000
-// -----------------------------------------------------
-// main
-// -----------------------------------------------------
+/* -----------------------------------------------------
+ * vector table
+ * -----------------------------------------------------
+ */
+ ldr pc,=main
+ ldr pc,=main
+ ldr pc,=main
+ ldr pc,=main
+ ldr pc,=main
+ ldr pc,=main
+ ldr pc,=irq_handler
+ ldr pc,=main
+
+/* -----------------------------------------------------
+ * main
+ * -----------------------------------------------------
+ */
main:
- // turn on usb interrupts
- mov r0, #0x18000000
- add r0, r0, #0x80000
- ldr r1, [r0, #0x10c]
- orr r1, r1, #0x10000
- str r1, [r0, #0x10c]
+ /* turn on usb interrupts */
+ mov r0,#0x18000000
+ add r0,r0,#0x80000
+ ldr r1,[r0,#0x10c]
+ orr r1,r1,#0x10000
+ str r1,[r0,#0x10c]
- // enable usb-bulk
- add r0, r0, #0x20000 // R0 = 0x180A0000 (UDC_BASE)
+ /* enable usb-bulk */
+ add r0,r0,#0x20000 /* R0 = 0x180A0000 (UDC_BASE) */
- // enable EP1, write_reg32(UDC_RX1CON, (0x1 << 8) | RxACKINTEN | RxEPEN);
- mov r1, #0x190 // bits 8,7,4 -> 0x190
- str r1, [r0, #0x58]
-
- // setup receive buffer (must be aligned on dword boundary)
- ldr r1,=usb_write_addr // write_reg32(UDC_DMA1LM_OADDR, (uint32_t)rx_buff);
- ldr r1, [r1]
- str r1, [r0, #0x60] // UDC_DMA1LM_OADDR = usb_write_addr
-
- // write_reg32(UDC_DMA1CTRLO, read_reg32(UDC_DMA1CTRLO) | ENP_DMA_START);
- ldr r1, [r0, #0x5c]
- orr r1, r1, #2
- str r1, [r0, #0x5c]
+ /* enable EP1 */
+ mov r1,#0x190 /* bits 8,7,4 -> 0x190 */
+ str r1,[r0,#0x58]
+
+ /* setup receive buffer (must be aligned on dword boundary) */
+ ldr r1,=usb_write_addr
+ ldr r1,[r1]
+ str r1,[r0, #0x60] /* UDC_DMA1LM_OADDR = usb_write_addr */
+
+ /* write DMA_START in UDC_DMA1CTRLO */
+ ldr r1,[r0,#0x5c]
+ orr r1,r1,#2
+ str r1,[r0,#0x5c]
- // enable bulk_out1 interrupt
- ldr r1, [r0, #0x14] // UDC_ENINT
- orr r1, r1, #0x100 // EN_BOUT1_INTR
- str r1, [r0, #0x14]
+ /* enable bulk_out1 interrupt */
+ ldr r1,[r0,#0x14] /* UDC_ENINT */
+ orr r1,r1,#0x100 /* EN_BOUT1_INTR */
+ str r1,[r0,#0x14]
- bl _interrupt_enable
+ bl _interrupt_enable
idle:
- b idle
+ b idle
-// -----------------------------------------------------
-// _interrupt_enable - enables interrupts
-// -----------------------------------------------------
+/* -----------------------------------------------------
+ * _interrupt_enable - enables interrupts
+ * -----------------------------------------------------
+ */
_interrupt_enable:
- mrs r0, cpsr
- bic r0, r0, #0x80
- msr cpsr_c, r0
- mov pc, lr
+ mrs r0,cpsr
+ bic r0,r0,#0x80
+ msr cpsr_c,r0
+ mov pc,lr
-// -----------------------------------------------------
-// _interrupt_disable - disables interrupts
-// -----------------------------------------------------
+/* -----------------------------------------------------
+ * _interrupt_disable - disables interrupts
+ * -----------------------------------------------------
+ */
_interrupt_disable:
- mrs r0, cpsr
- orr r0, r0, #0xc0
- msr cpsr_c, r0
- mov pc, lr
+ mrs r0,cpsr
+ orr r0,r0,#0xc0
+ msr cpsr_c,r0
+ mov pc,lr
- .section .data
+.section .data
usb_write_addr:
- .word (BUFF_ADDR-4)
+ .word (BUFF_ADDR-4)
usb_sz:
- .word (BUFF_ADDR-4)
+ .word (BUFF_ADDR-4)