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NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
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Change-Id: Ib9d569886abf66a23f6569b6b44acf155a65009d
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The old max dma transfer size was set to 2^15 because allowing
values up to 2^16 would result in overflow of the transfer count
in many places. This was a problem with the old register headers
because the macros didn't make sure the result is contained in
the bitmask of the field. The new macro do so 2^16 will actually
end up being 0 which means 2^16 for the hardware. This is kind of
hacky but it works and I prefer that this stays a power of two
because setting it to 2^16-1 would be extremely weird.
Change-Id: I9ce5661c477a79ab52efd5c573948e2353117804
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Add finer granularity to start command: now commands can be
prepared, schedule and semaphore increased independently.
Change-Id: Ib1ed1f20f4b46dc61b6dbab6ddec8b54e3d832b9
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Change-Id: If73b84d9c9f4a152a54fb9d2dbec895e72d2e753
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Change-Id: Iada56b34d0517851859e60f064a2e9032c2f0fe2
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Change-Id: Ie65920b1192e9b737fcc2554d280fbcedfa39800
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Reduce DMA maximum transfer size since transfering 64Kb requires
to set a size of 0 and it's not worth adding checks everywhere
to handle this special case. Also add statistics about unaligned
transfer (wrt to cache). Update debug screen accordingly and
simplify it so it can fit smaller screens too.
Change-Id: I18391702f5e100a21f6f8d1ebab28d9f2bd8c66f
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Because DMA descriptors needs to be committed and discarded from
the cache, if they are not cache aligned and/or if their size
is not a multiple of cache ligne, nasty side effects could occur
with adjacents data. The same applies to DMA buffers which are
still potentially broken. Add a macro to ensure that these
constraints will not break by error in the future.
Change-Id: I1dd69a5a9c29796c156d953eaa57c0d281e79846
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Change-Id: I462cfa338ded85aca4bb00ec91f144bb17136dbe
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returning; fix typo
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30795 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30526 a1c6a512-1295-4272-9138-f99709370657
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- enable MMU
-rework lcd frame buffer
- add rtc/adc/power stubs (or not)
- fix a few MMC related defines (hopefully)
- implement cache handling for DMA
- more SD work
- add keymap (based on clip)
- add virtual buttons
- update linker scripts
- big step toward apps actually compiling
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30200 a1c6a512-1295-4272-9138-f99709370657
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correct, reduce code size of lcd init sequences
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30120 a1c6a512-1295-4272-9138-f99709370657
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code, update storage to SD + MMC, beginning of the driver
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30010 a1c6a512-1295-4272-9138-f99709370657
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