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The new driver provides several new features:
- asynchronous transfer
- transactions (several transfers executed at once)
- queueing
The style still provides the legacy interface.
Change-Id: I6d8ecc89d1f7057847c9b2dc69b76cd45c9c8407
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NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
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Change-Id: Ie9cf8c8bb0a89d9cbcc795e04559864b9fbaf639
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These functions are mostly used by the radio drivers and any blocking
call could potentially block the entire UI, which is pretty bad.
Since any request is expected to finish within a few us, having a 10ms
timeout doesn't seem unreasonable.
Change-Id: I03b19729511547e5bbdeb3476d020e5d87d0d7e1
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On targets like stmp3700, resetting the dma channel on "soft" timeout
drives the whole block crazy unless it goes through complete reset.
Change-Id: I830b252279989bf9f9cd9c138240a6ea9b003527
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Change-Id: I88e369dd7fa289f054837b442983bb7c97a58c53
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Change-Id: I569dba9c172ec3927cf8a26ee4e58e189addc728
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The i2c core has some bugs: it locks up when the slave doesn't NAK and
prevent the dma channel from being resetted. Specifically handle this
situation by setting CLR_GOT_A_NAK (workaround) and then reset dma and i2c
block.
Change-Id: I0e09d38d4301a0ad42dfad785cc934b43f2c4485
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Change-Id: I3309ce112762f09fcf6bce9d416dbf4b0aa2f197
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A number of pins on the imx233 are standard and manually calling
functions to acquire, set function/drive/output is painful. This
will become unmanageable when we will add support for the other
stmp chips.
Introduce the concept of virtual pin which is a way to completely
describe a virtual pin (virtual because pins are muxed).
Change-Id: I01b6e040945648e58e1d1abab06529c9571c5f10
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The current pinctrl functions were a mess. Normalise the functions
names to make them shorter and clearer.
Change-Id: Iac6ff84625ef2b7610268e3a5802dc0088de3167
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Change-Id: If73b84d9c9f4a152a54fb9d2dbec895e72d2e753
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Change-Id: Ieffb389fb74404e86d8ba51ee8c48bab6b299763
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Change-Id: Ie65920b1192e9b737fcc2554d280fbcedfa39800
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There are tricky DMA/cache related issue on the imx233 which could
pop up with the old driver. The new one ensures that all dma
tranfers are cache safe by using an intermediate buffer.
Change-Id: I72060682d1c285c83ae16455cfdb62f372b5d687
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Because DMA descriptors needs to be committed and discarded from
the cache, if they are not cache aligned and/or if their size
is not a multiple of cache ligne, nasty side effects could occur
with adjacents data. The same applies to DMA buffers which are
still potentially broken. Add a macro to ensure that these
constraints will not break by error in the future.
Change-Id: I1dd69a5a9c29796c156d953eaa57c0d281e79846
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Change-Id: Ib707a0b87d01f24eeccc39c6cbc1c015456fd503
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The icoll code now has an IRQ storm detection mechanism which
will prevent the device from hard freezing in case it happen.
Change-Id: I9861238dce61d29af1e48f9c534ec63a7f23465c
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Past development has proved that one can mistakely use
the same pin for two uses without noticing. Since this
causes extremely hard to find bugs, the infrastructure
will allow to register pin uses and panic when a conflict
is detected. The pinctrl debug now shows the pin uses
when its support is compiled in.
Change-Id: Idb2d5235ce09207d77aa474d6f158e72b933761a
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Only enable fmradio_i2c once with _init() called from system.
Move actual i2c init to system for consistency.
Move tuner power pin setup to power instead of fmradio.
Change-Id: Idb56bfba5803f71b5d049f174c48d2afb969a6ea
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30536 a1c6a512-1295-4272-9138-f99709370657
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- enable MMU
-rework lcd frame buffer
- add rtc/adc/power stubs (or not)
- fix a few MMC related defines (hopefully)
- implement cache handling for DMA
- more SD work
- add keymap (based on clip)
- add virtual buttons
- update linker scripts
- big step toward apps actually compiling
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30200 a1c6a512-1295-4272-9138-f99709370657
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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30121 a1c6a512-1295-4272-9138-f99709370657
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