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2020-07-28imx233: rtc: generalize PERSISTENT0 fixMoshe Piekarski1-1/+4
Change-Id: Id8452055534df239dcf5e535943ee918a93ec10c
2020-07-27imx233: rtc: Initialize PERSISTENT0 registerMoshe Piekarski1-0/+1
Prevents the rtc from breaking on power removal Change-Id: I1e434285ccc27d864d2fd9454993d02cae32711d
2020-07-15imx233: rtc: Explicitly clear the soft reset bit when initializingSolomon Peachy1-0/+2
If we come up and the RTC is in a reset state, we need to release that before trying to initialze anything else. (See IMX23RM 23.8.1 and 39.3.10) Change-Id: I1820ab771ba81f7d428d07040b7d188d9f688127
2016-05-28imx233: generate register headers using headergen_v2 and update code for itAmaury Pouly1-1/+1
NOTE: this commit does not introduce any change, ideally even the binary should be almost the same. I checked the disassembly by hand and there are only a few differences here and there, mostly the compiler decides to compile very close expressions slightly differently. I tried to run the new code on several targets to make sure and saw no difference. The major syntax changes of the new headers are as follows: - BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once: BF_WR(reg, field1(value1), field2(value2), ...) - BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW - there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply BF_WR with field_V(name) - the old BF_SETV macro has no trivial equivalent and is replaced with its its equivalent for BF_WR(reg_SET, ...) I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the redundant "regs". Final note: the registers were generated using the following command: ./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2014-02-10imx233: always disable watchdog on bootAmaury Pouly1-5/+19
Change-Id: I2e81b038b783968aa18ef3398d6e2aa66a2fee7c
2013-07-02imx233: implement alarm wake upAmaury Pouly1-0/+8
This adds the application part of alarm wake up. On some targets like the Fuze+, it will also require a bootloader change to make sure that the device doesn't power down on alarm wake up (for example on the Fuze+ the bootloader requires the power button to be hold sufficiently long, thus preventing alarm wake up to work) Change-Id: I5d01957852355fddbd48110d3d75a5533f07879e
2013-06-16imx233: rewrite rtc using new registersAmaury Pouly1-58/+7
Change-Id: I30794dac2175d5717ea8e05e911abec65a214c44
2012-05-19imx233: add rtc functions related to msecAmaury Pouly1-0/+14
Change-Id: I3ed7469150920f3d7ac6c4218c2165fec547a422
2011-12-31imx233/fuze+: implement rtc (time only, alarm still to implement)Amaury Pouly1-1/+73
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31473 a1c6a512-1295-4272-9138-f99709370657
2011-10-18imx233/fuze+: add prototype for rtc block (only for register defines for now)Amaury Pouly1-0/+37
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30799 a1c6a512-1295-4272-9138-f99709370657