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2016-05-28imx233: simplify timrot APIAmaury Pouly1-0/+26
The old timrot setup API was very low-level and unfriendly. The new one makes in easier to select the frequency source. Use to simplify timer and kernel timer code. Change-Id: Iffcdf11c00e925be9ec8d9a4efc74b197b6bd2aa
2016-05-28imx233: generate register headers using headergen_v2 and update code for itAmaury Pouly1-2/+0
NOTE: this commit does not introduce any change, ideally even the binary should be almost the same. I checked the disassembly by hand and there are only a few differences here and there, mostly the compiler decides to compile very close expressions slightly differently. I tried to run the new code on several targets to make sure and saw no difference. The major syntax changes of the new headers are as follows: - BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once: BF_WR(reg, field1(value1), field2(value2), ...) - BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW - there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply BF_WR with field_V(name) - the old BF_SETV macro has no trivial equivalent and is replaced with its its equivalent for BF_WR(reg_SET, ...) I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the redundant "regs". Final note: the registers were generated using the following command: ./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
2014-02-10imx233: add hardware and software watchdogAmaury Pouly1-0/+1
The hardware watchdog automatically shutdown the device after 10s of inactivity, being defined as 10s without the tick IRQ fired (aka braindead device). The software IRQ mechanism is more interesting: it uses a very high priority timer setup as one-shot to trigger after 5s of inactivity (but IRQ still enabled). When detected, it patches the running code to insert a SWI instruction so that on interrupt return it will trigger a SWI and produce a meaningfull backtrace to debug the deadlock. This should allow to debug freezes in IRQ context. Change-Id: Ic55dad01201676bfb6dd79e78e535c6707cb88e6
2014-02-10imx233: increase audio DAC IRQ priorityAmaury Pouly1-0/+2
This should hopefully fix some audio glitches Change-Id: Ic9701d281e7559c9d93fcb8dad9373caaad9bfb6
2014-02-10imx233: clean timrot a bitAmaury Pouly1-1/+19
Change-Id: Ic803a6b5c93978cd3246e553579ac8a1ba35e191
2013-06-16imx233: rewrite timrot using new register headersAmaury Pouly1-24/+1
Change-Id: Ia6dc7ac7e1fdf471a518111f5593bd96bc3acfac
2011-09-06imx233/fuze+: implement user time api, implement a stub function, protect ↵Amaury Pouly1-0/+1
timrot against irq git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30437 a1c6a512-1295-4272-9138-f99709370657
2011-05-01Sansa Fuze+: initial commit (bootloader only, LCD basically working)Amaury Pouly1-0/+57
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29808 a1c6a512-1295-4272-9138-f99709370657
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