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path: root/firmware/target/coldfire/iriver/system-iriver.c
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2011-02-02Clean up multiple definitions of RAM size. Remove -DMEM (make) and MEM ↵Andree Buschmann1-1/+1
(code), use the already defined MEMORYSIZE instead. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29189 a1c6a512-1295-4272-9138-f99709370657
2009-01-13Reverting parts of r19760 that was mistakenly committed.Björn Stenberg1-79/+77
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19761 a1c6a512-1295-4272-9138-f99709370657
2009-01-13Minor Clip button changes: UP|REPEAT no longer goes to wps. Volume ↵Björn Stenberg1-77/+79
adjustment activated in list + tree. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19760 a1c6a512-1295-4272-9138-f99709370657
2008-06-28Updated our source code header to explicitly mention that we are GPL v2 orDaniel Stenberg1-2/+4
later. We still need to hunt down snippets used that are not. 1324 modified files... http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
2007-10-02Thanks to LinusN, fix Coldfire bootloaders not booting - FS#7533Steve Bavin1-4/+5
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14949 a1c6a512-1295-4272-9138-f99709370657
2007-07-26Fix red bootloader builds. * Fix non-working PP5022 bootloaders. Also define ↵Jens Arnold1-0/+4
correct IRAM size for PP5022/PP5024 bootloaders. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14015 a1c6a512-1295-4272-9138-f99709370657
2007-04-21Coldfire targets: Adjusted PLL settings (lowest possible VCO clock for each ↵Jens Arnold1-18/+18
setting) and IDE timing (especially it's faster now on M5+X5). * Added/updated table showing the necessary settings (PLL, refresh, waitstates, IDE timing) for each possible clock frequency. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13230 a1c6a512-1295-4272-9138-f99709370657
2007-02-18Do the CONFIG_USBOTG define correctlyJonathan Gordon1-3/+3
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12382 a1c6a512-1295-4272-9138-f99709370657
2007-02-18CONFIG_USBOTG fixesJonathan Gordon1-3/+3
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12377 a1c6a512-1295-4272-9138-f99709370657
2007-02-05New PLL calculations to make sure that PLLDIV != 0. This seems to solve the ↵Linus Nielsen Feltzing1-12/+13
problem with the troublesome H140 batch from OutletMP3. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12201 a1c6a512-1295-4272-9138-f99709370657
2006-12-08iRiver: Clearing CRSEL bit when using default CPU frequency caused audio ↵Michael Sevakis1-2/+2
chip to run at half frequency when radio screen called cpu_idle_mode(true) and corresponding high end loss after kepress timeout. CRSEL was originally preserved when bypassing PLL. CRSEL shouldn't have any bearing on PSTCLK or SCLK when PLL is bypassed since the dividers are bypassed as well (except for the divX2 for SCLK). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11695 a1c6a512-1295-4272-9138-f99709370657
2006-12-06PLL was incorrectly initialized causing system to crash when ran fromMiika Pekkarinen1-4/+4
ROM. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11669 a1c6a512-1295-4272-9138-f99709370657
2006-11-06Big Patch adds primarily: Samplerate and format selection to recording for ↵Michael Sevakis1-3/+4
SWCODEC. Supprort for samplerates changing in playback (just goes with the recording part inseparably). Samplerates to all encoders. Encoders can be configured individually on a menu specific to the encoder in the recording menu. File creation is delayed until flush time to reduce spinups when splitting. Misc: statusbar icons for numbers are individual digits to display any number. Audio buffer was rearranged to maximize memory available to recording and properly reinitialized when trashed. ColdFire PCM stuff moved to target tree to avoid a complicated mess when adding samplerate switching. Some needed API changes and to neaten up growing gap between hardware and software codecs. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11452 a1c6a512-1295-4272-9138-f99709370657
2006-11-02H300: (1) Use DMA for LCD updates, with auto-aligned line reads. Speeds up ↵Jens Arnold1-1/+23
LCD updates by ~ 75% at 11MHz and 45MHz. Only ~ 11% speedup at 124MHz due to (2). (2) Less aggressive LCD transfer timing at 124MHz. With the previous timing, slightly corrupted display contents was reported, and with DMA transfers at least 4 waitstates are needed to make updates work at all. * A table in system-iriver.c shows settings for all integer multiples of the base clock frequency (info for developers, not yet complete). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11418 a1c6a512-1295-4272-9138-f99709370657
2006-10-30move the iriver h1x0/h3x0 targets to the target treeJonathan Gordon1-0/+133
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11392 a1c6a512-1295-4272-9138-f99709370657