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path: root/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c
AgeCommit message (Expand)AuthorFilesLines
2020-08-29jz4760: do the MSC (ie SD) clocking setup when we change PLL0Solomon Peachy1-25/+9
2020-08-25jz4760: SD driver enhancements:Solomon Peachy1-41/+90
2020-08-25jz4760: Give each SD interface its own DMA channel, semaphore, and mutexSolomon Peachy1-87/+164
2020-08-07jz4760: Support dynamic reclocking!Solomon Peachy1-4/+12
2019-07-29XduooX3: Uncomment code that prevented hotswap from working.Solomon Peachy1-2/+2
2019-06-02jz7460: Disable IRQ-driven DMA transfers.Solomon Peachy1-1/+1
2018-09-20jz4760: Enhancements and fixes to SD driver.Solomon Peachy1-279/+239
2018-09-20jz7640: SD driver improvements:Solomon Peachy1-27/+25
2018-09-20jz74x0: MSC clock needs to be divided from PLL clock.Solomon Peachy1-1/+4
2018-09-20jz4760: Greatly enhance debug code and silence some compilation warnings.Solomon Peachy1-2/+3
2018-07-28Add cleaned-up xDuoo X3 supportSolomon Peachy1-0/+1487