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2020-09-17jz4760: Heavily rework USB driver to add working DMA supportSolomon Peachy2-139/+245
* DMA Bulk IN (ie our TX) results in sequential transfers 33-68% faster. * DMA Bulk OUT (ie RX) is mostly stripped out due to complete brokenness. * Interrupt and control endpoints remain PIO-driven. Other improvements: 1) Use consistent endpoint references (no magic numbers) 2) Greatly enhanced logging 3) DMA support can be compiled out completely 4) Setting lockswitch will disable all DMA operations at runtime 5) Much more robust error checking and recovery Change-Id: I57b82e655e55ced0dfe289e379b0b61d8fe443b4
2020-09-17Xduoo X3 add headphone and lineout status to IO Ports debug menuWilliam Wilgus1-13/+30
Change-Id: I9caf55c1249625dff7e437158afd20a526fa7499
2020-09-13Xduoo X3 no ADC after ROLOWilliam Wilgus1-0/+6
Speachy suggested we don't shut down the adc on ROLO this fixes the random adc drop out on ROLO Change-Id: Ife7d679ce51a6f767963210ee650815f1de12223
2020-09-13Xduoo X3 Add tree scrolling FS#13240, Emulate Multibutton pressesWilliam Wilgus2-19/+50
Fixes deficiencies with the button system on the X3 The x3 has an interesting button layout. Multiple key presses are NOT supported unless [BUTTON_POWER] is one of the combined keys As you can imagine this causes problems as the power button takes precedence in the button system and initiates a shutdown if the key is held too long instead of BUTTON_POWER use BUTTON_PWRALT in combination with other keys IF using as a prerequsite button then BUTTON_POWER should be used Multiple buttons are emulated by button_read_device but there are a few caveats to be aware of: Button Order Matters! different keys have different priorities, higher priority keys 'overide' the lower priority keys VOLUP[7] VOLDN[6] PREV[5] NEXT[4] PLAY[3] OPTION[2] HOME[1] There will be no true release or repeat events, the user can let off the button pressed initially and it will still continue to appear to be pressed as long as the second key is held Tree scrolling is PLAY+NEXT or PLAY+PREV Change-Id: I88dfee1c70a6a99659e8227f5becacc50cc43910
2020-09-08XduooX3 LCD tweaks #2William Wilgus1-48/+110
Group commands for a bit more speed bitdelay was not being inlined lower bitdelay to 12 cycles Clean-up magic numbers Change-Id: Ifeb57a5532807a598f1ec5e1c55f03e4aa1e133f
2020-09-06XduooX3 Gpio reconfigure button system #2William Wilgus1-79/+45
Fix issue with first battery sample taking 30 seconds Clean up code Change-Id: If2437d241e0ab4e3d23b141f5d853b6cf3209b07
2020-09-06jz4760: Fix and re-enable the hardware udelay() timerSolomon Peachy1-12/+19
Change-Id: I591b4f023776b3501fce03e08bfc87a355f4c69b
2020-09-06jz4760: Use a #define for the timer id, not a raw numberSolomon Peachy1-15/+17
Change-Id: Ic31267a2ae82beede72100c1cc5ddf7211aa0abe
2020-09-05mips: Convert 'nop' to 'ssnop' -- for future-proofingSolomon Peachy6-77/+77
Change-Id: I17625f4d56a1f5205887cb47668a2dcb628053f4
2020-09-04jz47xx: Audio path tweaks:Solomon Peachy4-0/+6
* Increase audio buffer size to better handle IRQ latency (256->2048) * Ensure DMA engine is idle prior to starting transfers * Set AIC to repeat last sample in case of underflows Change-Id: I9c45c20481ee072e5882b7586fb7d50bd8ef2f35
2020-09-03Xduoo Gpio fix bugWilliam Wilgus1-0/+3
Change-Id: I76eda59a391a408d1a6642497d8cc4aeb93a0da1
2020-09-03mips: Heavily rework DMA & caching codeSolomon Peachy15-127/+186
Based on code originally written by Amaury Pouly (g#1789, g#1791, g#1527) but rebased and heavily updated. Change-Id: Ic794abb5e8d89feb4b88fc3abe854270fb28db70
2020-09-03XduooX3 Gpio reconfigure button systemWilliam Wilgus1-14/+69
only check button values with adc when buttons are actually pressed battery level check frequency is now around 30 seconds switched to polling for the battery voltage w/ timeout Ifdef functions Allow BACK OPTION PLAY to be the first of a two key combo Change-Id: Icb48d62ac8d82b4dc931df5e1c5b4a84a9a69772
2020-09-02jz4760: Dial down PIXCLK as low as possibleSolomon Peachy1-0/+3
We don't use it on the X3. Should we ever get another jz4760 target we can revisit this. Change-Id: I591d02c7e47b35424b3c96b776b31a38e3c8ceee
2020-09-02xduoox3: Disable the LCD and MSC0 clocks as we don't use themSolomon Peachy2-2/+5
Change-Id: If2261aed464fcbe3ea1f036dd18376fa8ff42e69
2020-09-02XduooX3 Slow down greylib framerateWilliam Wilgus1-1/+4
halves cpu usage Change-Id: I3797b01ecd2f7615acfed53a77d8a1f51e947c8b
2020-09-02XduooX3 Debug Menu -- HW_infoWilliam Wilgus1-128/+339
add scrolling for clocks and such moved to a switch based structure.. this ends up a lot cleaner Change-Id: I940506c4b8dc73f0b776d20810780527cbf7e0d4
2020-09-02mips: use .set push/pop in asm codeSolomon Peachy1-2/+5
Change-Id: I3e7bc7ffb8d6d0c5d18a6ab38b1a270559a62fb9
2020-08-31jz4760: use SYSFONT in the hw info debug screen, and restore old fontSolomon Peachy1-1/+2
Change-Id: I0c2df20a8c87f7a5bdf25d59904d32806171a544
2020-08-31Xduoo_x3 Boot Fix red from debug menu changesWilliam Wilgus1-1/+1
Change-Id: I1a84cf28f8a3416d661a8e2e4dd31c9e86f50ba0
2020-08-31xduooX3 debug menu add GPIO IO PortsWilliam Wilgus1-0/+83
Change-Id: I6ca9f005e412240235354b9369bcc3f4a4ad256f
2020-08-30xduoox3: Fix bootloader buildSolomon Peachy1-0/+7
Change-Id: Ia2f2dba4a263c82aebc7fab9da4ad69ef90565ea
2020-08-30jz4760: Explicitly disable UARTs at startupSolomon Peachy3-2/+24
(Bootloader uses UART1, and leaves it running when it hands it off to us) Change-Id: Icde1d713574582f18e9f91b5c95f3917fe324b74
2020-08-30XduooX3 Tweak LCD drive strength and slewWilliam Wilgus1-4/+14
Change-Id: Ic5ee9e700a0c8acffc39b51cedc24ff44d230fd3
2020-08-30xduoox3: Use correct "ms_clk" divider for SADC and be smarter with pollingSolomon Peachy1-4/+14
Change-Id: Ibbbcd9fd1e7e2cfa896678cccaa00296c86c2c62
2020-08-30jz4760: Prioritize Audio DMA and TCU0 (systick) above all othersSolomon Peachy2-39/+21
(And loop in the IRQ handler to make sure we catch everything!) Change-Id: I813272c69e981fdc214ec28448ced403ad366ea0
2020-08-30jz4760: Revert back to the delay loop udelay()Solomon Peachy1-1/+1
... the timer-based version used the same timer as our os tick! Change-Id: Id84b308bfa1145cb8806e1029f2ca26159fb71e1
2020-08-29jz4760: Rework IRQ priorities, make audio the highest.Solomon Peachy1-10/+29
(it was effectively the _lowest_ prior to this. wtf?) Change-Id: I6905c5ba0d87a5e14aeae5d5b79f8f515ac5b806
2020-08-29jz4760: Disable dynamic clocking entirely.Solomon Peachy1-1/+1
Back off to 480MHz [max] clock, bus/mem clock of 120MHz. 576 is unstable on at least one unit, and 528 still glitches. Change-Id: I020e48532524e739f3bfa42bed570381ccd34959
2020-08-29XduooX3 Sources WS changesWilliam Wilgus5-147/+147
Change-Id: I17ae59e7ef0440756527ce50ab30f8bf34f79007
2020-08-29Xduoo X3 Tweak LCD settingsWilliam Wilgus1-12/+115
Adds contrast setting which actually sets the drive voltage Change-Id: I173238e2efe9e50c6ef4cda9bf991e7ee5568ff5
2020-08-29jz4760: do the MSC (ie SD) clocking setup when we change PLL0Solomon Peachy2-31/+13
Change-Id: Ia17b1d7069af507c3f029bcaed0f65e7e97df275
2020-08-28jz4740: Timer not re-enabled properlySolomon Peachy1-3/+3
(same fix as g#2703 for the jz4760) Change-Id: Ic6467d9e6085e3057528b6d1a08b7c07e9dceab4
2020-08-28Xduoo_X3 Fix timer_set_period fail to reenableWilliam Wilgus1-1/+1
when timer_set_period is called timer is stopped but never reenabled Change-Id: I5cfc7a2d5620ff998005e013952b25f1e0a52754
2020-08-28jz4760: Pull non-PLL init out of pll0_init() code.Solomon Peachy1-16/+15
So it only gets called once, at system startup. Change-Id: I4c191519009e80dfb118065391295c88a014d25a
2020-08-27Xduoo X3 - Grey scale lib updateWilliam Wilgus1-19/+20
greylib on the xduoo x3 now matches the rest of the 1bit targets Change-Id: I2685869da6734404356552cc9f4ed5f59ebd6650
2020-08-26xduoox3: Include curves for both battery typesSolomon Peachy1-5/+15
There is no way to detect this at runtime so it is a user setting Change-Id: Ibc5b87312238c59e3678d512af27e3a3bcb9a58a
2020-08-26jz4760: fix the new udelay() to use _micro_seconds, not millisecondsSolomon Peachy1-4/+6
Change-Id: I4877b1c8e4a95259b5ade126e28458b65fbd3c4b
2020-08-26xduoox3: Update battery discharge curve and runtime estimatesSolomon Peachy1-4/+4
(Brand new unit lasted one minute shy of 12 hours!) Change-Id: I0330f43065412d432a45b555bb310f943eb526e7
2020-08-25jz4740: SD clock sequencing changes.Solomon Peachy1-17/+13
* Don't stop clock before switching speeds * Don't stop clock prior to transactions * Stop clock at the end of transactions Will result in slightly better performance and some power saving when we're not actively using the SD peripheral. Change-Id: I1c82476cad97137b1469900645ecf7bb0887119a
2020-08-25jz4760: SD driver enhancements:Solomon Peachy1-41/+90
* Check to see if clock is [not] running prior to [en|dis]abling it * Stop clock _prior_ to resetting controller * Stop clock after transaction is completed, not before initiating it * Use controller's low power mode (disables clocks when idle) * Fix, and enable, interrupt-driven DMA transfers * Fixes for full interrupt-driven operation (WIP, still broken) Change-Id: I723ffa6450fc85f97898c8a8b3e538ae31c4858e
2020-08-25jz4740: Fix potential deadlock in SD init code.Solomon Peachy1-7/+8
There's a code path that calls sd_init_device() while we hold sd_mtx, but sd_init_device() tries to obtain the mutex while doing its work. Change-Id: I882c595e9e7cd2224b1db0d413925668628476e9
2020-08-25jz4760: Give each SD interface its own DMA channel, semaphore, and mutexSolomon Peachy3-91/+175
* Allows both SD interfaces to have requests in flight simultaneously * Fixed a deadlock in the hotswap code * Ensure TX DMA is idle before initiating a request (bug due to a typo) Change-Id: I988fa29df5f8e41fc6bbdcc517db89842003b34d
2020-08-12jz4760: Use HW timer for more a more accurate udelay()Solomon Peachy1-0/+29
(More specifically, use the SoC's "OS Timer", slaved to the main XTAL so it doesn't matter how the main CPU is clocked) Change-Id: I799561ac823ff7f659a05144cf03b6a13d57ea7b
2020-08-08jz4760: Move 11/22/44/88KHz back onto the PLLSolomon Peachy1-8/+16
PLL1 clock for those frequencies has been dropped from 508 to 169.5 MHz, so it's still a respectable reduction. (I'm not sure how/why it ever worked with the XTAL source, but it did, and was off by an audible amount) Change-Id: I614d87e7dfdfe9210702b9c646d3863c06d6780b
2020-08-07jz4760: Major clocking improvements for audio PLLSolomon Peachy1-37/+55
* for <= 48KHz, BCLK must be 256*freq (ie bdiv = 4) * for <= 96KHz, BCLK must be 128*freq (ie bdiv = 2) * for 11/22/44/88 KHz, disable PLL1 and run off XTAL * cut PLL1 with 12/24/48/98 KHz audio from 516->86MHz * cut PLL1 with 8/16/32/64 KHz audio from 426->106.5MHz This should result in significant power savings for common 44.1KHz audio playback, and pretty good savings for everything else. As an added bonus: * enable de-emphasis filters at 32, 44.1, and 48 KHz Change-Id: Ie59067cd46c47e62abf4a32c53519efad104d6c8
2020-08-07jz4760: Support dynamic reclocking!Solomon Peachy2-23/+54
default/low speed is 192 MHz, Max is 576 Downclock PCLK/MCLK/etc to 96MHz to save a bit of juice Honestly the high speed could be dialed down to, eg 384 as this thing is so bloody fast.. Change-Id: Ie65597c74290f1603e65f69dae8e75b59c8ba0b4
2020-08-07jz4760: Fixes in PLL calculation and reportingSolomon Peachy3-14/+12
Change-Id: I890c661fbff549de5a224d90e3fbda34c71b3a7e
2020-08-07xduoox3: Set PLL0 to 480MHz, not 492.Solomon Peachy1-1/+1
PLL0 Needs to be a multiple of 48MHz for sane USB operation! (Indeed, "typical" clock for this part is 528, but that seems a waste of power) Also fixes a minor bugaboo in the jz4670 usb divisor calculation that won't matter until we enable reclocking Change-Id: I40b1fd1ae48871e50885981ccc8b01feb711b9a5
2020-08-07jz4760: Don't enable PLL1 until we need audio.Solomon Peachy2-29/+48
Change-Id: I6320ee9ac809da93c80e571d45f01e22c5bd1c40