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path: root/firmware/target/sh/system-target.h
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2020-07-24[1/4] Remove SH support and all archos targetsSolomon Peachy1-154/+0
This removes all code specific to SH targets Change-Id: I7980523785d2596e65c06430f4638eec74a06061
2012-01-22Create fimrware/asm directory for assembly optimized stuff.Thomas Martitz1-0/+14
This dir is suitable for stuff that doesn't fit the target tree, e.g. because it also builds on hosted or otherwise. It also has a generic subfolder for fallback C implementations so that not all archs need to provide asm files. SOURCES should only contain "foo.c" where foo.c includes the specific <arch>/foo.c files from the subdirs using the preprocessor. This way automatic selection of asm versions or generic C verion is possible. For the start, the thread support files are moved, since ASM threads can be used on hosted platforms as well. Since core_sleep() remains platform specific it's moved to the corresponding system.h headers. Change-Id: Iebff272f3407a6eaafeb7656ceb0ae9eca3f7cb9
2011-12-17Commit to certain names for cache coherency APIs and discard the aliases.Michael Sevakis1-0/+4
Wouldn't surprise me a bit to get some non-green. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31339 a1c6a512-1295-4272-9138-f99709370657
2011-02-25Byteswap routines don't really need 'asm volatile', just 'asm' since it ↵Michael Sevakis1-9/+9
should be safe to move them for optimizing. Clean up the line endings for ARM. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29394 a1c6a512-1295-4272-9138-f99709370657
2011-01-30Use __builtin_constant_p() to select the best byteswapping method: constant ↵Michael Sevakis1-4/+4
or target optimized. Same macro can then be used for constant values and inits as well as non-constant. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29171 a1c6a512-1295-4272-9138-f99709370657
2009-06-06Replace 1UL in BIT_N with 1U to avoid turning it into a 64-bit operation on ↵Andrew Mahone1-1/+1
64-bit sim targets. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21197 a1c6a512-1295-4272-9138-f99709370657
2009-06-06Add a system-wide BIT_N macro, implemented via an LUT on SH, and use it in ↵Andrew Mahone1-0/+7
the TAGCACHE_IS_* macros in place of per-set LUTs, removing duplication of data between those LUTs and the mask values used on other targets. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21195 a1c6a512-1295-4272-9138-f99709370657
2009-02-11Make basic cache functions into calls, and get rid of ↵Michael Sevakis1-2/+0
CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
2008-06-28Updated our source code header to explicitly mention that we are GPL v2 orDaniel Stenberg1-2/+4
later. We still need to hunt down snippets used that are not. 1324 modified files... http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
2008-03-26Do core interrupt masking in a less general fashion and save some ↵Michael Sevakis1-1/+19
instructions to decrease size and speed things up a little bit. Small fix to a few places where interrupts would get enabled again where they shouldn't have been (context switching calls when disabled). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16811 a1c6a512-1295-4272-9138-f99709370657
2007-04-15A bit of clarification of code origin. No code change.Jens Arnold1-0/+1
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13173 a1c6a512-1295-4272-9138-f99709370657
2007-04-11Oops, forgot to commit 2 new files...Jens Arnold1-0/+110
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13115 a1c6a512-1295-4272-9138-f99709370657