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Change-Id: I196414d6e4fc18c00b77903e334b7e6adfb7debc
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Change-Id: Id0a071528eca08fe512941be9c8091819e817e4c
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This is a register description file for the JZ4760B. There are several
details worth noticing:
- it was obtained by gathering information from several sources/headers, but
since there are inconsistencies between them about the exact differences
between JZ4760 and JZ4760B, this file probably contains some errors
- the register names are not the same as the manual ones (which are not the
same as the one in the headers anyway): I dropped the "R" suffix on most
registers because it's redundant
- Ingenic likes to have read-only registers and then set/clr registers, with
very confusing names like DIR/DIRS/DIRC: in the file, the set/clr registers
are described as set/clr variants of the original register
- Parts of the description were obtained programmatically, which explains why
there are empty nodes or partially undocumented registers
Change-Id: I8da1d61e172e932e1a4a58ac0a5008f02b1751be
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This new header generator works differently from the previous one:
- it uses the new format
- the generated macro follow a different style (see below)
- the generated macro are highly documented!
- it supports SCT-style platform or RMW-style ones
Compared to the old style, the new one generate a big set of macros per
register/field/enum (loosely related to iohw.h from Embedded C spec). The user
then calls generic (names are customizable) macros to perform operations:
reg_read(REG_A)
reg_read(REG_B(3))
reg_read_field(REG_A, FIELD_X)
reg_read_field(REG_B(3), COOL_FIELD)
reg_write(REG_A, 0x42)
reg_write_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ))
reg_write_fielc(REG_B(3), COOL_FIELD_V(I_AM_COOL), BLA(42))
the following use RMW or SET/CLR variants, depending on target:
reg_set_field(REG_A, FLAG_U, FLAG_V)
reg_clr_field(REG_A, FIELD_X, FIELD_Y, IRQ)
reg_clr_field(REG_B(3), COOL_FIELD, BLA)
the following does clear followed by set, on SET/CLR targets:
reg_cs(REG_A, 0xff, 0x42)
reg_cs(REG_B(3), 0xaa, 0x55)
reg_cs_field(REG_A, FIELD_X(1), FIELD_Y(3), IRQ_V(FIQ))
reg_cs_field(REG_B(3), COOL_FIELD_V(I_AM_COOL))
The generator code is pretty long but has lots of documentation and lots of
macro names can be customized.
Change-Id: I5d6c5ec2406e58b5da11a5240c3a409a5bb5239a
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Registers (and variants) can now specify the type of access supported:
- unspecified: for variant means same as register, for register defaults R/W
- read/write
- read only
- write only
Backward compatibility is preserved by setting access to unspecified by default.
Change-Id: I3e84ae18f962a45db62f996a542d08405d05b895
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Change-Id: I60a764567d2fc73ed87fca2a8b0eaf643d4984bc
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Conversion done using swiss_knife as follows:
./swiss_knife convert --author "Amaury Pouly" --version "2.4.0" desc/regs-stmp3XXX-v1.xml desc/regs-stmp3XXX.xml
Change-Id: Iad26e04f8f599cf25339a33aa65f231379434e98
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Change-Id: Ib66a404acf1f640e19b30b35d6a976094ae4264a
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A v2 register description file can now include register variants and instances
addresses can now be a list (previously it could only be a stride or a formula).
Update the library to deal with that. The convert option of swiss_knife was
updated and one incompatible change was introduce: if a v1 device has several
addresses, those are converted to a single v2 instance with list (instead of
several single instances). This should have been the behaviour from the start.
Swiss_knife can now also convert regdumps, in which case it needs to be given
both the dump and register description file. Also introduce two register
descriptions files (vsoc1000 and vsoc2000) which give more complicated examples
of v2 register description files.
Change-Id: Id9415b8363269ffaf9216abfc6dd1bd1adbfcf8d
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Fix qeditor to use the old soc_desc_v1.
Port hwstub_shell to the new description format.
Change-Id: I9fefbff534bfaa5c3603bb3dd8307a2b76e88cfc
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Change-Id: I4afc17b06f85d552248c0248e6b4b921ffc1e7a7
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Catched by swiss_knife check there are some overlaping fields
and invalid characters in some names.
Change-Id: Ia26ffd2e29452f4ddd9f8229f78bb2a2cc325ab4
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Change-Id: I5f5a3537d1ddf6b02684dd4c1dd13be862d3a918
Reviewed-on: http://gerrit.rockbox.org/1054
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
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Change-Id: I3ab32996b4b6603fd7d66eee5b3bfd795b79eee1
Reviewed-on: http://gerrit.rockbox.org/1049
Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
Tested: Marcin Bukat <marcin.bukat@gmail.com>
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Change-Id: Ia34dcf651e68ea66baebdeb8c056db86799ea33c
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Change-Id: I5b4d29e0808c57e252f5b6c3b9ba26a52c1bd112
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Change-Id: I0a2e45eb1b4aa03122382cc93bbc0c292b3249be
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Change-Id: If37551757188d98bcb27f7f469c11cf89bf64f62
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Change-Id: Ia44169bda8f1558c1cbd4c8c0d2d3aaee262c991
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Change-Id: I3fc1c6c70c828dca285479eaa168328a2a8fdf2c
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change.
Files were generated using utils/regtools/tester in "write" mode.
Change-Id: Ib391b8dbb5ec84eb821e0d0a3699d306414f2aa1
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The graphical editor can now display and editor description files.
The library has been improved to provide more useful function.
The XML format has been slightly changed: only one soc is allowed per file
(this is was already de facto the case since <soc> was the root tag).
Also introduce a DTD to validate the files.
Change-Id: If70ba35b6dc0242bdb87411cf4baee9597798aac
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Change-Id: I27101876d031cbcbb00e741ea742a6f64a7baad7
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Change-Id: I654e3210c1050e3bd559c9e9b29707a6341b111b
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Change-Id: I7e293532983f350a6f7cd9c7bc2bc6633c8fd3f2
Reviewed-on: http://gerrit.rockbox.org/671
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
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Change-Id: I2745287844ad0a47dd41ba4dae5e1f7218ae5814
Reviewed-on: http://gerrit.rockbox.org/679
Reviewed-by: Amaury Pouly <amaury.pouly@gmail.com>
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Change-Id: Ief34c219bbe05c9aeed665235942bb158bb0f4d4
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Change the XML description to unify multi dev/reg in a clean
fashion. Move the description parser to its own library. Fix
the tester and headergen tools to work with the new format and
library. Move the STMP3700/3780 descriptions to the new format
(and fixes many errors as well). Drop the hwemulgen tool
in favor on the upcoming hwstub tools revamp.
Change-Id: I7119a187aab5c8b083cc5228cb1b248ee29f184d
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The register tools are in no way stmp specific. The XML
description of the registers is powerful enough to describe
the STMP register which should be more than enough to describe
virtually all other SoCs. The generators follow the STMP coding
convention but others could be used as well.
Change-Id: If1a9f56e4a3594161688de34adbea698e5aaecd8
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