From 0cb162a76b16d58250a33e817af6a763e89a770a Mon Sep 17 00:00:00 2001 From: Solomon Peachy Date: Fri, 28 Aug 2020 21:45:58 -0400 Subject: mips: Heavily rework DMA & caching code Based on code originally written by Amaury Pouly (g#1789, g#1791, g#1527) but rebased and heavily updated. Change-Id: Ic794abb5e8d89feb4b88fc3abe854270fb28db70 --- firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c') diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c index 55ffecce09..1960fcbd35 100644 --- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c +++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4760.c @@ -532,6 +532,9 @@ static int jz_sd_transmit_data(const int drive, struct sd_request *req) #if SD_DMA_ENABLE static int jz_sd_receive_data_dma(const int drive, struct sd_request *req) { + /* flush dcache */ + discard_dcache_range(req->buffer, req->cnt); + /* setup dma channel */ REG_DMAC_DCCSR(DMA_SD_RX_CHANNEL(drive)) = 0; REG_DMAC_DSAR(DMA_SD_RX_CHANNEL(drive)) = PHYSADDR(MSC_RXFIFO(MSC_CHN(drive))); /* DMA source addr */ @@ -558,16 +561,13 @@ static int jz_sd_receive_data_dma(const int drive, struct sd_request *req) /* clear status and disable channel */ REG_DMAC_DCCSR(DMA_SD_RX_CHANNEL(drive)) = 0; - /* flush dcache */ - dma_cache_wback_inv((unsigned long) req->buffer, req->cnt); - return SD_NO_ERROR; } static int jz_sd_transmit_data_dma(const int drive, struct sd_request *req) { /* flush dcache */ - dma_cache_wback_inv((unsigned long) req->buffer, req->cnt); + commit_discard_dcache_range(req->buffer, req->cnt); /* setup dma channel */ REG_DMAC_DCCSR(DMA_SD_TX_CHANNEL(drive)) = 0; -- cgit