/* register defines */ #define R_START_OSC 0x00 #define R_DRV_OUTPUT_CONTROL 0x01 #define R_DRV_WAVEFORM_CONTROL 0x02 #define R_ENTRY_MODE 0x03 #define R_COMPARE_REG1 0x04 #define R_COMPARE_REG2 0x05 #define R_DISP_CONTROL1 0x07 #define R_DISP_CONTROL2 0x08 #define R_DISP_CONTROL3 0x09 #define R_FRAME_CYCLE_CONTROL 0x0b #define R_EXT_DISP_IF_CONTROL 0x0c #define R_POWER_CONTROL1 0x10 #define R_POWER_CONTROL2 0x11 #define R_POWER_CONTROL3 0x12 #define R_POWER_CONTROL4 0x13 #define R_RAM_ADDR_SET 0x21 #define R_WRITE_DATA_2_GRAM 0x22 #define R_GAMMA_FINE_ADJ_POS1 0x30 #define R_GAMMA_FINE_ADJ_POS2 0x31 #define R_GAMMA_FINE_ADJ_POS3 0x32 #define R_GAMMA_GRAD_ADJ_POS 0x33 #define R_GAMMA_FINE_ADJ_NEG1 0x34 #define R_GAMMA_FINE_ADJ_NEG2 0x35 #define R_GAMMA_FINE_ADJ_NEG3 0x36 #define R_GAMMA_GRAD_ADJ_NEG 0x37 #define R_GAMMA_AMP_ADJ_RES_POS 0x38 #define R_GAMMA_AMP_AVG_ADJ_RES_NEG 0x39 #define R_GATE_SCAN_POS 0x40 #define R_VERT_SCROLL_CONTROL 0x41 #define R_1ST_SCR_DRV_POS 0x42 #define R_2ND_SCR_DRV_POS 0x43 #define R_HORIZ_RAM_ADDR_POS 0x44 #define R_VERT_RAM_ADDR_POS 0x45 #define R_ENTRY_MODE_HORZ 0x1030 #define R_ENTRY_MODE_VIDEO 0x1038 /* Reverse Flag */ #define R_DISP_CONTROL_NORMAL 0x0004 #define R_DISP_CONTROL_REV 0x0000 #define R_DRV_OUTPUT_CONTROL_NORMAL 0x115 #define R_DRV_OUTPUT_CONTROL_FLIPPED 0x215 #define R_GATE_SCAN_POS_NORMAL 0 #define R_GATE_SCAN_POS_FLIPPED 18 void lcd_write_cmd(int16_t cmd); void lcd_write_reg(int reg, int value); void fuze_display_on(void);