vsoc1000
Virtual SOC 1000
Virtual SoC 1000 is a nice chip. Its dual-core architecture makes it super powerful.
Amaury Pouly
ARM
0.5
int
Interrupt Collector
The interrupt collector controls the routing of the interrupts to the processors. It has 32 interrupts sources, which can be routed as FIQ or IRQ to the main processor or the coprocessor.
ICOLL
Interrupt collector
0x80000000
ctrl
Control register
CTRL
0x0
8
CLKGATE
Clock gating control
7
SFTRST
Soft reset, the bit will automatically reset to 0 when reset is completed
6
set
4
clr
8
status
Interrupt status register
STATUS
0x10
STATUS
Bit is set to 1 is the interrupt is pending, write a 1 to the clear variant to clear it
0
32
clr
8
enable
Interrupt enable register
ENABLE
0
32
0x20
0x10
16
This register controls the routing of the interrupt
COP_PRIO
Coprocessor priority
5
2
MASKED
Interrupt is masked
0x0
LOW
0x1
HIGH
0x2
NMI
Interrupt is non maskable
0x3
COP_TYPE
Interrupt type
4
IRQ
0x0
FIQ
0x1
CPU_PRIO
CPU priority
2
2
MASKED
Interrupt will never be sent to the CPU
0x0
LOW
0x1
HIGH
0x2
NMI
Interrupt is non maskable
0x3
CPU_TYPE
Interrupt type
1
IRQ
0x0
FIQ
0x1
ENABLE
0
set
4
clr
8
gpio
GPIO controller
A GPIO controller manages several ports
CPU_GPIO
CPU GPIO controller 1 through 3
1
3
0x80001000+(n-1)*0x1000
COP_GPIO
Companion processor GPIO controller
Although the companion processor GPIO controller is accessible from the CPU, it incurs an extra penalty on the bus
0x90000000
port
GPIO port
PORT
0
2
0x0
0x100
input
Input register
IN
0x0
8
VALUE
0
8
output_enable
Output enable register
OE
0x10
8
ENABLE
0
8
set
4
clr
8
mask
12