This file describes the format of the register map based on XML, version 2.0. 1) Overview ----------- 1.1) Nodes and instances ------------------------ This specification is based on the concept of "nodes". Nodes are containers which can contain other nodes and/or a register. Each node can have one or more addresses (addresses are always relative to the parent node). The idea is that this hierarchy of nodes generates a number of addresses recursively. The example below outlines this idea: N A
X
B
Y
This example creates one node named N and two instances named A and B, at respective addresses X and Y. This means that all subnodes of this node will have two copies: one relative to X, which path will be prefixed by "A", and one relative to Y, which path will be prefixed by "B". This example below explores this idea in details: S_N C
U
D
V
In this example, N generates two copies of the sub-node S_N. The sub-node S_N generates two instances C and D. The whole hierarchy thus generates four instances: - A.C at X+U - A.D at X+V - B.C at Y+U - B.D at Y+V As a note for later, notice that there really are two hierarchies in parallel: - the node hierarchy: it is composed of N and N.S_N - the instance hierarchy: it is made up of A, B, A.C, A.D, B.C and B.D 1.2) Ranges ----------- To make things more useful, in particular in case of multiple copies of a register, we introduce the concept of range addresses with an example: N A 1 5 0x1000 0x100 NN E
0x4
A range describes a contiguous set of adresses, indexed by a number. One can specify the first number in the range, and the number of copies. In the case of a regular pattern (base + n * stride), we can specify a stride to compute the address of the next copy. In this example, the top-level nodes generates five copies which path is A, A, ..., A and which addresses are 0x1000+1*0x100, 0x1000+2*0x100, ..., 0x1000+5*0x100. If we add the sub-node to the picture, for each copy we create a instance E we offset 0x4 from the parent. Overall this generates 5 instances: - A.E at 0x1000+1*0x100+0x4 = 0x1104 - A.E at 0x1000+2*0x100+0x4 = 0x1204 - A.E at 0x1000+3*0x100+0x4 = 0x1304 - A.E at 0x1000+4*0x100+0x4 = 0x1404 - A.E at 0x1000+5*0x100+0x4 = 0x1504 Note that the intermediate path also define instances, so there are 5 additional instances in reality: - A at 0x1100 - A at 0x1200 - A at 0x1300 - A at 0x1400 - A at 0x1500 For the record, there is a more general way of specifying a range when it does not follow a nice regular pattern. One can specify a formula where the parameter is the index. There are no restrictions on the formula except that it must use usual arithmetic operators. The example below illustrate such a use: N F 0 4 0x50+(n/2)*0x100+(n%2)*0x10 In the case when the addresses do not follow a regular pattern or a formula would be too complicated, it is always possible to specify the addresses as a list: N F 0
0x50
0x60
0x90
0x110
In this example we generate four nodes F, ..., F with a formula. Here "/" is the euclidian division and "%" is the modulo operator. Note the use of an attribute to specify which variable represents the index. The generated addresses are: - F at 0x50+(0/2)*0x100+(0%2)*0x10 = 0x50 - F at 0x50+(1/2)*0x100+(1%2)*0x10 = 0x50+0x10 = 0x60 - F at 0x50+(2/2)*0x100+(2%2)*0x10 = 0x50+0x100 = 0x150 - F at 0x50+(3/2)*0x100+(3%2)*0x10 = 0x50+0x100+0x10 = 0x160 1.3) Node description --------------------- For documentation purposes, node can of course carry some description, as well as instances. More precisely, nodes can have a title, that is a short description very much like a chapter title, and a description, this is a free form and potentially lengthy description of the node. Instances too can have a title and a description. The following example illustrates this: icoll DMA Controller The DMA controller provides uniform DMA facilities to transfer data from and to peripherals. It uses memory-mapped tables and support chained transfers. AHB_DMAC
0x80000000
AHB DMA Controller The AHB DMA controller provides DMA facilities for the peripherals on the AHB bus like the SSP and PIX engines.
APB_DMAC
0x8001000
APB DMA Controller The APB DMA controller provides DMA facilities for the peripherals on the APB bus like the I2C and PCM engines.
1.4) Register description -------------------------- The goal of the register description is of course to describe registers! To see how registers relate to the node hierarchy, see 1.5, this section focuses only the description only. A register carries a lot of information, which is organise logically. A register can have a width, in bits. By default registers are assumed to be 32-bit wide. The most useful feature of register description is to describe the fields of the registers. Each field has a name, a start position and a width. Fields can also carry a description. Finally, each field can specify enumerated values, that is named values, for convenience. Enumerated values have a name, a value and an optional description. The example below illustrates all these concepts: 8 This register controls the parameters of the interrupt: priority, IRQ/FIQ and enable MODE Interrupt mode 0 2 DISABLED Interrupt is disabled 0 ENABLED Interrupt is enabled 1 NMI Interrupt is non-maskable 2 PRIORITY Interrupt priority, lower values are more prioritized. 2 2 ARM_MODE Select between ARM's FIQ and IRQ mode 4 1 IRQ 0 FIQ 1 set 0x4 In this example, the 8-bit registers has three fields: - MODE(1:0): it has three named values DISABLED(0), ENABLED(1) and NMI(2) - PRIORITY(2:1): it has no named values - ARM_MODE(3): it has two named values IRQ(0) and FIQ(1) 1.5) Register inheritance ------------------------- The node hierarchy specifies instances, that is pairs of (path,address), and the register description describes the internal of a register. The placement of the register descriptions in the node hierarchy will specify which registers can be found at each address. More precisely, if a node contains a register description, it means that this node's and all sub-nodes' instances are registers following the description. It is forbidden for a node to contain a register description if one of its parents already contains one. The example below will make this concept clearer (for readability, we omitted some of the tags): dma DMAC
0x80000000
PCM_CHAN
0x0
I2C_CHAN
0x10
sct SET
0x4
CLR
0x8
TOG
0xC