summaryrefslogtreecommitdiffstats
path: root/firmware/drivers/audio/aic3x.c
blob: 9b705db7f556b12984b13d0f7c55fd40e3beeb27 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * $Id: $
 *
 * Copyright (C) 2011 by Tomasz Moń
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#include "config.h"
#include "logf.h"
#include "system.h"
#include "string.h"
#include "audio.h"
#if CONFIG_I2C == I2C_DM320
#include "i2c-dm320.h"
#endif
#include "audiohw.h"

/* (7-bit) address is 0x18, the LSB is read/write flag */
#define AIC3X_ADDR (0x18 << 1)

static char volume_left = 0, volume_right = 0;

/* convert tenth of dB volume to master volume register value */
static int vol_tenthdb2hw(int db)
{
    /* 0 to -63.0dB in 1dB steps, aic3x can goto -63.5 in 0.5dB steps */
    if (db <= -640)
    {
        return 0x7E;
    }
    else if (db >= 0)
    {
        return 0x00;
    }
    else
    {
        return (-((db)/5));
    }
}

static void aic3x_write_reg(unsigned reg, unsigned value)
{
    unsigned char data[2];

    data[0] = reg;
    data[1] = value;

#if CONFIG_I2C == I2C_DM320
    if (i2c_write(AIC3X_ADDR, data, 2) != 0)
#else
    #warning Implement aic3x_write_reg()
#endif
    {
        logf("AIC3X error reg=0x%x", reg);
        return;
    }
}

static unsigned char aic3x_read_reg(unsigned reg)
{
    unsigned char data;

#if CONFIG_I2C == I2C_DM320
    if (i2c_read_bytes(AIC3X_ADDR, reg, &data, 1))
#else
    #warning Implement aic3x_read_reg()
#endif
    {
        logf("AIC3X read error reg=0x%0x", reg);
        data = 0;
    }

    return data;
}

static void aic3x_change_reg(unsigned reg, unsigned char or_mask,
                             unsigned char and_mask)
{
    unsigned char data;

    data = aic3x_read_reg(reg);

    data &= and_mask;
    data |= or_mask;

    aic3x_write_reg(reg, data);
}
                                    
static void aic3x_apply_volume(void)
{
    unsigned char data[3];

#if 0 /* handle page switching once we use first page at all */
    aic3x_write_reg(0, 0); /* switch to page 0 */
#endif

    data[0] = AIC3X_LEFT_VOL;
    data[1] = volume_left;
    data[2] = volume_right;

    /* use autoincrement write */
#if CONFIG_I2C == I2C_DM320
    if (i2c_write(AIC3X_ADDR, data, 3) != 0)
#else
    #warning Implement aic3x_apply_volume()
#endif
    {
        logf("AIC3X error in apply volume");
        return;
    }
}


static void audiohw_mute(bool mute)
{
    if (mute)
    {
        /* DAC_L1 routed to HPLOUT, mute */
        aic3x_write_reg(AIC3X_DAC_L1_VOL, 0xF6);
        /* DAC_R1 routed to HPROUT, mute */
        aic3x_write_reg(AIC3X_DAC_R1_VOL, 0xF6);
        /* DAC_L1 routed to MONO_LOP/M, mute */
        aic3x_write_reg(AIC3X_DAC_L1_MONO_LOP_M_VOL, 0xF6);
        /* DAC_R1 routed to MONO_LOP/M, mute */ 
        aic3x_write_reg(AIC3X_DAC_R1_MONO_LOP_M_VOL, 0xF6);

        volume_left |= 0x80;
        volume_right |= 0x80;
    }
    else
    {
        /* DAC_L1 routed to HPLOUT, volume analog gain 0xC (-6.0dB) */
        aic3x_write_reg(AIC3X_DAC_L1_VOL, 0x8C);
        /* DAC_R1 routed to HPROUT, volume analog gain 0xC (-6.0 dB) */
        aic3x_write_reg(AIC3X_DAC_R1_VOL, 0x8C);
        /* DAC_L1 routed to MONO_LOP/M, gain 0x2 (-1.0dB) */
        aic3x_write_reg(AIC3X_DAC_L1_MONO_LOP_M_VOL, 0x92);
        /* DAC_R1 routed to MONO_LOP/M, gain 0x2 (-1.0dB) */ 
        aic3x_write_reg(AIC3X_DAC_R1_MONO_LOP_M_VOL, 0x92);

        volume_left &= 0x7F;
        volume_right &= 0x7F;
    }

    aic3x_apply_volume();
}

/* public functions */

/**
 * Init our tlv with default values
 */
void audiohw_init(void)
{
    logf("AIC3X init");

    /* Do software reset (self-clearing) */
    aic3x_write_reg(AIC3X_SOFT_RESET, 0x80);

    /* driver power-on time 200 ms, ramp-up step time 4 ms */
    aic3x_write_reg(AIC3X_POP_REDUCT, 0x7C);

    /* Output common-move voltage 1.35V, disable LINE2[LR] bypass */
    /* Output soft-stepping = one step per fs */
    aic3x_write_reg(AIC3X_POWER_OUT, 0x00);

    /* Audio data interface */
    /* GPIO1 used for audio serial data bus ADC word clock */
    aic3x_write_reg(AIC3X_GPIO1_CTRL, 0x10);
    /* BCLK and WCLK are outputs (master mode) */
    aic3x_write_reg(AIC3X_DATA_REG_A, 0xC0);
    /* right-justified mode */
    aic3x_write_reg(AIC3X_DATA_REG_B, 0x80);
    /* data offset = 0 clocks */
    aic3x_write_reg(AIC3X_DATA_REG_C, 0);

    /* Left DAC plays left channel, Right DAC plays right channel */ 
    aic3x_write_reg(AIC3X_DATAPATH, 0xA);

    /* power left and right DAC, HPLCOM constant VCM output */
    aic3x_write_reg(AIC3X_DAC_POWER, 0xD0);
    /* HPRCOM as constant VCM output. Enable short-circuit protection
       (limit current) */
    aic3x_write_reg(AIC3X_HIGH_POWER, 0xC);

    /* DAC_L1 routed to HPLOUT */
    aic3x_write_reg(AIC3X_DAC_L1_VOL, 0x80);
    /* DAC_R1 routed to HPROUT */
    aic3x_write_reg(AIC3X_DAC_R1_VOL, 0x80);

    /* DAC_L1 routed to MONO_LOP/M */
    aic3x_write_reg(AIC3X_DAC_L1_MONO_LOP_M_VOL, 0x80);
    /* DAC_R1 routed to MONO_LOP/M */
    aic3x_write_reg(AIC3X_DAC_R1_MONO_LOP_M_VOL, 0x80);

    /* DAC_L1 routed to LEFT_LOP/M */
    aic3x_write_reg(AIC3X_DAC_L1_LEFT_LOP_M_VOL, 0x80);
    /* DAC_R1 routed to RIGHT_LOP/M */
    aic3x_write_reg(AIC3X_DAC_R1_RIGHT_LOP_M_VOL, 0x80);

    /* LEFT_LOP/M output level 0dB, not muted */
    aic3x_write_reg(AIC3X_LEFT_LOP_M_LVL, 0x8);
    /* RIGHT_LOP/M output level 0dB, not muted */
    aic3x_write_reg(AIC3X_RIGHT_LOP_M_LVL, 0x8);

    /* Enable PLL. Set Q=16, P=1 */
    aic3x_write_reg(AIC3X_PLL_REG_A, 0x81);
    /* PLL J = 53 */
    aic3x_write_reg(AIC3X_PLL_REG_B, 0xD4);
    /* PLL D = 5211 */
    aic3x_write_reg(AIC3X_PLL_REG_C, 0x51); 
    aic3x_write_reg(AIC3X_PLL_REG_D, 0x6C);
    /* PLL R = 1 */
    aic3x_write_reg(AIC3X_OVERFLOW, 0x01);

    /* ADC fs = fs(ref)/5.5; DAC fs = fs(ref) */
    aic3x_write_reg(AIC3X_SMPL_RATE, 0x90);

    /* HPLOUT output level 0dB, muted, high impedance */
    aic3x_write_reg(AIC3X_HPLOUT_LVL, 0x04);
    /* HPROUT output level 0dB, muted, high impedance */
    aic3x_write_reg(AIC3X_HPROUT_LVL, 0x04);

    /* HPLCOM is high impedance when powered down, not fully powered up */
    aic3x_write_reg(AIC3X_HPLCOM_LVL, 0x04);
}

void audiohw_postinit(void)
{
    audiohw_mute(false);

    /* HPLOUT output level 0dB, not muted, fully powered up */
    aic3x_write_reg(AIC3X_HPLOUT_LVL, 0x09);
    /* HPROUT output level 0dB, not muted, fully powered up */
    aic3x_write_reg(AIC3X_HPROUT_LVL, 0x09);

    /* MONO_LOP output level 6dB, not muted */
    aic3x_write_reg(AIC3X_MONO_LOP_M_LVL, 0x69);

    /* PGA_R is not routed to MONO_LOP/M, analog gain -52.7dB */
    aic3x_write_reg(AIC3X_PGA_R_MONO_LOP_M_VOL, 0x69);
}

void audiohw_set_frequency(int fsel)
{
    (void)fsel;
    /* TODO */
}

void audiohw_set_volume(int vol_l, int vol_r)
{
    vol_l = vol_tenthdb2hw(vol_l);
    vol_r = vol_tenthdb2hw(vol_r);

    if ((volume_left & 0x7F) == (vol_l & 0x7F) &&
        (volume_right & 0x7F) == (vol_r & 0x7F))
    {
        /* Volume already set to this value */
        return;
    }

    volume_left &= 0x80; /* preserve mute bit */
    volume_left |= (vol_l & 0x7F); /* set gain */

    volume_right &= 0x80; /* preserve mute bit */
    volume_right |= (vol_r & 0x7F); /* set gain */

    aic3x_apply_volume();
}

/* Nice shutdown of AIC3X codec */
void audiohw_close(void)
{
    /* HPLOUT, HPROUT, HPLCOM not fully powered up */
    aic3x_change_reg(AIC3X_HPLOUT_LVL, 0x00, 0xFE);
    aic3x_change_reg(AIC3X_HPROUT_LVL, 0x00, 0xFE);
    aic3x_change_reg(AIC3X_HPLCOM_LVL, 0x00, 0xFC);

    /* MONO_LOP/M, LEFT_LOP/M, RIGHT_LOP/M muted, not fully powered up */
    aic3x_change_reg(AIC3X_MONO_LOP_M_LVL, 0x00, 0xF6);
    aic3x_change_reg(AIC3X_LEFT_LOP_M_LVL, 0x00, 0xF6);
    aic3x_change_reg(AIC3X_RIGHT_LOP_M_LVL, 0x00, 0xF6);

    /* Power down left and right DAC */
    aic3x_change_reg(AIC3X_DAC_POWER, 0x00, 0x30);

    /* Disable PLL */
    aic3x_change_reg(AIC3X_PLL_REG_A, 0x00, 0x7F);
}

void aic3x_switch_output(bool stereo)
{
    if (stereo)
    {
        /* mute MONO_LOP/M */
        aic3x_change_reg(AIC3X_MONO_LOP_M_LVL, 0x00, 0xF6);
        /* HPLOUT fully powered up */
        aic3x_change_reg(AIC3X_HPLOUT_LVL, 0x01, 0xFF);
        /* HPROUT fully powered up */
        aic3x_change_reg(AIC3X_HPROUT_LVL, 0x01, 0xFF);
        /* HPLCOM fully powered up */
        aic3x_change_reg(AIC3X_HPLCOM_LVL, 0x01, 0xFF);
    }
    else
    {
        /* MONO_LOP/M not muted */
        aic3x_change_reg(AIC3X_MONO_LOP_M_LVL, 0x09, 0xFF);
        /* HPLOUT not fully powered up */
        aic3x_change_reg(AIC3X_HPLOUT_LVL, 0x00, 0xFE);
        /* HPROUT not fully powered up */
        aic3x_change_reg(AIC3X_HPROUT_LVL, 0x00, 0xFE);
        /* HPLCOM not fully powered up */
        aic3x_change_reg(AIC3X_HPLCOM_LVL, 0x00, 0xFE);
    }
}